Merge remote-tracking branch 'remotes/xtensa/tags/20140224-xtensa' into staging

Xtensa fixes and improvements queue 2014-02-24:
- add support for ML605 and KC705 FPGA boards;
- flush opencores_eth queue when new RX descriptor is available;
- add basic checks to cache opcodes;
- make core configuration available to tests;
- implement HW config ID special registers.

# gpg: Signature made Mon 24 Feb 2014 00:52:42 GMT using RSA key ID F83FA044
# gpg: Good signature from "Max Filippov <max.filippov@cogentembedded.com>"
# gpg:                 aka "Max Filippov <jcmvbkbc@gmail.com>"

* remotes/xtensa/tags/20140224-xtensa:
  target-xtensa: provide HW confg ID registers
  target-xtensa: refactor standard core configuration
  target-xtensa: add basic tests for cache opcodes
  target-xtensa: allow using core configuration in tests
  target-xtensa: add overridable test_init macro
  target-xtensa: add basic checks to icache opcodes
  target-xtensa: add basic checks to dcache opcodes
  target-xtensa: add RRRI4 opcode format fields
  opencores_eth: flush queue whenever can_receive can go from false to true
  hw/xtensa: add support for ML605 and KC705 FPGA board

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

31 files changed, 141 insertions, 34 deletions

diff --git a/tests/tcg/xtensa/Makefile b/tests/tcg/xtensa/Makefile
index 1b519cae45..a70c92be7e 100644
--- a/tests/tcg/xtensa/Makefile
+++ b/tests/tcg/xtensa/Makefile
@@ -1,10 +1,11 @@
 -include ../../../config-host.mak
 
-CROSS=xtensa-dc232b-elf-
+CORE=dc232b
+CROSS=xtensa-$(CORE)-elf-
 
 ifndef XT
 SIM = ../../../xtensa-softmmu/qemu-system-xtensa
-SIMFLAGS = -M sim -cpu dc232b -nographic -semihosting $(EXTFLAGS) -kernel
+SIMFLAGS = -M sim -cpu $(CORE) -nographic -semihosting $(EXTFLAGS) -kernel
 SIMDEBUG = -s -S
 else
 SIM = xt-run
@@ -17,6 +18,8 @@ AS      = $(CROSS)gcc -x assembler-with-cpp
 LD      = $(CROSS)ld
 
 XTENSA_SRC_PATH = $(SRC_PATH)/tests/tcg/xtensa
+INCLUDE_DIRS = $(XTENSA_SRC_PATH) $(SRC_PATH)/target-xtensa/core-$(CORE)
+XTENSA_INC = $(addprefix -I,$(INCLUDE_DIRS))
 
 LDFLAGS = -T$(XTENSA_SRC_PATH)/linker.ld
 
@@ -27,6 +30,7 @@ TESTCASES += test_bi.tst
 #TESTCASES += test_boolean.tst
 TESTCASES += test_break.tst
 TESTCASES += test_bz.tst
+TESTCASES += test_cache.tst
 TESTCASES += test_clamps.tst
 TESTCASES += test_extui.tst
 TESTCASES += test_fail.tst
@@ -56,10 +60,10 @@ TESTCASES += test_windowed.tst
 all: build
 
 %.o: $(XTENSA_SRC_PATH)/%.c
-	$(CC) -I$(XTENSA_SRC_PATH) $(CFLAGS) -c $< -o $@
+	$(CC) $(XTENSA_INC) $(CFLAGS) -c $< -o $@
 
 %.o: $(XTENSA_SRC_PATH)/%.S
-	$(AS) -Wa,-I,$(XTENSA_SRC_PATH) $(ASFLAGS) -c $< -o $@
+	$(CC) $(XTENSA_INC) $(ASFLAGS) -c $< -o $@
 
 %.tst: %.o $(XTENSA_SRC_PATH)/macros.inc $(CRT) Makefile
 	$(LD) $(LDFLAGS) $(NOSTDFLAGS) $(CRT) $< -o $@
diff --git a/tests/tcg/xtensa/macros.inc b/tests/tcg/xtensa/macros.inc
index c9be1ce516..4ebd30ab86 100644
--- a/tests/tcg/xtensa/macros.inc
+++ b/tests/tcg/xtensa/macros.inc
@@ -1,3 +1,5 @@
+#include "core-isa.h"
+
 .macro test_suite name
 .data
 status: .word result
@@ -43,8 +45,12 @@ main:
     simcall
 .endm
 
+.macro test_init
+.endm
+
 .macro test name
     //print test_\name
+    test_init
 test_\name:
 .global test_\name
 .endm
diff --git a/tests/tcg/xtensa/test_b.S b/tests/tcg/xtensa/test_b.S
index 6cbe5f1fca..8e81f956df 100644
--- a/tests/tcg/xtensa/test_b.S
+++ b/tests/tcg/xtensa/test_b.S
@@ -1,4 +1,4 @@
-.include "macros.inc"
+#include "macros.inc"
 
 test_suite b
 
diff --git a/tests/tcg/xtensa/test_bi.S b/tests/tcg/xtensa/test_bi.S
index 6a5f1dffc9..4f94c0c7e6 100644
--- a/tests/tcg/xtensa/test_bi.S
+++ b/tests/tcg/xtensa/test_bi.S
@@ -1,4 +1,4 @@
-.include "macros.inc"
+#include "macros.inc"
 
 test_suite bi
 
diff --git a/tests/tcg/xtensa/test_boolean.S b/tests/tcg/xtensa/test_boolean.S
index 50e6d2c22a..eac40e0973 100644
--- a/tests/tcg/xtensa/test_boolean.S
+++ b/tests/tcg/xtensa/test_boolean.S
@@ -1,4 +1,4 @@
-.include "macros.inc"
+#include "macros.inc"
 
 test_suite boolean
 
diff --git a/tests/tcg/xtensa/test_break.S b/tests/tcg/xtensa/test_break.S
index 7574cbefc8..775cd7c260 100644
--- a/tests/tcg/xtensa/test_break.S
+++ b/tests/tcg/xtensa/test_break.S
@@ -1,4 +1,4 @@
-.include "macros.inc"
+#include "macros.inc"
 
 #define debug_level 6
 #define debug_vector level6
diff --git a/tests/tcg/xtensa/test_bz.S b/tests/tcg/xtensa/test_bz.S
index f9ba6e22e8..b68135011e 100644
--- a/tests/tcg/xtensa/test_bz.S
+++ b/tests/tcg/xtensa/test_bz.S
@@ -1,4 +1,4 @@
-.include "macros.inc"
+#include "macros.inc"
 
 test_suite bz
 
diff --git a/tests/tcg/xtensa/test_cache.S b/tests/tcg/xtensa/test_cache.S
new file mode 100644
index 0000000000..6b2df9734b
--- /dev/null
+++ b/tests/tcg/xtensa/test_cache.S
@@ -0,0 +1,97 @@
+#include "macros.inc"
+
+.purgem test_init
+.macro test_init
+    call0   cache_unlock_invalidate
+.endm
+
+test_suite cache
+
+.macro      pf_op op
+    \op     a2, 0
+    \op     a3, 0
+    \op     a4, 0
+.endm
+
+test prefetch
+    movi    a2, 0xd0000000 /* cacheable */
+    movi    a3, 0xd8000000 /* non-cacheable */
+    movi    a4, 0x00001235 /* unmapped */
+
+    pf_op   dpfr
+    pf_op   dpfro
+    pf_op   dpfw
+    pf_op   dpfwo
+    pf_op   ipf
+
+    dpfl    a2, 0
+    ipfl    a2, 0
+test_end
+
+.macro cache_fault op, addr, exc_code
+    set_vector kernel, 2f
+
+    movi    a4, \addr
+1:
+    \op     a4, 0
+    test_fail
+2:
+    rsr     a2, epc1
+    movi    a3, 1b
+    assert  eq, a2, a3
+    rsr     a2, excvaddr
+    assert  eq, a2, a4
+    rsr     a2, exccause
+    movi    a3, \exc_code
+    assert  eq, a2, a3
+.endm
+
+test dpfl_tlb_miss
+    cache_fault dpfl, 0x00002345, 24
+test_end
+
+test dhwb_tlb_miss
+    cache_fault dhwb, 0x00002345, 24
+test_end
+
+test dhwbi_tlb_miss
+    cache_fault dhwbi, 0x00002345, 24
+test_end
+
+test dhi_tlb_miss
+    cache_fault dhi, 0x00002345, 24
+test_end
+
+test dhu_tlb_miss
+    cache_fault dhu, 0x00002345, 24
+test_end
+
+
+test ipfl_tlb_miss
+    cache_fault ipfl, 0x00002345, 16
+test_end
+
+test ihu_tlb_miss
+    cache_fault ihu, 0x00002345, 16
+test_end
+
+test ihi_tlb_miss
+    cache_fault ihi, 0x00002345, 16
+test_end
+
+test_suite_end
+
+.macro cache_all op1, op2, size, linesize
+    movi    a2, 0
+    movi    a3, \size
+1:
+    \op1    a2, 0
+    \op2    a2, 0
+    addi    a2, a2, \linesize
+    bltu    a2, a3, 1b
+.endm
+
+cache_unlock_invalidate:
+    cache_all diu, dii, XCHAL_DCACHE_SIZE, XCHAL_DCACHE_LINESIZE
+    cache_all iiu, iii, XCHAL_ICACHE_SIZE, XCHAL_ICACHE_LINESIZE
+    ret
diff --git a/tests/tcg/xtensa/test_clamps.S b/tests/tcg/xtensa/test_clamps.S
index c186cc98d8..3efabfd9d3 100644
--- a/tests/tcg/xtensa/test_clamps.S
+++ b/tests/tcg/xtensa/test_clamps.S
@@ -1,4 +1,4 @@
-.include "macros.inc"
+#include "macros.inc"
 
 test_suite clamps
 
diff --git a/tests/tcg/xtensa/test_extui.S b/tests/tcg/xtensa/test_extui.S
index 5d55451704..c32bb824df 100644
--- a/tests/tcg/xtensa/test_extui.S
+++ b/tests/tcg/xtensa/test_extui.S
@@ -1,4 +1,4 @@
-.include "macros.inc"
+#include "macros.inc"
 
 test_suite extui
 
diff --git a/tests/tcg/xtensa/test_fail.S b/tests/tcg/xtensa/test_fail.S
index e8d1b425bc..1c26d50790 100644
--- a/tests/tcg/xtensa/test_fail.S
+++ b/tests/tcg/xtensa/test_fail.S
@@ -1,4 +1,4 @@
-.include "macros.inc"
+#include "macros.inc"
 
 test_suite fail
 
diff --git a/tests/tcg/xtensa/test_interrupt.S b/tests/tcg/xtensa/test_interrupt.S
index 68b3ee1492..334ddab287 100644
--- a/tests/tcg/xtensa/test_interrupt.S
+++ b/tests/tcg/xtensa/test_interrupt.S
@@ -1,4 +1,4 @@
-.include "macros.inc"
+#include "macros.inc"
 
 test_suite interrupt
 
diff --git a/tests/tcg/xtensa/test_loop.S b/tests/tcg/xtensa/test_loop.S
index 1c240e8e9b..5755578d01 100644
--- a/tests/tcg/xtensa/test_loop.S
+++ b/tests/tcg/xtensa/test_loop.S
@@ -1,4 +1,4 @@
-.include "macros.inc"
+#include "macros.inc"
 
 test_suite loop
 
diff --git a/tests/tcg/xtensa/test_mac16.S b/tests/tcg/xtensa/test_mac16.S
index 5ddd160ffc..512025d842 100644
--- a/tests/tcg/xtensa/test_mac16.S
+++ b/tests/tcg/xtensa/test_mac16.S
@@ -1,4 +1,4 @@
-.include "macros.inc"
+#include "macros.inc"
 
 test_suite mac16
 
diff --git a/tests/tcg/xtensa/test_max.S b/tests/tcg/xtensa/test_max.S
index 2534c9d90b..3caa207ea5 100644
--- a/tests/tcg/xtensa/test_max.S
+++ b/tests/tcg/xtensa/test_max.S
@@ -1,4 +1,4 @@
-.include "macros.inc"
+#include "macros.inc"
 
 test_suite max
 
diff --git a/tests/tcg/xtensa/test_min.S b/tests/tcg/xtensa/test_min.S
index 6d9ddeb1ac..551cf591e5 100644
--- a/tests/tcg/xtensa/test_min.S
+++ b/tests/tcg/xtensa/test_min.S
@@ -1,4 +1,4 @@
-.include "macros.inc"
+#include "macros.inc"
 
 test_suite min
 
diff --git a/tests/tcg/xtensa/test_mmu.S b/tests/tcg/xtensa/test_mmu.S
index 5d87fbb703..099031fd14 100644
--- a/tests/tcg/xtensa/test_mmu.S
+++ b/tests/tcg/xtensa/test_mmu.S
@@ -1,10 +1,10 @@
-.include "macros.inc"
+#include "macros.inc"
 
 test_suite mmu
 
-.purgem test
+.purgem test_init
 
-.macro test name
+.macro test_init
     movi    a2, 0x00000004
     idtlb   a2
     movi    a2, 0x00100004
diff --git a/tests/tcg/xtensa/test_mul16.S b/tests/tcg/xtensa/test_mul16.S
index bf94376649..98fa7042b5 100644
--- a/tests/tcg/xtensa/test_mul16.S
+++ b/tests/tcg/xtensa/test_mul16.S
@@ -1,4 +1,4 @@
-.include "macros.inc"
+#include "macros.inc"
 
 test_suite mul16
 
diff --git a/tests/tcg/xtensa/test_mul32.S b/tests/tcg/xtensa/test_mul32.S
index fdaf57331b..b288ead9f6 100644
--- a/tests/tcg/xtensa/test_mul32.S
+++ b/tests/tcg/xtensa/test_mul32.S
@@ -1,4 +1,4 @@
-.include "macros.inc"
+#include "macros.inc"
 
 test_suite mul32
 
diff --git a/tests/tcg/xtensa/test_nsa.S b/tests/tcg/xtensa/test_nsa.S
index a5fe5debe4..479b2e2429 100644
--- a/tests/tcg/xtensa/test_nsa.S
+++ b/tests/tcg/xtensa/test_nsa.S
@@ -1,4 +1,4 @@
-.include "macros.inc"
+#include "macros.inc"
 
 test_suite nsa
 
diff --git a/tests/tcg/xtensa/test_pipeline.S b/tests/tcg/xtensa/test_pipeline.S
index 6be6085fc3..f418c11974 100644
--- a/tests/tcg/xtensa/test_pipeline.S
+++ b/tests/tcg/xtensa/test_pipeline.S
@@ -1,4 +1,4 @@
-.include "macros.inc"
+#include "macros.inc"
 
 .purgem test
 .macro test name
diff --git a/tests/tcg/xtensa/test_quo.S b/tests/tcg/xtensa/test_quo.S
index 12debf1fe0..5b3ae383d0 100644
--- a/tests/tcg/xtensa/test_quo.S
+++ b/tests/tcg/xtensa/test_quo.S
@@ -1,4 +1,4 @@
-.include "macros.inc"
+#include "macros.inc"
 
 test_suite quo
 
diff --git a/tests/tcg/xtensa/test_rem.S b/tests/tcg/xtensa/test_rem.S
index bb0d5fe202..6357e520d9 100644
--- a/tests/tcg/xtensa/test_rem.S
+++ b/tests/tcg/xtensa/test_rem.S
@@ -1,4 +1,4 @@
-.include "macros.inc"
+#include "macros.inc"
 
 test_suite rem
 
diff --git a/tests/tcg/xtensa/test_rst0.S b/tests/tcg/xtensa/test_rst0.S
index 3eda565e8a..a73366b120 100644
--- a/tests/tcg/xtensa/test_rst0.S
+++ b/tests/tcg/xtensa/test_rst0.S
@@ -1,4 +1,4 @@
-.include "macros.inc"
+#include "macros.inc"
 
 test_suite rst0
 
diff --git a/tests/tcg/xtensa/test_s32c1i.S b/tests/tcg/xtensa/test_s32c1i.S
index 4536015a84..93b575db95 100644
--- a/tests/tcg/xtensa/test_s32c1i.S
+++ b/tests/tcg/xtensa/test_s32c1i.S
@@ -1,4 +1,4 @@
-.include "macros.inc"
+#include "macros.inc"
 
 test_suite s32c1i
 
diff --git a/tests/tcg/xtensa/test_sar.S b/tests/tcg/xtensa/test_sar.S
index 40c649ffb8..b615a55767 100644
--- a/tests/tcg/xtensa/test_sar.S
+++ b/tests/tcg/xtensa/test_sar.S
@@ -1,4 +1,4 @@
-.include "macros.inc"
+#include "macros.inc"
 
 test_suite sar
 
diff --git a/tests/tcg/xtensa/test_sext.S b/tests/tcg/xtensa/test_sext.S
index 04dc6500c1..087a6333a4 100644
--- a/tests/tcg/xtensa/test_sext.S
+++ b/tests/tcg/xtensa/test_sext.S
@@ -1,4 +1,4 @@
-.include "macros.inc"
+#include "macros.inc"
 
 test_suite sext
 
diff --git a/tests/tcg/xtensa/test_shift.S b/tests/tcg/xtensa/test_shift.S
index a8e43645b7..5df9ed4b1e 100644
--- a/tests/tcg/xtensa/test_shift.S
+++ b/tests/tcg/xtensa/test_shift.S
@@ -1,4 +1,4 @@
-.include "macros.inc"
+#include "macros.inc"
 
 test_suite shift
 
diff --git a/tests/tcg/xtensa/test_sr.S b/tests/tcg/xtensa/test_sr.S
index 470c03dae2..4fac46e80f 100644
--- a/tests/tcg/xtensa/test_sr.S
+++ b/tests/tcg/xtensa/test_sr.S
@@ -1,4 +1,4 @@
-.include "macros.inc"
+#include "macros.inc"
 
 test_suite sr
 
diff --git a/tests/tcg/xtensa/test_timer.S b/tests/tcg/xtensa/test_timer.S
index 1041cc6658..f8c6f7423a 100644
--- a/tests/tcg/xtensa/test_timer.S
+++ b/tests/tcg/xtensa/test_timer.S
@@ -1,4 +1,4 @@
-.include "macros.inc"
+#include "macros.inc"
 
 test_suite timer
 
diff --git a/tests/tcg/xtensa/test_windowed.S b/tests/tcg/xtensa/test_windowed.S
index cb2d39e1fd..3de6d3763a 100644
--- a/tests/tcg/xtensa/test_windowed.S
+++ b/tests/tcg/xtensa/test_windowed.S
@@ -1,4 +1,4 @@
-.include "macros.inc"
+#include "macros.inc"
 
 test_suite windowed