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authorDavid Gibson <david@gibson.dropbear.id.au>2017-03-02 15:29:31 +1100
committerDavid Gibson <david@gibson.dropbear.id.au>2017-03-03 11:30:59 +1100
commiteaa477ca4ef59eed2c77d81937b981ff823def3b (patch)
tree0c4b5ca3f918767844e76fcda701cc137f71106b /tests
parent9c60766887c647df7193463f7a2075e8993b514c (diff)
downloadqemu-eaa477ca4ef59eed2c77d81937b981ff823def3b.tar.gz
powernv: Don't test POWER9 CPU yet
A couple of tests for the work-in-progress 'powernv' machine type attempt to test on POWER9 CPUs. However the POWER9 CPU support is incomplete and this doesn't really work. In particular the firmware image we have currently assumes the presence of the SDR1 register, which no longer exists on POWER9. We only got away with this so far, because of a different bug which added SDR1 to POWER9 even though it shouldn't be there. For now, remove POWER9 testing of powernv, POWER8 testing will do for now until the POWER9 support is more complete. Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'tests')
-rw-r--r--tests/boot-serial-test.c2
-rw-r--r--tests/pnv-xscom-test.c5
2 files changed, 5 insertions, 2 deletions
diff --git a/tests/boot-serial-test.c b/tests/boot-serial-test.c
index 44c82e5110..57edf6af33 100644
--- a/tests/boot-serial-test.c
+++ b/tests/boot-serial-test.c
@@ -29,7 +29,7 @@ static testdef_t tests[] = {
{ "ppc64", "ppce500", "", "U-Boot" },
{ "ppc64", "prep", "", "Open Hack'Ware BIOS" },
{ "ppc64", "pseries", "", "Open Firmware" },
- { "ppc64", "powernv", "-cpu POWER9", "SkiBoot" },
+ { "ppc64", "powernv", "-cpu POWER8", "SkiBoot" },
{ "i386", "isapc", "-cpu qemu32 -device sga", "SGABIOS" },
{ "i386", "pc", "-device sga", "SGABIOS" },
{ "i386", "q35", "-device sga", "SGABIOS" },
diff --git a/tests/pnv-xscom-test.c b/tests/pnv-xscom-test.c
index 5951da16cd..5adc3fd3a9 100644
--- a/tests/pnv-xscom-test.c
+++ b/tests/pnv-xscom-test.c
@@ -41,7 +41,9 @@ static const PnvChip pnv_chips[] = {
.xscom_core_base = 0x10000000ull,
.cfam_id = 0x120d304980000000ull,
.first_core = 0x1,
- }, {
+ },
+#if 0 /* POWER9 support is not ready yet */
+ {
.chip_type = PNV_CHIP_POWER9,
.cpu_model = "POWER9",
.xscom_base = 0x000603fc00000000ull,
@@ -49,6 +51,7 @@ static const PnvChip pnv_chips[] = {
.cfam_id = 0x100d104980000000ull,
.first_core = 0x20,
},
+#endif
};
static uint64_t pnv_xscom_addr(const PnvChip *chip, uint32_t pcba)