diff options
| author | Richard Henderson <rth@twiddle.net> | 2016-06-23 20:34:33 -0700 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2016-08-05 21:44:40 +0530 |
| commit | 5a18407f55ade924aa6397c9a043a9ffd59645fe (patch) | |
| tree | 9d90c54eca81527f3f423e2daf7b29eccc32a35e /util | |
| parent | c0ef05b5e62ab0c291a94022f14104e61e306f03 (diff) | |
| download | qemu-5a18407f55ade924aa6397c9a043a9ffd59645fe.tar.gz | |
tcg: Lower indirect registers in a separate pass
Rather than rely on recursion during the middle of register allocation,
lower indirect registers to loads and stores off the indirect base into
plain temps.
For an x86_64 host, with sufficient registers, this results in identical
code, modulo the actual register assignments.
For an i686 host, with insufficient registers, this means that temps can
be (temporarily) spilled to the stack in order to satisfy an allocation.
This as opposed to the possibility of not being able to spill, to allocate
a register for the indirect base, in order to perform a spill.
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'util')
| -rw-r--r-- | util/log.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/util/log.c b/util/log.c index 9f0844481c..54b54e868a 100644 --- a/util/log.c +++ b/util/log.c @@ -247,8 +247,9 @@ const QEMULogItem qemu_log_items[] = { { CPU_LOG_TB_OP, "op", "show micro ops for each compiled TB" }, { CPU_LOG_TB_OP_OPT, "op_opt", - "show micro ops (x86 only: before eflags optimization) and\n" - "after liveness analysis" }, + "show micro ops after optimization" }, + { CPU_LOG_TB_OP_IND, "op_ind", + "show micro ops before indirect lowering" }, { CPU_LOG_INT, "int", "show interrupts/exceptions in short format" }, { CPU_LOG_EXEC, "exec", |