Unify IRQ handling.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2635 c046a42c-6fe2-441c-8c8c-71466251a162

1 files changed, 59 insertions, 64 deletions

diff --git a/vl.h b/vl.h
index eb87a511ad..2f87946e87 100644
--- a/vl.h
+++ b/vl.h
@@ -709,7 +709,6 @@ typedef struct QEMUMachine {
 int qemu_register_machine(QEMUMachine *m);
 
 typedef void SetIRQFunc(void *opaque, int irq_num, int level);
-typedef void IRQRequestFunc(void *opaque, int level);
 
 #if defined(TARGET_PPC)
 void ppc_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...));
@@ -719,6 +718,8 @@ void ppc_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...));
 void mips_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...));
 #endif
 
+#include "hw/irq.h"
+
 /* ISA bus */
 
 extern target_phys_addr_t isa_mem_base;
@@ -791,6 +792,9 @@ struct PCIDevice {
     /* ??? This is a PC-specific hack, and should be removed.  */
     int irq_index;
 
+    /* IRQ objects for the INTA-INTD pins.  */
+    qemu_irq *irq;
+
     /* Current IRQ levels.  Used internally by the generic PCI code.  */
     int irq_state[4];
 };
@@ -804,8 +808,6 @@ void pci_register_io_region(PCIDevice *pci_dev, int region_num,
                             uint32_t size, int type, 
                             PCIMapIORegionFunc *map_func);
 
-void pci_set_irq(PCIDevice *pci_dev, int irq_num, int level);
-
 uint32_t pci_default_read_config(PCIDevice *d, 
                                  uint32_t address, int len);
 void pci_default_write_config(PCIDevice *d, 
@@ -813,10 +815,10 @@ void pci_default_write_config(PCIDevice *d,
 void pci_device_save(PCIDevice *s, QEMUFile *f);
 int pci_device_load(PCIDevice *s, QEMUFile *f);
 
-typedef void (*pci_set_irq_fn)(void *pic, int irq_num, int level);
+typedef void (*pci_set_irq_fn)(qemu_irq *pic, int irq_num, int level);
 typedef int (*pci_map_irq_fn)(PCIDevice *pci_dev, int irq_num);
 PCIBus *pci_register_bus(pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
-                         void *pic, int devfn_min, int nirq);
+                         qemu_irq *pic, int devfn_min, int nirq);
 
 void pci_nic_init(PCIBus *bus, NICInfo *nd, int devfn);
 void pci_data_write(void *opaque, uint32_t addr, uint32_t val, int len);
@@ -829,22 +831,22 @@ PCIBus *pci_bridge_init(PCIBus *bus, int devfn, uint32_t id,
                         pci_map_irq_fn map_irq, const char *name);
 
 /* prep_pci.c */
-PCIBus *pci_prep_init(void);
+PCIBus *pci_prep_init(qemu_irq *pic);
 
 /* grackle_pci.c */
-PCIBus *pci_grackle_init(uint32_t base, void *pic);
+PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic);
 
 /* unin_pci.c */
-PCIBus *pci_pmac_init(void *pic);
+PCIBus *pci_pmac_init(qemu_irq *pic);
 
 /* apb_pci.c */
 PCIBus *pci_apb_init(target_ulong special_base, target_ulong mem_base,
-                     void *pic);
+                     qemu_irq *pic);
 
-PCIBus *pci_vpb_init(void *pic, int irq, int realview);
+PCIBus *pci_vpb_init(qemu_irq *pic, int irq, int realview);
 
 /* piix_pci.c */
-PCIBus *i440fx_init(PCIDevice **pi440fx_state);
+PCIBus *i440fx_init(PCIDevice **pi440fx_state, qemu_irq *pic);
 void i440fx_set_smm(PCIDevice *d, int val);
 int piix3_init(PCIBus *bus, int devfn);
 void i440fx_init_memory_mappings(PCIDevice *d);
@@ -852,7 +854,6 @@ void i440fx_init_memory_mappings(PCIDevice *d);
 int piix4_init(PCIBus *bus, int devfn);
 
 /* openpic.c */
-typedef struct openpic_t openpic_t;
 enum {
     OPENPIC_EVT_INT = 0, /* IRQ                       */
     OPENPIC_EVT_CINT,    /* critical IRQ              */
@@ -860,18 +861,15 @@ enum {
     OPENPIC_EVT_DEBUG,   /* Inconditional debug event */
     OPENPIC_EVT_RESET,   /* Core reset event          */
 };
-void openpic_set_irq(void *opaque, int n_IRQ, int level);
-openpic_t *openpic_init (PCIBus *bus, SetIRQFunc *set_irq,
-                         int *pmem_index, int nb_cpus,
-                         struct CPUState **envp);
+qemu_irq *openpic_init (PCIBus *bus, SetIRQFunc *set_irq,
+                        int *pmem_index, int nb_cpus,
+                        struct CPUState **envp);
 
 /* heathrow_pic.c */
-typedef struct HeathrowPICS HeathrowPICS;
-void heathrow_pic_set_irq(void *opaque, int num, int level);
-HeathrowPICS *heathrow_pic_init(int *pmem_index);
+qemu_irq *heathrow_pic_init(int *pmem_index);
 
 /* gt64xxx.c */
-PCIBus *pci_gt64120_init(void *pic);
+PCIBus *pci_gt64120_init(qemu_irq *pic);
 
 #ifdef HAS_AUDIO
 struct soundhw {
@@ -880,7 +878,7 @@ struct soundhw {
     int enabled;
     int isa;
     union {
-        int (*init_isa) (AudioState *s);
+        int (*init_isa) (AudioState *s, qemu_irq *pic);
         int (*init_pci) (PCIBus *bus, AudioState *s);
     } init;
 };
@@ -958,13 +956,13 @@ extern uint8_t _translate_keycode(const int key);
 extern BlockDriverState *bs_table[MAX_DISKS + 1];
 extern BlockDriverState *sd_bdrv;
 
-void isa_ide_init(int iobase, int iobase2, int irq,
+void isa_ide_init(int iobase, int iobase2, qemu_irq irq,
                   BlockDriverState *hd0, BlockDriverState *hd1);
 void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table,
                          int secondary_ide_enabled);
-void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn);
-int pmac_ide_init (BlockDriverState **hd_table,
-                   SetIRQFunc *set_irq, void *irq_opaque, int irq);
+void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn,
+                        qemu_irq *pic);
+int pmac_ide_init (BlockDriverState **hd_table, qemu_irq irq);
 
 /* cdrom.c */
 int cdrom_read_toc(int nb_sectors, uint8_t *buf, int msf, int start_track);
@@ -978,13 +976,13 @@ ds1225y_t *ds1225y_init(target_ulong mem_base, const char *filename);
 int es1370_init (PCIBus *bus, AudioState *s);
 
 /* sb16.c */
-int SB16_init (AudioState *s);
+int SB16_init (AudioState *s, qemu_irq *pic);
 
 /* adlib.c */
-int Adlib_init (AudioState *s);
+int Adlib_init (AudioState *s, qemu_irq *pic);
 
 /* gus.c */
-int GUS_init (AudioState *s);
+int GUS_init (AudioState *s, qemu_irq *pic);
 
 /* dma.c */
 typedef int (*DMA_transfer_handler) (void *opaque, int nchan, int pos, int size);
@@ -1005,7 +1003,7 @@ extern BlockDriverState *fd_table[MAX_FD];
 
 typedef struct fdctrl_t fdctrl_t;
 
-fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped, 
+fdctrl_t *fdctrl_init (qemu_irq irq, int dma_chann, int mem_mapped, 
                        uint32_t io_base,
                        BlockDriverState **fds);
 int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num);
@@ -1018,7 +1016,7 @@ void pci_i82559er_init(PCIBus *bus, NICInfo *nd, int devfn);
 
 /* ne2000.c */
 
-void isa_ne2000_init(int base, int irq, NICInfo *nd);
+void isa_ne2000_init(int base, qemu_irq irq, NICInfo *nd);
 void pci_ne2000_init(PCIBus *bus, NICInfo *nd, int devfn);
 
 /* rtl8139.c */
@@ -1029,31 +1027,29 @@ void pci_rtl8139_init(PCIBus *bus, NICInfo *nd, int devfn);
 
 void pci_pcnet_init(PCIBus *bus, NICInfo *nd, int devfn);
 void pcnet_h_reset(void *opaque);
-void *lance_init(NICInfo *nd, uint32_t leaddr, void *dma_opaque);
+void *lance_init(NICInfo *nd, uint32_t leaddr, void *dma_opaque, qemu_irq irq);
 
 /* vmmouse.c */
 void *vmmouse_init(void *m);
 
 /* pckbd.c */
 
-void kbd_init(void);
+void i8042_init(qemu_irq kdb_irq, qemu_irq mouse_irq, uint32_t io_base);
 
 /* mc146818rtc.c */
 
 typedef struct RTCState RTCState;
 
-RTCState *rtc_init(int base, int irq);
+RTCState *rtc_init(int base, qemu_irq irq);
 void rtc_set_memory(RTCState *s, int addr, int val);
 void rtc_set_date(RTCState *s, const struct tm *tm);
 
 /* serial.c */
 
 typedef struct SerialState SerialState;
-SerialState *serial_init(SetIRQFunc *set_irq, void *opaque,
-                         int base, int irq, CharDriverState *chr);
-SerialState *serial_mm_init (SetIRQFunc *set_irq, void *opaque,
-                             target_ulong base, int it_shift,
-                             int irq, CharDriverState *chr,
+SerialState *serial_init(int base, qemu_irq irq, CharDriverState *chr);
+SerialState *serial_mm_init (target_ulong base, int it_shift,
+                             qemu_irq irq, CharDriverState *chr,
                              int ioregister);
 uint32_t serial_mm_readb (void *opaque, target_phys_addr_t addr);
 void serial_mm_writeb (void *opaque, target_phys_addr_t addr, uint32_t value);
@@ -1065,7 +1061,7 @@ void serial_mm_writel (void *opaque, target_phys_addr_t addr, uint32_t value);
 /* parallel.c */
 
 typedef struct ParallelState ParallelState;
-ParallelState *parallel_init(int base, int irq, CharDriverState *chr);
+ParallelState *parallel_init(int base, qemu_irq irq, CharDriverState *chr);
 
 /* i8259.c */
 
@@ -1073,7 +1069,7 @@ typedef struct PicState2 PicState2;
 extern PicState2 *isa_pic;
 void pic_set_irq(int irq, int level);
 void pic_set_irq_new(void *opaque, int irq, int level);
-PicState2 *pic_init(IRQRequestFunc *irq_request, void *irq_request_opaque);
+qemu_irq *i8259_init(qemu_irq parent_irq);
 void pic_set_alt_irq_func(PicState2 *s, SetIRQFunc *alt_irq_func,
                           void *alt_irq_opaque);
 int pic_read_irq(PicState2 *s);
@@ -1096,7 +1092,7 @@ void ioapic_set_irq(void *opaque, int vector, int level);
 
 typedef struct PITState PITState;
 
-PITState *pit_init(int base, int irq);
+PITState *pit_init(int base, qemu_irq irq);
 void pit_set_gate(PITState *pit, int channel, int val);
 int pit_get_gate(PITState *pit, int channel);
 int pit_get_initial_count(PITState *pit, int channel);
@@ -1105,7 +1101,7 @@ int pit_get_out(PITState *pit, int channel, int64_t current_time);
 
 /* pcspk.c */
 void pcspk_init(PITState *);
-int pcspk_audio_init(AudioState *);
+int pcspk_audio_init(AudioState *, qemu_irq *pic);
 
 #include "hw/smbus.h"
 
@@ -1138,7 +1134,7 @@ extern QEMUMachine mips_machine;
 extern QEMUMachine mips_malta_machine;
 
 /* mips_int */
-extern void cpu_mips_irq_request(void *opaque, int irq, int level);
+extern void cpu_mips_irq_init_cpu(CPUState *env);
 
 /* mips_timer.c */
 extern void cpu_mips_clock_init(CPUState *);
@@ -1149,7 +1145,7 @@ extern QEMUMachine shix_machine;
 
 #ifdef TARGET_PPC
 /* PowerPC hardware exceptions management helpers */
-void ppc_set_irq (void *opaque, int n_IRQ, int level);
+void cpu_ppc_irq_init_cpu(CPUState *env);
 void ppc_openpic_irq (void *opaque, int n_IRQ, int level);
 int ppc_hw_interrupt (CPUState *env);
 ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq);
@@ -1188,12 +1184,11 @@ void tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base,
 /* slavio_intctl.c */
 void pic_set_irq_cpu(void *opaque, int irq, int level, unsigned int cpu);
 void *slavio_intctl_init(uint32_t addr, uint32_t addrg,
-                         const uint32_t *intbit_to_level);
+                         const uint32_t *intbit_to_level,
+                         qemu_irq **irq);
 void slavio_intctl_set_cpu(void *opaque, unsigned int cpu, CPUState *env);
 void slavio_pic_info(void *opaque);
 void slavio_irq_info(void *opaque);
-void slavio_pic_set_irq(void *opaque, int irq, int level);
-void slavio_pic_set_irq_cpu(void *opaque, int irq, int level, unsigned int cpu);
 
 /* loader.c */
 int get_image_size(const char *filename);
@@ -1208,12 +1203,12 @@ void slavio_timer_init(uint32_t addr, int irq, int mode, unsigned int cpu,
                        void *intctl);
 
 /* slavio_serial.c */
-SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1,
-                                CharDriverState *chr2, void *intctl);
-void slavio_serial_ms_kbd_init(int base, int irq, void *intctl);
+SerialState *slavio_serial_init(int base, qemu_irq irq, CharDriverState *chr1,
+                                CharDriverState *chr2);
+void slavio_serial_ms_kbd_init(int base, qemu_irq);
 
 /* slavio_misc.c */
-void *slavio_misc_init(uint32_t base, int irq, void *intctl);
+void *slavio_misc_init(uint32_t base, qemu_irq irq);
 void slavio_set_power_fail(void *opaque, int power_failing);
 
 /* esp.c */
@@ -1222,8 +1217,8 @@ void *esp_init(BlockDriverState **bd, uint32_t espaddr, void *dma_opaque);
 void esp_reset(void *opaque);
 
 /* sparc32_dma.c */
-void *sparc32_dma_init(uint32_t daddr, int espirq, int leirq, void *iommu,
-                       void *intctl);
+void *sparc32_dma_init(uint32_t daddr, qemu_irq espirq, qemu_irq leirq,
+                       void *iommu);
 void ledma_set_irq(void *opaque, int isr);
 void ledma_memory_read(void *opaque, target_phys_addr_t addr, 
                        uint8_t *buf, int len, int do_bswap);
@@ -1307,7 +1302,7 @@ void adb_mouse_init(ADBBusState *bus);
 /* cuda.c */
 
 extern ADBBusState adb_bus;
-int cuda_init(SetIRQFunc *set_irq, void *irq_opaque, int irq);
+int cuda_init(qemu_irq irq);
 
 #include "hw/usb.h"
 
@@ -1372,36 +1367,36 @@ void ps2_keyboard_set_translation(void *opaque, int mode);
 void ps2_mouse_fake_event(void *opaque);
 
 /* smc91c111.c */
-void smc91c111_init(NICInfo *, uint32_t, void *, int);
+void smc91c111_init(NICInfo *, uint32_t, qemu_irq);
 
 /* pl110.c */
-void *pl110_init(DisplayState *ds, uint32_t base, void *pic, int irq, int);
+void *pl110_init(DisplayState *ds, uint32_t base, qemu_irq irq, int);
 
 /* pl011.c */
-void pl011_init(uint32_t base, void *pic, int irq, CharDriverState *chr);
+void pl011_init(uint32_t base, qemu_irq irq, CharDriverState *chr);
 
 /* pl050.c */
-void pl050_init(uint32_t base, void *pic, int irq, int is_mouse);
+void pl050_init(uint32_t base, qemu_irq irq, int is_mouse);
 
 /* pl080.c */
-void *pl080_init(uint32_t base, void *pic, int irq, int nchannels);
+void *pl080_init(uint32_t base, qemu_irq irq, int nchannels);
 
 /* pl181.c */
 void pl181_init(uint32_t base, BlockDriverState *bd,
-                void *pic, int irq0, int irq1);
+                qemu_irq irq0, qemu_irq irq1);
 
 /* pl190.c */
-void *pl190_init(uint32_t base, void *parent, int irq, int fiq);
+qemu_irq *pl190_init(uint32_t base, qemu_irq irq, qemu_irq fiq);
 
 /* arm-timer.c */
-void sp804_init(uint32_t base, void *pic, int irq);
-void icp_pit_init(uint32_t base, void *pic, int irq);
+void sp804_init(uint32_t base, qemu_irq irq);
+void icp_pit_init(uint32_t base, qemu_irq *pic, int irq);
 
 /* arm_sysctl.c */
 void arm_sysctl_init(uint32_t base, uint32_t sys_id);
 
 /* arm_gic.c */
-void *arm_gic_init(uint32_t base, void *parent, int parent_irq);
+qemu_irq *arm_gic_init(uint32_t base, qemu_irq parent_irq);
 
 /* arm_boot.c */