diff options
| -rw-r--r-- | hw/pci-host/q35.c | 14 | ||||
| -rw-r--r-- | include/hw/pci/pcie_host.h | 1 |
2 files changed, 15 insertions, 0 deletions
diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c index e46f286e24..a051b58ba7 100644 --- a/hw/pci-host/q35.c +++ b/hw/pci-host/q35.c @@ -109,6 +109,16 @@ static void q35_host_get_pci_hole64_end(Object *obj, Visitor *v, visit_type_uint64(v, &w64.end, name, errp); } +static void q35_host_get_mmcfg_size(Object *obj, Visitor *v, + void *opaque, const char *name, + Error **errp) +{ + PCIExpressHost *e = PCIE_HOST_BRIDGE(obj); + uint32_t value = e->size; + + visit_type_uint32(v, &value, name, errp); +} + static Property mch_props[] = { DEFINE_PROP_UINT64(PCIE_HOST_MCFG_BASE, Q35PCIHost, parent_obj.base_addr, MCH_HOST_BRIDGE_PCIEXBAR_DEFAULT), @@ -160,6 +170,10 @@ static void q35_host_initfn(Object *obj) q35_host_get_pci_hole64_end, NULL, NULL, NULL, NULL); + object_property_add(obj, PCIE_HOST_MCFG_SIZE, "int", + q35_host_get_mmcfg_size, + NULL, NULL, NULL, NULL); + /* Leave enough space for the biggest MCFG BAR */ /* TODO: this matches current bios behaviour, but * it's not a power of two, which means an MTRR diff --git a/include/hw/pci/pcie_host.h b/include/hw/pci/pcie_host.h index 33d75bdcf6..acca45ed58 100644 --- a/include/hw/pci/pcie_host.h +++ b/include/hw/pci/pcie_host.h @@ -29,6 +29,7 @@ OBJECT_CHECK(PCIExpressHost, (obj), TYPE_PCIE_HOST_BRIDGE) #define PCIE_HOST_MCFG_BASE "MCFG" +#define PCIE_HOST_MCFG_SIZE "mcfg_size" /* pcie_host::base_addr == PCIE_BASE_ADDR_UNMAPPED when it isn't mapped. */ #define PCIE_BASE_ADDR_UNMAPPED ((hwaddr)-1ULL) |