diff options
| -rw-r--r-- | dma-helpers.c | 16 | ||||
| -rw-r--r-- | dma.h | 95 | ||||
| -rw-r--r-- | hw/pci.h | 21 |
3 files changed, 123 insertions, 9 deletions
diff --git a/dma-helpers.c b/dma-helpers.c index 7971a89c14..5265132edf 100644 --- a/dma-helpers.c +++ b/dma-helpers.c @@ -10,6 +10,22 @@ #include "dma.h" #include "trace.h" +int dma_memory_set(DMAContext *dma, dma_addr_t addr, uint8_t c, dma_addr_t len) +{ +#define FILLBUF_SIZE 512 + uint8_t fillbuf[FILLBUF_SIZE]; + int l; + + memset(fillbuf, c, FILLBUF_SIZE); + while (len > 0) { + l = len < FILLBUF_SIZE ? len : FILLBUF_SIZE; + cpu_physical_memory_rw(addr, fillbuf, l, true); + len -= len; + addr += len; + } + return 0; +} + void qemu_sglist_init(QEMUSGList *qsg, int alloc_hint) { qsg->sg = g_malloc(alloc_hint * sizeof(ScatterGatherEntry)); @@ -14,6 +14,7 @@ #include "hw/hw.h" #include "block.h" +typedef struct DMAContext DMAContext; typedef struct ScatterGatherEntry ScatterGatherEntry; typedef enum { @@ -34,6 +35,100 @@ typedef target_phys_addr_t dma_addr_t; #define DMA_ADDR_BITS TARGET_PHYS_ADDR_BITS #define DMA_ADDR_FMT TARGET_FMT_plx +/* Checks that the given range of addresses is valid for DMA. This is + * useful for certain cases, but usually you should just use + * dma_memory_{read,write}() and check for errors */ +static inline bool dma_memory_valid(DMAContext *dma, dma_addr_t addr, + dma_addr_t len, DMADirection dir) +{ + /* Stub version, with no iommu we assume all bus addresses are valid */ + return true; +} + +static inline int dma_memory_rw(DMAContext *dma, dma_addr_t addr, + void *buf, dma_addr_t len, DMADirection dir) +{ + /* Stub version when we have no iommu support */ + cpu_physical_memory_rw(addr, buf, (target_phys_addr_t)len, + dir == DMA_DIRECTION_FROM_DEVICE); + return 0; +} + +static inline int dma_memory_read(DMAContext *dma, dma_addr_t addr, + void *buf, dma_addr_t len) +{ + return dma_memory_rw(dma, addr, buf, len, DMA_DIRECTION_TO_DEVICE); +} + +static inline int dma_memory_write(DMAContext *dma, dma_addr_t addr, + const void *buf, dma_addr_t len) +{ + return dma_memory_rw(dma, addr, (void *)buf, len, + DMA_DIRECTION_FROM_DEVICE); +} + +int dma_memory_set(DMAContext *dma, dma_addr_t addr, uint8_t c, dma_addr_t len); + +static inline void *dma_memory_map(DMAContext *dma, + dma_addr_t addr, dma_addr_t *len, + DMADirection dir) +{ + target_phys_addr_t xlen = *len; + void *p; + + p = cpu_physical_memory_map(addr, &xlen, + dir == DMA_DIRECTION_FROM_DEVICE); + *len = xlen; + return p; +} + +static inline void dma_memory_unmap(DMAContext *dma, + void *buffer, dma_addr_t len, + DMADirection dir, dma_addr_t access_len) +{ + return cpu_physical_memory_unmap(buffer, (target_phys_addr_t)len, + dir == DMA_DIRECTION_FROM_DEVICE, + access_len); +} + +#define DEFINE_LDST_DMA(_lname, _sname, _bits, _end) \ + static inline uint##_bits##_t ld##_lname##_##_end##_dma(DMAContext *dma, \ + dma_addr_t addr) \ + { \ + uint##_bits##_t val; \ + dma_memory_read(dma, addr, &val, (_bits) / 8); \ + return _end##_bits##_to_cpu(val); \ + } \ + static inline void st##_sname##_##_end##_dma(DMAContext *dma, \ + dma_addr_t addr, \ + uint##_bits##_t val) \ + { \ + val = cpu_to_##_end##_bits(val); \ + dma_memory_write(dma, addr, &val, (_bits) / 8); \ + } + +static inline uint8_t ldub_dma(DMAContext *dma, dma_addr_t addr) +{ + uint8_t val; + + dma_memory_read(dma, addr, &val, 1); + return val; +} + +static inline void stb_dma(DMAContext *dma, dma_addr_t addr, uint8_t val) +{ + dma_memory_write(dma, addr, &val, 1); +} + +DEFINE_LDST_DMA(uw, w, 16, le); +DEFINE_LDST_DMA(l, l, 32, le); +DEFINE_LDST_DMA(q, q, 64, le); +DEFINE_LDST_DMA(uw, w, 16, be); +DEFINE_LDST_DMA(l, l, 32, be); +DEFINE_LDST_DMA(q, q, 64, be); + +#undef DEFINE_LDST_DMA + struct ScatterGatherEntry { dma_addr_t base; dma_addr_t len; @@ -560,10 +560,16 @@ static inline uint32_t pci_config_size(const PCIDevice *d) } /* DMA access functions */ +static inline DMAContext *pci_dma_context(PCIDevice *dev) +{ + /* Stub for when we have no PCI iommu support */ + return NULL; +} + static inline int pci_dma_rw(PCIDevice *dev, dma_addr_t addr, void *buf, dma_addr_t len, DMADirection dir) { - cpu_physical_memory_rw(addr, buf, len, dir == DMA_DIRECTION_FROM_DEVICE); + dma_memory_rw(pci_dma_context(dev), addr, buf, len, dir); return 0; } @@ -583,12 +589,12 @@ static inline int pci_dma_write(PCIDevice *dev, dma_addr_t addr, static inline uint##_bits##_t ld##_l##_pci_dma(PCIDevice *dev, \ dma_addr_t addr) \ { \ - return ld##_l##_phys(addr); \ + return ld##_l##_dma(pci_dma_context(dev), addr); \ } \ static inline void st##_s##_pci_dma(PCIDevice *dev, \ - dma_addr_t addr, uint##_bits##_t val) \ + dma_addr_t addr, uint##_bits##_t val) \ { \ - st##_s##_phys(addr, val); \ + st##_s##_dma(pci_dma_context(dev), addr, val); \ } PCI_DMA_DEFINE_LDST(ub, b, 8); @@ -604,19 +610,16 @@ PCI_DMA_DEFINE_LDST(q_be, q_be, 64); static inline void *pci_dma_map(PCIDevice *dev, dma_addr_t addr, dma_addr_t *plen, DMADirection dir) { - target_phys_addr_t len = *plen; void *buf; - buf = cpu_physical_memory_map(addr, &len, dir == DMA_DIRECTION_FROM_DEVICE); - *plen = len; + buf = dma_memory_map(pci_dma_context(dev), addr, plen, dir); return buf; } static inline void pci_dma_unmap(PCIDevice *dev, void *buffer, dma_addr_t len, DMADirection dir, dma_addr_t access_len) { - cpu_physical_memory_unmap(buffer, len, dir == DMA_DIRECTION_FROM_DEVICE, - access_len); + dma_memory_unmap(pci_dma_context(dev), buffer, len, dir, access_len); } static inline void pci_dma_sglist_init(QEMUSGList *qsg, PCIDevice *dev, |