diff options
| -rw-r--r-- | Makefile.target | 2 | ||||
| -rw-r--r-- | hw/boards.h | 4 | ||||
| -rw-r--r-- | hw/omap_sx1.c | 238 | ||||
| -rw-r--r-- | qemu-doc.texi | 22 | ||||
| -rw-r--r-- | target-arm/machine.c | 2 |
5 files changed, 267 insertions, 1 deletions
diff --git a/Makefile.target b/Makefile.target index 8c649bec78..8229b4f423 100644 --- a/Makefile.target +++ b/Makefile.target @@ -704,7 +704,7 @@ OBJS+= pflash_cfi01.o gumstix.o OBJS+= zaurus.o ide.o serial.o nand.o ecc.o spitz.o tosa.o tc6393xb.o OBJS+= omap1.o omap_lcdc.o omap_dma.o omap_clk.o omap_mmc.o omap_i2c.o OBJS+= omap2.o omap_dss.o soc_dma.o -OBJS+= palm.o tsc210x.o +OBJS+= omap_sx1.o palm.o tsc210x.o OBJS+= nseries.o blizzard.o onenand.o vga.o cbus.o tusb6010.o usb-musb.o OBJS+= tsc2005.o bt-hci-csr.o OBJS+= mst_fpga.o mainstone.o diff --git a/hw/boards.h b/hw/boards.h index d30c0fced9..a7b8126bbd 100644 --- a/hw/boards.h +++ b/hw/boards.h @@ -86,6 +86,10 @@ extern QEMUMachine spitzpda_machine; extern QEMUMachine borzoipda_machine; extern QEMUMachine terrierpda_machine; +/* omap_sx1.c */ +extern QEMUMachine sx1_machine_v1; +extern QEMUMachine sx1_machine_v2; + /* palm.c */ extern QEMUMachine palmte_machine; diff --git a/hw/omap_sx1.c b/hw/omap_sx1.c new file mode 100644 index 0000000000..df2b52ea54 --- /dev/null +++ b/hw/omap_sx1.c @@ -0,0 +1,238 @@ +/* omap_sx1.c Support for the Siemens SX1 smartphone emulation. + * + * Copyright (C) 2008 + * Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> + * Copyright (C) 2007 Vladimir Ananiev <vovan888@gmail.com> + * + * based on PalmOne's (TM) PDAs support (palm.c) + */ + +/* + * PalmOne's (TM) PDAs. + * + * Copyright (C) 2006-2007 Andrzej Zaborowski <balrog@zabor.org> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#include "hw.h" +#include "sysemu.h" +#include "console.h" +#include "omap.h" +#include "boards.h" +#include "arm-misc.h" +#include "flash.h" + +/*****************************************************************************/ +/* Siemens SX1 Cellphone V1 */ +/* - ARM OMAP310 processor + * - SRAM 192 kB + * - SDRAM 32 MB at 0x10000000 + * - Boot flash 16 MB at 0x00000000 + * - Application flash 8 MB at 0x04000000 + * - 3 serial ports + * - 1 SecureDigital + * - 1 LCD display + * - 1 RTC + */ + +/*****************************************************************************/ +/* Siemens SX1 Cellphone V2 */ +/* - ARM OMAP310 processor + * - SRAM 192 kB + * - SDRAM 32 MB at 0x10000000 + * - Boot flash 32 MB at 0x00000000 + * - 3 serial ports + * - 1 SecureDigital + * - 1 LCD display + * - 1 RTC + */ + +static uint32_t static_readb(void *opaque, target_phys_addr_t offset) +{ + uint32_t *val = (uint32_t *) opaque; + + return *val >> ((offset & 3) << 3); +} + +static uint32_t static_readh(void *opaque, target_phys_addr_t offset) +{ + uint32_t *val = (uint32_t *) opaque; + + return *val >> ((offset & 1) << 3); +} + +static uint32_t static_readw(void *opaque, target_phys_addr_t offset) +{ + uint32_t *val = (uint32_t *) opaque; + + return *val >> ((offset & 0) << 3); +} + +static void static_write(void *opaque, target_phys_addr_t offset, + uint32_t value) +{ +#ifdef SPY + printf("%s: value %08lx written at " PA_FMT "\n", + __FUNCTION__, value, offset); +#endif +} + +static CPUReadMemoryFunc *static_readfn[] = { + static_readb, + static_readh, + static_readw, +}; + +static CPUWriteMemoryFunc *static_writefn[] = { + static_write, + static_write, + static_write, +}; + +#define sdram_size 0x02000000 +#define sector_size (128 * 1024) +#define flash0_size (16 * 1024 * 1024) +#define flash1_size ( 8 * 1024 * 1024) +#define flash2_size (32 * 1024 * 1024) +#define total_ram_v1 (sdram_size + flash0_size + flash1_size + OMAP15XX_SRAM_SIZE) +#define total_ram_v2 (sdram_size + flash2_size + OMAP15XX_SRAM_SIZE) + +static struct arm_boot_info sx1_binfo = { + .loader_start = OMAP_EMIFF_BASE, + .ram_size = sdram_size, + .board_id = 0x265, +}; + +static void sx1_init(ram_addr_t ram_size, int vga_ram_size, + const char *boot_device, DisplayState *ds, + const char *kernel_filename, const char *kernel_cmdline, + const char *initrd_filename, const char *cpu_model, + const int version) +{ + struct omap_mpu_state_s *cpu; + int io; + static uint32_t cs0val = 0x00213090; + static uint32_t cs1val = 0x00215070; + static uint32_t cs2val = 0x00001139; + static uint32_t cs3val = 0x00001139; + ram_addr_t phys_flash; + int index; + int fl_idx; + uint32_t flash_size = flash0_size; + + if (version == 2) { + flash_size = flash2_size; + } + + cpu = omap310_mpu_init(sx1_binfo.ram_size, ds, cpu_model); + + /* External Flash (EMIFS) */ + cpu_register_physical_memory(OMAP_CS0_BASE, flash_size, + (phys_flash = qemu_ram_alloc(flash_size)) | IO_MEM_ROM); + + io = cpu_register_io_memory(0, static_readfn, static_writefn, &cs0val); + cpu_register_physical_memory(OMAP_CS0_BASE + flash_size, + OMAP_CS0_SIZE - flash_size, io); + io = cpu_register_io_memory(0, static_readfn, static_writefn, &cs2val); + cpu_register_physical_memory(OMAP_CS2_BASE, OMAP_CS2_SIZE, io); + io = cpu_register_io_memory(0, static_readfn, static_writefn, &cs3val); + cpu_register_physical_memory(OMAP_CS3_BASE, OMAP_CS3_SIZE, io); + + fl_idx = 0; + + if ((index = drive_get_index(IF_PFLASH, 0, fl_idx)) > -1) { + if (!pflash_cfi01_register(OMAP_CS0_BASE, qemu_ram_alloc(flash_size), + drives_table[index].bdrv, sector_size, flash_size / sector_size, + 4, 0, 0, 0, 0)) { + fprintf(stderr, "qemu: Error registering flash memory %d.\n", + fl_idx); + } + fl_idx++; + } + + if ((version == 1) && + (index = drive_get_index(IF_PFLASH, 0, fl_idx)) > -1) { + cpu_register_physical_memory(OMAP_CS1_BASE, flash1_size, + (phys_flash = qemu_ram_alloc(flash1_size)) | + IO_MEM_ROM); + io = cpu_register_io_memory(0, static_readfn, static_writefn, &cs1val); + cpu_register_physical_memory(OMAP_CS1_BASE + flash1_size, + OMAP_CS1_SIZE - flash1_size, io); + + if (!pflash_cfi01_register(OMAP_CS1_BASE, qemu_ram_alloc(flash1_size), + drives_table[index].bdrv, sector_size, flash1_size / sector_size, + 4, 0, 0, 0, 0)) { + fprintf(stderr, "qemu: Error registering flash memory %d.\n", + fl_idx); + } + fl_idx++; + } else { + io = cpu_register_io_memory(0, static_readfn, static_writefn, &cs1val); + cpu_register_physical_memory(OMAP_CS1_BASE, OMAP_CS1_SIZE, io); + } + + if (!kernel_filename && !fl_idx) { + fprintf(stderr, "Kernel or Flash image must be specified\n"); + exit(1); + } + + /* Load the kernel. */ + if (kernel_filename) { + /* Start at bootloader. */ + cpu->env->regs[15] = sx1_binfo.loader_start; + + sx1_binfo.kernel_filename = kernel_filename; + sx1_binfo.kernel_cmdline = kernel_cmdline; + sx1_binfo.initrd_filename = initrd_filename; + arm_load_kernel(cpu->env, &sx1_binfo); + } else { + cpu->env->regs[15] = 0x00000000; + } + + dpy_resize(ds, 640, 480); +} + +static void sx1_init_v1(ram_addr_t ram_size, int vga_ram_size, + const char *boot_device, DisplayState *ds, + const char *kernel_filename, const char *kernel_cmdline, + const char *initrd_filename, const char *cpu_model) +{ + sx1_init(ram_size, vga_ram_size, boot_device, ds, kernel_filename, + kernel_cmdline, initrd_filename, cpu_model, 1); +} + +static void sx1_init_v2(ram_addr_t ram_size, int vga_ram_size, + const char *boot_device, DisplayState *ds, + const char *kernel_filename, const char *kernel_cmdline, + const char *initrd_filename, const char *cpu_model) +{ + sx1_init(ram_size, vga_ram_size, boot_device, ds, kernel_filename, + kernel_cmdline, initrd_filename, cpu_model, 2); +} + +QEMUMachine sx1_machine_v2 = { + .name = "sx1", + .desc = "Siemens SX1 (OMAP310) V2", + .init = sx1_init_v2, + .ram_require = total_ram_v2 | RAMSIZE_FIXED, +}; + +QEMUMachine sx1_machine_v1 = { + .name = "sx1-v1", + .desc = "Siemens SX1 (OMAP310) V1", + .init = sx1_init_v1, + .ram_require = total_ram_v1 | RAMSIZE_FIXED, +}; diff --git a/qemu-doc.texi b/qemu-doc.texi index 377e384f22..b6ac4512cd 100644 --- a/qemu-doc.texi +++ b/qemu-doc.texi @@ -2798,6 +2798,28 @@ MV88W8618 audio controller, WM8750 CODEC and mixer 2 buttons, 2 navigation wheels with button function @end itemize +The Siemens SX1 models v1 and v2 (default) basic emulation. +The emulaton includes the following elements: + +@itemize @minus +@item +Texas Instruments OMAP310 System-on-chip (ARM 925T core) +@item +ROM and RAM memories (ROM firmware image can be loaded with -pflash) +V1 +1 Flash of 16MB and 1 Flash of 8MB +V2 +1 Flash of 32MB +@item +On-chip LCD controller +@item +On-chip Real Time Clock +@item +Secure Digital card connected to OMAP MMC/SD host +@item +Three on-chip UARTs +@end itemize + A Linux 2.6 test image is available on the QEMU web site. More information is available in the QEMU mailing-list archive. diff --git a/target-arm/machine.c b/target-arm/machine.c index f8be7a16d4..323bace307 100644 --- a/target-arm/machine.c +++ b/target-arm/machine.c @@ -11,6 +11,8 @@ void register_machines(void) qemu_register_machine(&spitzpda_machine); qemu_register_machine(&borzoipda_machine); qemu_register_machine(&terrierpda_machine); + qemu_register_machine(&sx1_machine_v1); + qemu_register_machine(&sx1_machine_v2); qemu_register_machine(&palmte_machine); qemu_register_machine(&n800_machine); qemu_register_machine(&n810_machine); |