diff options
72 files changed, 860 insertions, 694 deletions
diff --git a/arch_init.c b/arch_init.c index 699c92735f..a8b91eed7a 100644 --- a/arch_init.c +++ b/arch_init.c @@ -1029,7 +1029,7 @@ int qemu_uuid_parse(const char *str, uint8_t *uuid) return -1; } #ifdef TARGET_I386 - smbios_add_field(1, offsetof(struct smbios_type_1, uuid), 16, uuid); + smbios_add_field(1, offsetof(struct smbios_type_1, uuid), uuid, 16); #endif return 0; } @@ -1053,7 +1053,6 @@ void do_smbios_option(const char *optarg) { #ifdef TARGET_I386 if (smbios_entry_add(optarg) < 0) { - fprintf(stderr, "Wrong smbios provided\n"); exit(1); } #endif diff --git a/cpu-exec.c b/cpu-exec.c index 31c089dac0..ec46380435 100644 --- a/cpu-exec.c +++ b/cpu-exec.c @@ -230,7 +230,7 @@ int cpu_exec(CPUArchState *env) #if defined(TARGET_I386) /* put eflags in CPU temporary format */ CC_SRC = env->eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C); - DF = 1 - (2 * ((env->eflags >> 10) & 1)); + env->df = 1 - (2 * ((env->eflags >> 10) & 1)); CC_OP = CC_OP_EFLAGS; env->eflags &= ~(DF_MASK | CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C); #elif defined(TARGET_SPARC) @@ -681,7 +681,7 @@ int cpu_exec(CPUArchState *env) #if defined(TARGET_I386) /* restore flags in standard format */ env->eflags = env->eflags | cpu_cc_compute_all(env, CC_OP) - | (DF & DF_MASK); + | (env->df & DF_MASK); #elif defined(TARGET_ARM) /* XXX: Save/restore host fpu exception state?. */ #elif defined(TARGET_UNICORE32) diff --git a/hw/audio/adlib.c b/hw/audio/adlib.c index fc20857f45..6a7d377fd9 100644 --- a/hw/audio/adlib.c +++ b/hw/audio/adlib.c @@ -283,21 +283,21 @@ static void Adlib_fini (AdlibState *s) AUD_remove_card (&s->card); } -static int Adlib_initfn (ISADevice *dev) +static void adlib_realizefn (DeviceState *dev, Error **errp) { AdlibState *s = ADLIB(dev); struct audsettings as; if (glob_adlib) { - dolog ("Cannot create more than 1 adlib device\n"); - return -1; + error_setg (errp, "Cannot create more than 1 adlib device"); + return; } glob_adlib = s; #ifdef HAS_YMF262 if (YMF262Init (1, 14318180, s->freq)) { - dolog ("YMF262Init %d failed\n", s->freq); - return -1; + error_setg (errp, "YMF262Init %d failed", s->freq); + return; } else { YMF262SetTimerHandler (0, timer_handler, 0); @@ -306,8 +306,8 @@ static int Adlib_initfn (ISADevice *dev) #else s->opl = OPLCreate (OPL_TYPE_YM3812, 3579545, s->freq); if (!s->opl) { - dolog ("OPLCreate %d failed\n", s->freq); - return -1; + error_setg (errp, "OPLCreate %d failed", s->freq); + return; } else { OPLSetTimerHandler (s->opl, timer_handler, 0); @@ -332,7 +332,8 @@ static int Adlib_initfn (ISADevice *dev) ); if (!s->voice) { Adlib_fini (s); - return -1; + error_setg (errp, "Initializing audio voice failed"); + return; } s->samples = AUD_get_buffer_size_out (s->voice) >> SHIFT; @@ -346,8 +347,6 @@ static int Adlib_initfn (ISADevice *dev) register_ioport_read (s->port + 8, 2, 1, adlib_read, s); register_ioport_write (s->port + 8, 2, 1, adlib_write, s); - - return 0; } static Property adlib_properties[] = { @@ -359,8 +358,8 @@ static Property adlib_properties[] = { static void adlib_class_initfn (ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS (klass); - ISADeviceClass *ic = ISA_DEVICE_CLASS (klass); - ic->init = Adlib_initfn; + + dc->realize = adlib_realizefn; dc->desc = ADLIB_DESC; dc->props = adlib_properties; } diff --git a/hw/audio/cs4231a.c b/hw/audio/cs4231a.c index cc605e59a5..605dad4988 100644 --- a/hw/audio/cs4231a.c +++ b/hw/audio/cs4231a.c @@ -56,6 +56,9 @@ static struct { #define CS_REGS 16 #define CS_DREGS 32 +#define TYPE_CS4231A "cs4231a" +#define CS4231A(obj) OBJECT_CHECK (CSState, (obj), TYPE_CS4231A) + typedef struct CSState { ISADevice dev; QEMUSoundCard card; @@ -208,9 +211,9 @@ static int16_t ALawDecompressTable[256] = 944, 912, 1008, 976, 816, 784, 880, 848 }; -static void cs_reset (void *opaque) +static void cs4231a_reset (DeviceState *dev) { - CSState *s = opaque; + CSState *s = CS4231A (dev); s->regs[Index_Address] = 0x40; s->regs[Index_Data] = 0x00; @@ -641,27 +644,30 @@ static const MemoryRegionOps cs_ioport_ops = { } }; -static int cs4231a_initfn (ISADevice *dev) +static void cs4231a_initfn (Object *obj) { - CSState *s = DO_UPCAST (CSState, dev, dev); - - isa_init_irq (dev, &s->pic, s->irq); + CSState *s = CS4231A (obj); memory_region_init_io (&s->ioports, &cs_ioport_ops, s, "cs4231a", 4); - isa_register_ioport (dev, &s->ioports, s->port); +} - DMA_register_channel (s->dma, cs_dma_read, s); +static void cs4231a_realizefn (DeviceState *dev, Error **errp) +{ + ISADevice *d = ISA_DEVICE (dev); + CSState *s = CS4231A (dev); - qemu_register_reset (cs_reset, s); - cs_reset (s); + isa_init_irq (d, &s->pic, s->irq); + + isa_register_ioport (d, &s->ioports, s->port); + + DMA_register_channel (s->dma, cs_dma_read, s); AUD_register_card ("cs4231a", &s->card); - return 0; } static int cs4231a_init (ISABus *bus) { - isa_create_simple (bus, "cs4231a"); + isa_create_simple (bus, TYPE_CS4231A); return 0; } @@ -675,17 +681,19 @@ static Property cs4231a_properties[] = { static void cs4231a_class_initfn (ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS (klass); - ISADeviceClass *ic = ISA_DEVICE_CLASS (klass); - ic->init = cs4231a_initfn; + + dc->realize = cs4231a_realizefn; + dc->reset = cs4231a_reset; dc->desc = "Crystal Semiconductor CS4231A"; dc->vmsd = &vmstate_cs4231a; dc->props = cs4231a_properties; } static const TypeInfo cs4231a_info = { - .name = "cs4231a", + .name = TYPE_CS4231A, .parent = TYPE_ISA_DEVICE, .instance_size = sizeof (CSState), + .instance_init = cs4231a_initfn, .class_init = cs4231a_class_initfn, }; diff --git a/hw/audio/gus.c b/hw/audio/gus.c index a91921c77d..f45ed0b0e9 100644 --- a/hw/audio/gus.c +++ b/hw/audio/gus.c @@ -46,6 +46,9 @@ #define IO_WRITE_PROTO(name) \ static void name (void *opaque, uint32_t nport, uint32_t val) +#define TYPE_GUS "gus" +#define GUS(obj) OBJECT_CHECK (GUSState, (obj), TYPE_GUS) + typedef struct GUSState { ISADevice dev; GUSEmuState emu; @@ -248,9 +251,10 @@ static const MemoryRegionPortio gus_portio_list2[] = { PORTIO_END_OF_LIST (), }; -static int gus_initfn (ISADevice *dev) +static void gus_realizefn (DeviceState *dev, Error **errp) { - GUSState *s = DO_UPCAST (GUSState, dev, dev); + ISADevice *d = ISA_DEVICE(dev); + GUSState *s = GUS (dev); struct audsettings as; AUD_register_card ("gus", &s->card); @@ -271,31 +275,30 @@ static int gus_initfn (ISADevice *dev) if (!s->voice) { AUD_remove_card (&s->card); - return -1; + error_setg(errp, "No voice"); + return; } s->shift = 2; s->samples = AUD_get_buffer_size_out (s->voice) >> s->shift; s->mixbuf = g_malloc0 (s->samples << s->shift); - isa_register_portio_list (dev, s->port, gus_portio_list1, s, "gus"); - isa_register_portio_list (dev, (s->port + 0x100) & 0xf00, + isa_register_portio_list (d, s->port, gus_portio_list1, s, "gus"); + isa_register_portio_list (d, (s->port + 0x100) & 0xf00, gus_portio_list2, s, "gus"); DMA_register_channel (s->emu.gusdma, GUS_read_DMA, s); s->emu.himemaddr = s->himem; s->emu.gusdatapos = s->emu.himemaddr + 1024 * 1024 + 32; s->emu.opaque = s; - isa_init_irq (dev, &s->pic, s->emu.gusirq); + isa_init_irq (d, &s->pic, s->emu.gusirq); AUD_set_active_out (s->voice, 1); - - return 0; } static int GUS_init (ISABus *bus) { - isa_create_simple (bus, "gus"); + isa_create_simple (bus, TYPE_GUS); return 0; } @@ -310,15 +313,15 @@ static Property gus_properties[] = { static void gus_class_initfn (ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS (klass); - ISADeviceClass *ic = ISA_DEVICE_CLASS (klass); - ic->init = gus_initfn; + + dc->realize = gus_realizefn; dc->desc = "Gravis Ultrasound GF1"; dc->vmsd = &vmstate_gus; dc->props = gus_properties; } static const TypeInfo gus_info = { - .name = "gus", + .name = TYPE_GUS, .parent = TYPE_ISA_DEVICE, .instance_size = sizeof (GUSState), .class_init = gus_class_initfn, diff --git a/hw/audio/intel-hda.c b/hw/audio/intel-hda.c index 1016af0204..3ac90d510d 100644 --- a/hw/audio/intel-hda.c +++ b/hw/audio/intel-hda.c @@ -189,6 +189,11 @@ struct IntelHDAState { uint32_t msi; }; +#define TYPE_INTEL_HDA_GENERIC "intel-hda-generic" + +#define INTEL_HDA(obj) \ + OBJECT_CHECK(IntelHDAState, (obj), TYPE_INTEL_HDA_GENERIC) + struct IntelHDAReg { const char *name; /* register name */ uint32_t size; /* size in bytes */ @@ -498,7 +503,7 @@ static void intel_hda_notify_codecs(IntelHDAState *d, uint32_t stream, bool runn static void intel_hda_set_g_ctl(IntelHDAState *d, const IntelHDAReg *reg, uint32_t old) { if ((d->g_ctl & ICH6_GCTL_RESET) == 0) { - intel_hda_reset(&d->pci.qdev); + intel_hda_reset(DEVICE(d)); } } @@ -1102,7 +1107,7 @@ static const MemoryRegionOps intel_hda_mmio_ops = { static void intel_hda_reset(DeviceState *dev) { BusChild *kid; - IntelHDAState *d = DO_UPCAST(IntelHDAState, pci.qdev, dev); + IntelHDAState *d = INTEL_HDA(dev); HDACodecDevice *cdev; intel_hda_regs_reset(d); @@ -1120,7 +1125,7 @@ static void intel_hda_reset(DeviceState *dev) static int intel_hda_init(PCIDevice *pci) { - IntelHDAState *d = DO_UPCAST(IntelHDAState, pci, pci); + IntelHDAState *d = INTEL_HDA(pci); uint8_t *conf = d->pci.config; d->name = object_get_typename(OBJECT(d)); @@ -1137,7 +1142,7 @@ static int intel_hda_init(PCIDevice *pci) msi_init(&d->pci, 0x50, 1, true, false); } - hda_codec_bus_init(&d->pci.qdev, &d->codecs, + hda_codec_bus_init(DEVICE(pci), &d->codecs, intel_hda_response, intel_hda_xfer); return 0; @@ -1145,7 +1150,7 @@ static int intel_hda_init(PCIDevice *pci) static void intel_hda_exit(PCIDevice *pci) { - IntelHDAState *d = DO_UPCAST(IntelHDAState, pci, pci); + IntelHDAState *d = INTEL_HDA(pci); msi_uninit(&d->pci); memory_region_destroy(&d->mmio); @@ -1232,7 +1237,7 @@ static Property intel_hda_properties[] = { DEFINE_PROP_END_OF_LIST(), }; -static void intel_hda_class_init_common(ObjectClass *klass) +static void intel_hda_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); @@ -1251,7 +1256,6 @@ static void intel_hda_class_init_ich6(ObjectClass *klass, void *data) DeviceClass *dc = DEVICE_CLASS(klass); PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); - intel_hda_class_init_common(klass); k->device_id = 0x2668; k->revision = 1; dc->desc = "Intel HD Audio Controller (ich6)"; @@ -1262,23 +1266,28 @@ static void intel_hda_class_init_ich9(ObjectClass *klass, void *data) DeviceClass *dc = DEVICE_CLASS(klass); PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); - intel_hda_class_init_common(klass); k->device_id = 0x293e; k->revision = 3; dc->desc = "Intel HD Audio Controller (ich9)"; } -static const TypeInfo intel_hda_info_ich6 = { - .name = "intel-hda", +static const TypeInfo intel_hda_info = { + .name = TYPE_INTEL_HDA_GENERIC, .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(IntelHDAState), + .class_init = intel_hda_class_init, + .abstract = true, +}; + +static const TypeInfo intel_hda_info_ich6 = { + .name = "intel-hda", + .parent = TYPE_INTEL_HDA_GENERIC, .class_init = intel_hda_class_init_ich6, }; static const TypeInfo intel_hda_info_ich9 = { .name = "ich9-intel-hda", - .parent = TYPE_PCI_DEVICE, - .instance_size = sizeof(IntelHDAState), + .parent = TYPE_INTEL_HDA_GENERIC, .class_init = intel_hda_class_init_ich9, }; @@ -1306,12 +1315,12 @@ static const TypeInfo hda_codec_device_type_info = { */ static int intel_hda_and_codec_init(PCIBus *bus) { - PCIDevice *controller; + DeviceState *controller; BusState *hdabus; DeviceState *codec; - controller = pci_create_simple(bus, -1, "intel-hda"); - hdabus = QLIST_FIRST(&controller->qdev.child_bus); + controller = DEVICE(pci_create_simple(bus, -1, "intel-hda")); + hdabus = QLIST_FIRST(&controller->child_bus); codec = qdev_create(hdabus, "hda-duplex"); qdev_init_nofail(codec); return 0; @@ -1320,6 +1329,7 @@ static int intel_hda_and_codec_init(PCIBus *bus) static void intel_hda_register_types(void) { type_register_static(&hda_codec_bus_info); + type_register_static(&intel_hda_info); type_register_static(&intel_hda_info_ich6); type_register_static(&intel_hda_info_ich9); type_register_static(&hda_codec_device_type_info); diff --git a/hw/audio/pcspk.c b/hw/audio/pcspk.c index 3a7285f14f..5dde0e75da 100644 --- a/hw/audio/pcspk.c +++ b/hw/audio/pcspk.c @@ -163,16 +163,21 @@ static const MemoryRegionOps pcspk_io_ops = { }, }; -static int pcspk_initfn(ISADevice *dev) +static void pcspk_initfn(Object *obj) { - PCSpkState *s = PC_SPEAKER(dev); + PCSpkState *s = PC_SPEAKER(obj); memory_region_init_io(&s->ioport, &pcspk_io_ops, s, "elcr", 1); - isa_register_ioport(dev, &s->ioport, s->iobase); +} - pcspk_state = s; +static void pcspk_realizefn(DeviceState *dev, Error **errp) +{ + ISADevice *isadev = ISA_DEVICE(dev); + PCSpkState *s = PC_SPEAKER(dev); - return 0; + isa_register_ioport(isadev, &s->ioport, s->iobase); + + pcspk_state = s; } static Property pcspk_properties[] = { @@ -184,9 +189,8 @@ static Property pcspk_properties[] = { static void pcspk_class_initfn(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); - ISADeviceClass *ic = ISA_DEVICE_CLASS(klass); - ic->init = pcspk_initfn; + dc->realize = pcspk_realizefn; dc->no_user = 1; dc->props = pcspk_properties; } @@ -195,6 +199,7 @@ static const TypeInfo pcspk_info = { .name = TYPE_PC_SPEAKER, .parent = TYPE_ISA_DEVICE, .instance_size = sizeof(PCSpkState), + .instance_init = pcspk_initfn, .class_init = pcspk_class_initfn, }; diff --git a/hw/audio/sb16.c b/hw/audio/sb16.c index 6ddc0ac258..e697bc1498 100644 --- a/hw/audio/sb16.c +++ b/hw/audio/sb16.c @@ -1356,12 +1356,19 @@ static const MemoryRegionPortio sb16_ioport_list[] = { }; -static int sb16_initfn (ISADevice *dev) +static void sb16_initfn (Object *obj) { - SB16State *s = SB16 (dev); + SB16State *s = SB16 (obj); s->cmd = -1; - isa_init_irq (dev, &s->pic, s->irq); +} + +static void sb16_realizefn (DeviceState *dev, Error **errp) +{ + ISADevice *isadev = ISA_DEVICE (dev); + SB16State *s = SB16 (dev); + + isa_init_irq (isadev, &s->pic, s->irq); s->mixer_regs[0x80] = magic_of_irq (s->irq); s->mixer_regs[0x81] = (1 << s->dma) | (1 << s->hdma); @@ -1376,14 +1383,13 @@ static int sb16_initfn (ISADevice *dev) dolog ("warning: Could not create auxiliary timer\n"); } - isa_register_portio_list (dev, s->port, sb16_ioport_list, s, "sb16"); + isa_register_portio_list (isadev, s->port, sb16_ioport_list, s, "sb16"); DMA_register_channel (s->hdma, SB_read_DMA, s); DMA_register_channel (s->dma, SB_read_DMA, s); s->can_write = 1; AUD_register_card ("sb16", &s->card); - return 0; } static int SB16_init (ISABus *bus) @@ -1404,8 +1410,8 @@ static Property sb16_properties[] = { static void sb16_class_initfn (ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS (klass); - ISADeviceClass *ic = ISA_DEVICE_CLASS (klass); - ic->init = sb16_initfn; + + dc->realize = sb16_realizefn; dc->desc = "Creative Sound Blaster 16"; dc->vmsd = &vmstate_sb16; dc->props = sb16_properties; @@ -1415,6 +1421,7 @@ static const TypeInfo sb16_info = { .name = TYPE_SB16, .parent = TYPE_ISA_DEVICE, .instance_size = sizeof (SB16State), + .instance_init = sb16_initfn, .class_init = sb16_class_initfn, }; diff --git a/hw/block/fdc.c b/hw/block/fdc.c index 0888652fe8..930f191d9e 100644 --- a/hw/block/fdc.c +++ b/hw/block/fdc.c @@ -2022,22 +2022,24 @@ static int fdctrl_connect_drives(FDCtrl *fdctrl) ISADevice *fdctrl_init_isa(ISABus *bus, DriveInfo **fds) { - ISADevice *dev; + DeviceState *dev; + ISADevice *isadev; - dev = isa_try_create(bus, TYPE_ISA_FDC); - if (!dev) { + isadev = isa_try_create(bus, TYPE_ISA_FDC); + if (!isadev) { return NULL; } + dev = DEVICE(isadev); if (fds[0]) { - qdev_prop_set_drive_nofail(&dev->qdev, "driveA", fds[0]->bdrv); + qdev_prop_set_drive_nofail(dev, "driveA", fds[0]->bdrv); } if (fds[1]) { - qdev_prop_set_drive_nofail(&dev->qdev, "driveB", fds[1]->bdrv); + qdev_prop_set_drive_nofail(dev, "driveB", fds[1]->bdrv); } - qdev_init_nofail(&dev->qdev); + qdev_init_nofail(dev); - return dev; + return isadev; } void fdctrl_init_sysbus(qemu_irq irq, int dma_chann, @@ -2117,24 +2119,28 @@ static const MemoryRegionPortio fdc_portio_list[] = { PORTIO_END_OF_LIST(), }; -static int isabus_fdc_init1(ISADevice *dev) +static void isabus_fdc_realize(DeviceState *dev, Error **errp) { + ISADevice *isadev = ISA_DEVICE(dev); FDCtrlISABus *isa = ISA_FDC(dev); FDCtrl *fdctrl = &isa->state; int ret; - isa_register_portio_list(dev, isa->iobase, fdc_portio_list, fdctrl, "fdc"); + isa_register_portio_list(isadev, isa->iobase, fdc_portio_list, fdctrl, + "fdc"); - isa_init_irq(dev, &fdctrl->irq, isa->irq); + isa_init_irq(isadev, &fdctrl->irq, isa->irq); fdctrl->dma_chann = isa->dma; - qdev_set_legacy_instance_id(&dev->qdev, isa->iobase, 2); + qdev_set_legacy_instance_id(dev, isa->iobase, 2); ret = fdctrl_init_common(fdctrl); + if (ret < 0) { + error_setg(errp, "Floppy init failed."); + return; + } - add_boot_device_path(isa->bootindexA, &dev->qdev, "/floppy@0"); - add_boot_device_path(isa->bootindexB, &dev->qdev, "/floppy@1"); - - return ret; + add_boot_device_path(isa->bootindexA, dev, "/floppy@0"); + add_boot_device_path(isa->bootindexB, dev, "/floppy@1"); } static int sysbus_fdc_init1(SysBusDevice *dev) @@ -2203,8 +2209,8 @@ static Property isa_fdc_properties[] = { static void isabus_fdc_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); - ISADeviceClass *ic = ISA_DEVICE_CLASS(klass); - ic->init = isabus_fdc_init1; + + dc->realize = isabus_fdc_realize; dc->fw_name = "fdc"; dc->no_user = 1; dc->reset = fdctrl_external_reset_isa; diff --git a/hw/char/debugcon.c b/hw/char/debugcon.c index 3b0637d44f..f254841aec 100644 --- a/hw/char/debugcon.c +++ b/hw/char/debugcon.c @@ -81,27 +81,32 @@ static const MemoryRegionOps debugcon_ops = { .endianness = DEVICE_LITTLE_ENDIAN, }; -static void debugcon_init_core(DebugconState *s) +static void debugcon_realize_core(DebugconState *s, Error **errp) { if (!s->chr) { - fprintf(stderr, "Can't create debugcon device, empty char device\n"); - exit(1); + error_setg(errp, "Can't create debugcon device, empty char device"); + return; } qemu_chr_add_handlers(s->chr, NULL, NULL, NULL, s); } -static int debugcon_isa_initfn(ISADevice *dev) +static void debugcon_isa_realizefn(DeviceState *dev, Error **errp) { + ISADevice *d = ISA_DEVICE(dev); ISADebugconState *isa = ISA_DEBUGCON_DEVICE(dev); DebugconState *s = &isa->state; + Error *err = NULL; - debugcon_init_core(s); + debugcon_realize_core(s, &err); + if (err != NULL) { + error_propagate(errp, err); + return; + } memory_region_init_io(&s->io, &debugcon_ops, s, TYPE_ISA_DEBUGCON_DEVICE, 1); - memory_region_add_subregion(isa_address_space_io(dev), + memory_region_add_subregion(isa_address_space_io(d), isa->iobase, &s->io); - return 0; } static Property debugcon_isa_properties[] = { @@ -114,8 +119,8 @@ static Property debugcon_isa_properties[] = { static void debugcon_isa_class_initfn(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); - ISADeviceClass *ic = ISA_DEVICE_CLASS(klass); - ic->init = debugcon_isa_initfn; + + dc->realize = debugcon_isa_realizefn; dc->props = debugcon_isa_properties; } diff --git a/hw/char/parallel.c b/hw/char/parallel.c index 8e48284520..caa9eb4de4 100644 --- a/hw/char/parallel.c +++ b/hw/char/parallel.c @@ -477,29 +477,35 @@ static const MemoryRegionPortio isa_parallel_portio_sw_list[] = { PORTIO_END_OF_LIST(), }; -static int parallel_isa_initfn(ISADevice *dev) +static void parallel_isa_realizefn(DeviceState *dev, Error **errp) { static int index; + ISADevice *isadev = ISA_DEVICE(dev); ISAParallelState *isa = ISA_PARALLEL(dev); ParallelState *s = &isa->state; int base; uint8_t dummy; if (!s->chr) { - fprintf(stderr, "Can't create parallel device, empty char device\n"); - exit(1); + error_setg(errp, "Can't create parallel device, empty char device"); + return; } - if (isa->index == -1) + if (isa->index == -1) { isa->index = index; - if (isa->index >= MAX_PARALLEL_PORTS) - return -1; - if (isa->iobase == -1) + } + if (isa->index >= MAX_PARALLEL_PORTS) { + error_setg(errp, "Max. supported number of parallel ports is %d.", + MAX_PARALLEL_PORTS); + return; + } + if (isa->iobase == -1) { isa->iobase = isa_parallel_io[isa->index]; + } index++; base = isa->iobase; - isa_init_irq(dev, &s->irq, isa->isairq); + isa_init_irq(isadev, &s->irq, isa->isairq); qemu_register_reset(parallel_reset, s); if (qemu_chr_fe_ioctl(s->chr, CHR_IOCTL_PP_READ_STATUS, &dummy) == 0) { @@ -507,12 +513,11 @@ static int parallel_isa_initfn(ISADevice *dev) s->status = dummy; } - isa_register_portio_list(dev, base, + isa_register_portio_list(isadev, base, (s->hw_driver ? &isa_parallel_portio_hw_list[0] : &isa_parallel_portio_sw_list[0]), s, "parallel"); - return 0; } /* Memory mapped interface */ @@ -599,8 +604,8 @@ static Property parallel_isa_properties[] = { static void parallel_isa_class_initfn(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); - ISADeviceClass *ic = ISA_DEVICE_CLASS(klass); - ic->init = parallel_isa_initfn; + + dc->realize = parallel_isa_realizefn; dc->props = parallel_isa_properties; } diff --git a/hw/char/serial-isa.c b/hw/char/serial-isa.c index 342b4ccbe3..e06a802e24 100644 --- a/hw/char/serial-isa.c +++ b/hw/char/serial-isa.c @@ -44,9 +44,10 @@ static const int isa_serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 }; -static int serial_isa_initfn(ISADevice *dev) +static void serial_isa_realizefn(DeviceState *dev, Error **errp) { static int index; + ISADevice *isadev = ISA_DEVICE(dev); ISASerialState *isa = ISA_SERIAL(dev); SerialState *s = &isa->state; @@ -54,7 +55,9 @@ static int serial_isa_initfn(ISADevice *dev) isa->index = index; } if (isa->index >= MAX_SERIAL_PORTS) { - return -1; + error_setg(errp, "Max. supported number of ISA serial ports is %d.", + MAX_SERIAL_PORTS); + return; } if (isa->iobase == -1) { isa->iobase = isa_serial_io[isa->index]; @@ -65,13 +68,12 @@ static int serial_isa_initfn(ISADevice *dev) index++; s->baudbase = 115200; - isa_init_irq(dev, &s->irq, isa->isairq); - serial_init_core(s); - qdev_set_legacy_instance_id(&dev->qdev, isa->iobase, 3); + isa_init_irq(isadev, &s->irq, isa->isairq); + serial_realize_core(s, errp); + qdev_set_legacy_instance_id(dev, isa->iobase, 3); memory_region_init_io(&s->io, &serial_io_ops, s, "serial", 8); - isa_register_ioport(dev, &s->io, isa->iobase); - return 0; + isa_register_ioport(isadev, &s->io, isa->iobase); } static const VMStateDescription vmstate_isa_serial = { @@ -96,8 +98,8 @@ static Property serial_isa_properties[] = { static void serial_isa_class_initfn(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); - ISADeviceClass *ic = ISA_DEVICE_CLASS(klass); - ic->init = serial_isa_initfn; + + dc->realize = serial_isa_realizefn; dc->vmsd = &vmstate_isa_serial; dc->props = serial_isa_properties; } @@ -118,15 +120,17 @@ type_init(serial_register_types) bool serial_isa_init(ISABus *bus, int index, CharDriverState *chr) { - ISADevice *dev; + DeviceState *dev; + ISADevice *isadev; - dev = isa_try_create(bus, TYPE_ISA_SERIAL); - if (!dev) { + isadev = isa_try_create(bus, TYPE_ISA_SERIAL); + if (!isadev) { return false; } - qdev_prop_set_uint32(&dev->qdev, "index", index); - qdev_prop_set_chr(&dev->qdev, "chardev", chr); - if (qdev_init(&dev->qdev) < 0) { + dev = DEVICE(isadev); + qdev_prop_set_uint32(dev, "index", index); + qdev_prop_set_chr(dev, "chardev", chr); + if (qdev_init(dev) < 0) { return false; } return true; diff --git a/hw/char/serial-pci.c b/hw/char/serial-pci.c index 2138e35851..3bec8ebe7b 100644 --- a/hw/char/serial-pci.c +++ b/hw/char/serial-pci.c @@ -27,6 +27,7 @@ #include "hw/char/serial.h" #include "hw/pci/pci.h" +#include "qapi/qmp/qerror.h" #define PCI_SERIAL_MAX_PORTS 4 @@ -49,9 +50,15 @@ static int serial_pci_init(PCIDevice *dev) { PCISerialState *pci = DO_UPCAST(PCISerialState, dev, dev); SerialState *s = &pci->state; + Error *err = NULL; s->baudbase = 115200; - serial_init_core(s); + serial_realize_core(s, &err); + if (err != NULL) { + qerror_report_err(err); + error_free(err); + return -1; + } pci->dev.config[PCI_INTERRUPT_PIN] = 0x01; s->irq = pci->dev.irq[0]; @@ -80,6 +87,7 @@ static int multi_serial_pci_init(PCIDevice *dev) PCIDeviceClass *pc = PCI_DEVICE_GET_CLASS(dev); PCIMultiSerialState *pci = DO_UPCAST(PCIMultiSerialState, dev, dev); SerialState *s; + Error *err = NULL; int i; switch (pc->device_id) { @@ -102,7 +110,12 @@ static int multi_serial_pci_init(PCIDevice *dev) for (i = 0; i < pci->ports; i++) { s = pci->state + i; s->baudbase = 115200; - serial_init_core(s); + serial_realize_core(s, &err); + if (err != NULL) { + qerror_report_err(err); + error_free(err); + return -1; + } s->irq = pci->irqs[i]; pci->name[i] = g_strdup_printf("uart #%d", i+1); memory_region_init_io(&s->io, &serial_io_ops, s, pci->name[i], 8); diff --git a/hw/char/serial.c b/hw/char/serial.c index 017610eb45..6382f98389 100644 --- a/hw/char/serial.c +++ b/hw/char/serial.c @@ -424,7 +424,7 @@ static uint64_t serial_ioport_read(void *opaque, hwaddr addr, unsigned size) ret = s->divider & 0xff; } else { if(s->fcr & UART_FCR_FE) { - ret = fifo8_is_full(&s->recv_fifo) ? + ret = fifo8_is_empty(&s->recv_fifo) ? 0 : fifo8_pop(&s->recv_fifo); if (s->recv_fifo.num == 0) { s->lsr &= ~(UART_LSR_DR | UART_LSR_BI); @@ -642,11 +642,11 @@ static void serial_reset(void *opaque) qemu_irq_lower(s->irq); } -void serial_init_core(SerialState *s) +void serial_realize_core(SerialState *s, Error **errp) { if (!s->chr) { - fprintf(stderr, "Can't create serial device, empty char device\n"); - exit(1); + error_setg(errp, "Can't create serial device, empty char device"); + return; } s->modem_status_poll = qemu_new_timer_ns(vm_clock, (QEMUTimerCB *) serial_update_msl, s); @@ -687,13 +687,19 @@ SerialState *serial_init(int base, qemu_irq irq, int baudbase, CharDriverState *chr, MemoryRegion *system_io) { SerialState *s; + Error *err = NULL; s = g_malloc0(sizeof(SerialState)); s->irq = irq; s->baudbase = baudbase; s->chr = chr; - serial_init_core(s); + serial_realize_core(s, &err); + if (err != NULL) { + fprintf(stderr, "%s\n", error_get_pretty(err)); + error_free(err); + exit(1); + } vmstate_register(NULL, base, &vmstate_serial, s); @@ -743,6 +749,7 @@ SerialState *serial_mm_init(MemoryRegion *address_space, CharDriverState *chr, enum device_endian end) { SerialState *s; + Error *err = NULL; s = g_malloc0(sizeof(SerialState)); @@ -751,7 +758,12 @@ SerialState *serial_mm_init(MemoryRegion *address_space, s->baudbase = baudbase; s->chr = chr; - serial_init_core(s); + serial_realize_core(s, &err); + if (err != NULL) { + fprintf(stderr, "%s\n", error_get_pretty(err)); + error_free(err); + exit(1); + } vmstate_register(NULL, base, &vmstate_serial, s); memory_region_init_io(&s->io, &serial_mm_ops[end], s, diff --git a/hw/display/cirrus_vga.c b/hw/display/cirrus_vga.c index a5dbc39c21..0d9eee876a 100644 --- a/hw/display/cirrus_vga.c +++ b/hw/display/cirrus_vga.c @@ -2906,19 +2906,20 @@ static void cirrus_init_common(CirrusVGAState * s, int device_id, int is_pci, * ***************************************/ -static int vga_initfn(ISADevice *dev) +static void isa_cirrus_vga_realizefn(DeviceState *dev, Error **errp) { + ISADevice *isadev = ISA_DEVICE(dev); ISACirrusVGAState *d = ISA_CIRRUS_VGA(dev); VGACommonState *s = &d->cirrus_vga.vga; vga_common_init(s); cirrus_init_common(&d->cirrus_vga, CIRRUS_ID_CLGD5430, 0, - isa_address_space(dev), isa_address_space_io(dev)); - s->con = graphic_console_init(DEVICE(dev), s->hw_ops, s); + isa_address_space(isadev), + isa_address_space_io(isadev)); + s->con = graphic_console_init(dev, s->hw_ops, s); rom_add_vga(VGABIOS_CIRRUS_FILENAME); /* XXX ISA-LFB support */ /* FIXME not qdev yet */ - return 0; } static Property isa_cirrus_vga_properties[] = { @@ -2929,11 +2930,10 @@ static Property isa_cirrus_vga_properties[] = { static void isa_cirrus_vga_class_init(ObjectClass *klass, void *data) { - ISADeviceClass *k = ISA_DEVICE_CLASS(klass); DeviceClass *dc = DEVICE_CLASS(klass); dc->vmsd = &vmstate_cirrus_vga; - k->init = vga_initfn; + dc->realize = isa_cirrus_vga_realizefn; dc->props = isa_cirrus_vga_properties; } diff --git a/hw/display/vga-isa.c b/hw/display/vga-isa.c index 9e63b69e03..d1691a9f9b 100644 --- a/hw/display/vga-isa.c +++ b/hw/display/vga-isa.c @@ -48,30 +48,30 @@ static void vga_isa_reset(DeviceState *dev) vga_common_reset(s); } -static int vga_initfn(ISADevice *dev) +static void vga_isa_realizefn(DeviceState *dev, Error **errp) { + ISADevice *isadev = ISA_DEVICE(dev); ISAVGAState *d = ISA_VGA(dev); VGACommonState *s = &d->state; MemoryRegion *vga_io_memory; const MemoryRegionPortio *vga_ports, *vbe_ports; vga_common_init(s); - s->legacy_address_space = isa_address_space(dev); + s->legacy_address_space = isa_address_space(isadev); vga_io_memory = vga_init_io(s, &vga_ports, &vbe_ports); - isa_register_portio_list(dev, 0x3b0, vga_ports, s, "vga"); + isa_register_portio_list(isadev, 0x3b0, vga_ports, s, "vga"); if (vbe_ports) { - isa_register_portio_list(dev, 0x1ce, vbe_ports, s, "vbe"); + isa_register_portio_list(isadev, 0x1ce, vbe_ports, s, "vbe"); } - memory_region_add_subregion_overlap(isa_address_space(dev), + memory_region_add_subregion_overlap(isa_address_space(isadev), isa_mem_base + 0x000a0000, vga_io_memory, 1); memory_region_set_coalescing(vga_io_memory); s->con = graphic_console_init(DEVICE(dev), s->hw_ops, s); - vga_init_vbe(s, isa_address_space(dev)); + vga_init_vbe(s, isa_address_space(isadev)); /* ROM BIOS */ rom_add_vga(VGABIOS_FILENAME); - return 0; } static Property vga_isa_properties[] = { @@ -82,9 +82,8 @@ static Property vga_isa_properties[] = { static void vga_isa_class_initfn(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); - ISADeviceClass *ic = ISA_DEVICE_CLASS(klass); - ic->init = vga_initfn; + dc->realize = vga_isa_realizefn; dc->reset = vga_isa_reset; dc->vmsd = &vmstate_vga_common; dc->props = vga_isa_properties; diff --git a/hw/dma/i82374.c b/hw/dma/i82374.c index f3d1924109..6192780fda 100644 --- a/hw/dma/i82374.c +++ b/hw/dma/i82374.c @@ -98,7 +98,7 @@ static uint32_t i82374_read_descriptor(void *opaque, uint32_t nport) return val; } -static void i82374_init(I82374State *s) +static void i82374_realize(I82374State *s, Error **errp) { DMA_init(1, &s->out); memset(s->commands, 0, sizeof(s->commands)); @@ -124,7 +124,7 @@ static const VMStateDescription vmstate_isa_i82374 = { }, }; -static int i82374_isa_init(ISADevice *dev) +static void i82374_isa_realize(DeviceState *dev, Error **errp) { ISAi82374State *isa = I82374(dev); I82374State *s = &isa->state; @@ -135,11 +135,9 @@ static int i82374_isa_init(ISADevice *dev) register_ioport_write(isa->iobase + 0x20, 0x20, 1, i82374_write_descriptor, s); register_ioport_read(isa->iobase + 0x20, 0x20, 1, i82374_read_descriptor, s); - i82374_init(s); + i82374_realize(s, errp); - qdev_init_gpio_out(&dev->qdev, &s->out, 1); - - return 0; + qdev_init_gpio_out(dev, &s->out, 1); } static Property i82374_properties[] = { @@ -149,10 +147,9 @@ static Property i82374_properties[] = { static void i82374_class_init(ObjectClass *klass, void *data) { - ISADeviceClass *k = ISA_DEVICE_CLASS(klass); DeviceClass *dc = DEVICE_CLASS(klass); - k->init = i82374_isa_init; + dc->realize = i82374_isa_realize; dc->vmsd = &vmstate_isa_i82374; dc->props = i82374_properties; } diff --git a/hw/i2c/core.c b/hw/i2c/core.c index 0c4fc1dbaa..22ef3b9617 100644 --- a/hw/i2c/core.c +++ b/hw/i2c/core.c @@ -66,7 +66,7 @@ i2c_bus *i2c_init_bus(DeviceState *parent, const char *name) { i2c_bus *bus; - bus = FROM_QBUS(i2c_bus, qbus_create(TYPE_I2C_BUS, parent, name)); + bus = I2C_BUS(qbus_create(TYPE_I2C_BUS, parent, name)); vmstate_register(NULL, -1, &vmstate_i2c_bus, bus); return bus; } @@ -183,7 +183,7 @@ static int i2c_slave_post_load(void *opaque, int version_id) { I2CSlave *dev = opaque; i2c_bus *bus; - bus = FROM_QBUS(i2c_bus, qdev_get_parent_bus(&dev->qdev)); + bus = I2C_BUS(qdev_get_parent_bus(DEVICE(dev))); if (bus->saved_address == dev->address) { bus->current_dev = dev; } diff --git a/hw/i386/kvm/i8254.c b/hw/i386/kvm/i8254.c index da90711853..93a3669746 100644 --- a/hw/i386/kvm/i8254.c +++ b/hw/i386/kvm/i8254.c @@ -32,13 +32,26 @@ #define CALIBRATION_ROUNDS 3 +#define KVM_PIT(obj) OBJECT_CHECK(KVMPITState, (obj), TYPE_KVM_I8254) +#define KVM_PIT_CLASS(class) \ + OBJECT_CLASS_CHECK(KVMPITClass, (class), TYPE_KVM_I8254) +#define KVM_PIT_GET_CLASS(obj) \ + OBJECT_GET_CLASS(KVMPITClass, (obj), TYPE_KVM_I8254) + typedef struct KVMPITState { - PITCommonState pit; + PITCommonState parent_obj; + LostTickPolicy lost_tick_policy; bool vm_stopped; int64_t kernel_clock_offset; } KVMPITState; +typedef struct KVMPITClass { + PITCommonClass parent_class; + + DeviceRealize parent_realize; +} KVMPITClass; + static int64_t abs64(int64_t v) { return v < 0 ? -v : v; @@ -70,7 +83,7 @@ static void kvm_pit_update_clock_offset(KVMPITState *s) static void kvm_pit_get(PITCommonState *pit) { - KVMPITState *s = DO_UPCAST(KVMPITState, pit, pit); + KVMPITState *s = KVM_PIT(pit); struct kvm_pit_state2 kpit; struct kvm_pit_channel_state *kchan; struct PITChannelState *sc; @@ -124,7 +137,7 @@ static void kvm_pit_get(PITCommonState *pit) static void kvm_pit_put(PITCommonState *pit) { - KVMPITState *s = DO_UPCAST(KVMPITState, pit, pit); + KVMPITState *s = KVM_PIT(pit); struct kvm_pit_state2 kpit; struct kvm_pit_channel_state *kchan; struct PITChannelState *sc; @@ -200,7 +213,7 @@ static void kvm_pit_get_channel_info(PITCommonState *s, PITChannelState *sc, static void kvm_pit_reset(DeviceState *dev) { - PITCommonState *s = DO_UPCAST(PITCommonState, dev.qdev, dev); + PITCommonState *s = PIT_COMMON(dev); pit_reset_common(s); @@ -229,14 +242,16 @@ static void kvm_pit_vm_state_change(void *opaque, int running, s->vm_stopped = false; } else { kvm_pit_update_clock_offset(s); - kvm_pit_get(&s->pit); + kvm_pit_get(PIT_COMMON(s)); s->vm_stopped = true; } } -static int kvm_pit_initfn(PITCommonState *pit) +static void kvm_pit_realizefn(DeviceState *dev, Error **errp) { - KVMPITState *s = DO_UPCAST(KVMPITState, pit, pit); + PITCommonState *pit = PIT_COMMON(dev); + KVMPITClass *kpc = KVM_PIT_GET_CLASS(dev); + KVMPITState *s = KVM_PIT(pit); struct kvm_pit_config config = { .flags = 0, }; @@ -248,9 +263,9 @@ static int kvm_pit_initfn(PITCommonState *pit) ret = kvm_vm_ioctl(kvm_state, KVM_CREATE_PIT); } if (ret < 0) { - fprintf(stderr, "Create kernel PIC irqchip failed: %s\n", - strerror(ret)); - return ret; + error_setg(errp, "Create kernel PIC irqchip failed: %s", + strerror(ret)); + return; } switch (s->lost_tick_policy) { case LOST_TICK_DELAY: @@ -261,28 +276,29 @@ static int kvm_pit_initfn(PITCommonState *pit) ret = kvm_vm_ioctl(kvm_state, KVM_REINJECT_CONTROL, &control); if (ret < 0) { - fprintf(stderr, - "Can't disable in-kernel PIT reinjection: %s\n", - strerror(ret)); - return ret; + error_setg(errp, + "Can't disable in-kernel PIT reinjection: %s", + strerror(ret)); + return; } } break; default: - return -EINVAL; + error_setg(errp, "Lost tick policy not supported."); + return; } memory_region_init_reservation(&pit->ioports, "kvm-pit", 4); - qdev_init_gpio_in(&pit->dev.qdev, kvm_pit_irq_control, 1); + qdev_init_gpio_in(dev, kvm_pit_irq_control, 1); qemu_add_vm_change_state_handler(kvm_pit_vm_state_change, s); - return 0; + kpc->parent_realize(dev, errp); } static Property kvm_pit_properties[] = { - DEFINE_PROP_HEX32("iobase", KVMPITState, pit.iobase, -1), + DEFINE_PROP_HEX32("iobase", PITCommonState, iobase, -1), DEFINE_PROP_LOSTTICKPOLICY("lost_tick_policy", KVMPITState, lost_tick_policy, LOST_TICK_DELAY), DEFINE_PROP_END_OF_LIST(), @@ -290,10 +306,12 @@ static Property kvm_pit_properties[] = { static void kvm_pit_class_init(ObjectClass *klass, void *data) { + KVMPITClass *kpc = KVM_PIT_CLASS(klass); PITCommonClass *k = PIT_COMMON_CLASS(klass); DeviceClass *dc = DEVICE_CLASS(klass); - k->init = kvm_pit_initfn; + kpc->parent_realize = dc->realize; + dc->realize = kvm_pit_realizefn; k->set_channel_gate = kvm_pit_set_gate; k->get_channel_info = kvm_pit_get_channel_info; k->pre_save = kvm_pit_get; @@ -303,10 +321,11 @@ static void kvm_pit_class_init(ObjectClass *klass, void *data) } static const TypeInfo kvm_pit_info = { - .name = "kvm-pit", + .name = TYPE_KVM_I8254, .parent = TYPE_PIT_COMMON, .instance_size = sizeof(KVMPITState), .class_init = kvm_pit_class_init, + .class_size = sizeof(KVMPITClass), }; static void kvm_pit_register(void) diff --git a/hw/i386/kvm/i8259.c b/hw/i386/kvm/i8259.c index d961ecabbd..125022422a 100644 --- a/hw/i386/kvm/i8259.c +++ b/hw/i386/kvm/i8259.c @@ -13,6 +13,22 @@ #include "hw/i386/apic_internal.h" #include "sysemu/kvm.h" +#define TYPE_KVM_I8259 "kvm-i8259" +#define KVM_PIC_CLASS(class) \ + OBJECT_CLASS_CHECK(KVMPICClass, (class), TYPE_KVM_I8259) +#define KVM_PIC_GET_CLASS(obj) \ + OBJECT_GET_CLASS(KVMPICClass, (obj), TYPE_KVM_I8259) + +/** + * KVMPICClass: + * @parent_realize: The parent's realizefn. + */ +typedef struct KVMPICClass { + PICCommonClass parent_class; + + DeviceRealize parent_realize; +} KVMPICClass; + static void kvm_pic_get(PICCommonState *s) { struct kvm_irqchip chip; @@ -98,36 +114,44 @@ static void kvm_pic_set_irq(void *opaque, int irq, int level) apic_report_irq_delivered(delivered); } -static void kvm_pic_init(PICCommonState *s) +static void kvm_pic_realize(DeviceState *dev, Error **errp) { + PICCommonState *s = PIC_COMMON(dev); + KVMPICClass *kpc = KVM_PIC_GET_CLASS(dev); + memory_region_init_reservation(&s->base_io, "kvm-pic", 2); memory_region_init_reservation(&s->elcr_io, "kvm-elcr", 1); + + kpc->parent_realize(dev, errp); } qemu_irq *kvm_i8259_init(ISABus *bus) { - i8259_init_chip("kvm-i8259", bus, true); - i8259_init_chip("kvm-i8259", bus, false); + i8259_init_chip(TYPE_KVM_I8259, bus, true); + i8259_init_chip(TYPE_KVM_I8259, bus, false); return qemu_allocate_irqs(kvm_pic_set_irq, NULL, ISA_NUM_IRQS); } static void kvm_i8259_class_init(ObjectClass *klass, void *data) { + KVMPICClass *kpc = KVM_PIC_CLASS(klass); PICCommonClass *k = PIC_COMMON_CLASS(klass); DeviceClass *dc = DEVICE_CLASS(klass); dc->reset = kvm_pic_reset; - k->init = kvm_pic_init; + kpc->parent_realize = dc->realize; + dc->realize = kvm_pic_realize; k->pre_save = kvm_pic_get; k->post_load = kvm_pic_put; } static const TypeInfo kvm_i8259_info = { - .name = "kvm-i8259", + .name = TYPE_KVM_I8259, .parent = TYPE_PIC_COMMON, .instance_size = sizeof(PICCommonState), .class_init = kvm_i8259_class_init, + .class_size = sizeof(KVMPICClass), }; static void kvm_pic_register_types(void) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 553becbd42..e0fbb860ed 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -522,23 +522,29 @@ static const MemoryRegionOps port92_ops = { .endianness = DEVICE_LITTLE_ENDIAN, }; -static int port92_initfn(ISADevice *dev) +static void port92_initfn(Object *obj) { - Port92State *s = PORT92(dev); + Port92State *s = PORT92(obj); memory_region_init_io(&s->io, &port92_ops, s, "port92", 1); - isa_register_ioport(dev, &s->io, 0x92); s->outport = 0; - return 0; +} + +static void port92_realizefn(DeviceState *dev, Error **errp) +{ + ISADevice *isadev = ISA_DEVICE(dev); + Port92State *s = PORT92(dev); + + isa_register_ioport(isadev, &s->io, 0x92); } static void port92_class_initfn(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); - ISADeviceClass *ic = ISA_DEVICE_CLASS(klass); - ic->init = port92_initfn; + dc->no_user = 1; + dc->realize = port92_realizefn; dc->reset = port92_reset; dc->vmsd = &vmstate_port92_isa; } @@ -547,6 +553,7 @@ static const TypeInfo port92_info = { .name = TYPE_PORT92, .parent = TYPE_ISA_DEVICE, .instance_size = sizeof(Port92State), + .instance_init = port92_initfn, .class_init = port92_class_initfn, }; @@ -1093,7 +1100,7 @@ DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus) dev = pcidev ? &pcidev->qdev : NULL; } else if (isa_bus) { ISADevice *isadev = isa_vga_init(isa_bus); - dev = isadev ? &isadev->qdev : NULL; + dev = isadev ? DEVICE(isadev) : NULL; } return dev; } @@ -1180,7 +1187,7 @@ void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi, } if (hpet) { /* connect PIT to output control line of the HPET */ - qdev_connect_gpio_out(hpet, 0, qdev_get_gpio_in(&pit->qdev, 0)); + qdev_connect_gpio_out(hpet, 0, qdev_get_gpio_in(DEVICE(pit), 0)); } pcspk_init(isa_bus, pit); } @@ -1208,8 +1215,9 @@ void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi, vmmouse = NULL; } if (vmmouse) { - qdev_prop_set_ptr(&vmmouse->qdev, "ps2_mouse", i8042); - qdev_init_nofail(&vmmouse->qdev); + DeviceState *dev = DEVICE(vmmouse); + qdev_prop_set_ptr(dev, "ps2_mouse", i8042); + qdev_init_nofail(dev); } port92 = isa_create_simple(isa_bus, "port92"); port92_init(port92, &a20_line[1]); diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 69eb2a17be..97362f2c26 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -199,7 +199,7 @@ static void pc_init1(MemoryRegion *system_memory, dev = isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i], ide_irq[i], hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]); - idebus[i] = qdev_get_child_bus(&dev->qdev, "ide.0"); + idebus[i] = qdev_get_child_bus(DEVICE(dev), "ide.0"); } } diff --git a/hw/i386/smbios.c b/hw/i386/smbios.c index c00bb2fad8..e708cb8919 100644 --- a/hw/i386/smbios.c +++ b/hw/i386/smbios.c @@ -13,6 +13,7 @@ * GNU GPL, version 2 or (at your option) any later version. */ +#include "qemu/error-report.h" #include "sysemu/sysemu.h" #include "hw/i386/smbios.h" #include "hw/loader.h" @@ -48,8 +49,7 @@ static int smbios_type4_count = 0; static void smbios_validate_table(void) { if (smbios_type4_count && smbios_type4_count != smp_cpus) { - fprintf(stderr, - "Number of SMBIOS Type 4 tables must match cpu count.\n"); + error_report("Number of SMBIOS Type 4 tables must match cpu count"); exit(1); } } @@ -82,16 +82,16 @@ static void smbios_check_collision(int type, int entry) if (entry == SMBIOS_TABLE_ENTRY && header->type == SMBIOS_FIELD_ENTRY) { struct smbios_field *field = (void *)header; if (type == field->type) { - fprintf(stderr, "SMBIOS type %d field already defined, " - "cannot add table\n", type); + error_report("SMBIOS type %d field already defined, " + "cannot add table", type); exit(1); } } else if (entry == SMBIOS_FIELD_ENTRY && header->type == SMBIOS_TABLE_ENTRY) { struct smbios_structure_header *table = (void *)(header + 1); if (type == table->type) { - fprintf(stderr, "SMBIOS type %d table already defined, " - "cannot add field\n", type); + error_report("SMBIOS type %d table already defined, " + "cannot add field", type); exit(1); } } @@ -99,7 +99,7 @@ static void smbios_check_collision(int type, int entry) } } -void smbios_add_field(int type, int offset, int len, void *data) +void smbios_add_field(int type, int offset, const void *data, size_t len) { struct smbios_field *field; @@ -127,24 +127,29 @@ void smbios_add_field(int type, int offset, int len, void *data) static void smbios_build_type_0_fields(const char *t) { char buf[1024]; + unsigned char major, minor; if (get_param_value(buf, sizeof(buf), "vendor", t)) smbios_add_field(0, offsetof(struct smbios_type_0, vendor_str), - strlen(buf) + 1, buf); + buf, strlen(buf) + 1); if (get_param_value(buf, sizeof(buf), "version", t)) smbios_add_field(0, offsetof(struct smbios_type_0, bios_version_str), - strlen(buf) + 1, buf); + buf, strlen(buf) + 1); if (get_param_value(buf, sizeof(buf), "date", t)) smbios_add_field(0, offsetof(struct smbios_type_0, bios_release_date_str), - strlen(buf) + 1, buf); + buf, strlen(buf) + 1); if (get_param_value(buf, sizeof(buf), "release", t)) { - int major, minor; - sscanf(buf, "%d.%d", &major, &minor); + if (sscanf(buf, "%hhu.%hhu", &major, &minor) != 2) { + error_report("Invalid release"); + exit(1); + } smbios_add_field(0, offsetof(struct smbios_type_0, - system_bios_major_release), 1, &major); + system_bios_major_release), + &major, 1); smbios_add_field(0, offsetof(struct smbios_type_0, - system_bios_minor_release), 1, &minor); + system_bios_minor_release), + &minor, 1); } } @@ -154,28 +159,28 @@ static void smbios_build_type_1_fields(const char *t) if (get_param_value(buf, sizeof(buf), "manufacturer", t)) smbios_add_field(1, offsetof(struct smbios_type_1, manufacturer_str), - strlen(buf) + 1, buf); + buf, strlen(buf) + 1); if (get_param_value(buf, sizeof(buf), "product", t)) smbios_add_field(1, offsetof(struct smbios_type_1, product_name_str), - strlen(buf) + 1, buf); + buf, strlen(buf) + 1); if (get_param_value(buf, sizeof(buf), "version", t)) smbios_add_field(1, offsetof(struct smbios_type_1, version_str), - strlen(buf) + 1, buf); + buf, strlen(buf) + 1); if (get_param_value(buf, sizeof(buf), "serial", t)) smbios_add_field(1, offsetof(struct smbios_type_1, serial_number_str), - strlen(buf) + 1, buf); + buf, strlen(buf) + 1); if (get_param_value(buf, sizeof(buf), "uuid", t)) { if (qemu_uuid_parse(buf, qemu_uuid) != 0) { - fprintf(stderr, "Invalid SMBIOS UUID string\n"); + error_report("Invalid UUID"); exit(1); } } if (get_param_value(buf, sizeof(buf), "sku", t)) smbios_add_field(1, offsetof(struct smbios_type_1, sku_number_str), - strlen(buf) + 1, buf); + buf, strlen(buf) + 1); if (get_param_value(buf, sizeof(buf), "family", t)) smbios_add_field(1, offsetof(struct smbios_type_1, family_str), - strlen(buf) + 1, buf); + buf, strlen(buf) + 1); } int smbios_entry_add(const char *t) @@ -188,7 +193,7 @@ int smbios_entry_add(const char *t) int size = get_image_size(buf); if (size == -1 || size < sizeof(struct smbios_structure_header)) { - fprintf(stderr, "Cannot read smbios file %s\n", buf); + error_report("Cannot read SMBIOS file %s", buf); exit(1); } @@ -204,7 +209,7 @@ int smbios_entry_add(const char *t) table->header.length = cpu_to_le16(sizeof(*table) + size); if (load_image(buf, table->data) != size) { - fprintf(stderr, "Failed to load smbios file %s", buf); + error_report("Failed to load SMBIOS file %s", buf); exit(1); } @@ -230,12 +235,12 @@ int smbios_entry_add(const char *t) smbios_build_type_1_fields(t); return 0; default: - fprintf(stderr, "Don't know how to build fields for SMBIOS type " - "%ld\n", type); + error_report("Don't know how to build fields for SMBIOS type %ld", + type); exit(1); } } - fprintf(stderr, "smbios: must specify type= or file=\n"); + error_report("Must specify type= or file="); return -1; } diff --git a/hw/ide/isa.c b/hw/ide/isa.c index 369a7fa58a..7243c82c0f 100644 --- a/hw/ide/isa.c +++ b/hw/ide/isa.c @@ -65,16 +65,16 @@ static const VMStateDescription vmstate_ide_isa = { } }; -static int isa_ide_initfn(ISADevice *dev) +static void isa_ide_realizefn(DeviceState *dev, Error **errp) { + ISADevice *isadev = ISA_DEVICE(dev); ISAIDEState *s = ISA_IDE(dev); - ide_bus_new(&s->bus, DEVICE(dev), 0, 2); - ide_init_ioport(&s->bus, dev, s->iobase, s->iobase2); - isa_init_irq(dev, &s->irq, s->isairq); + ide_bus_new(&s->bus, dev, 0, 2); + ide_init_ioport(&s->bus, isadev, s->iobase, s->iobase2); + isa_init_irq(isadev, &s->irq, s->isairq); ide_init2(&s->bus, s->irq); - vmstate_register(&dev->qdev, 0, &vmstate_ide_isa, s); - return 0; + vmstate_register(dev, 0, &vmstate_ide_isa, s); }; ISADevice *isa_ide_init(ISABus *bus, int iobase, int iobase2, int isairq, @@ -113,8 +113,8 @@ static Property isa_ide_properties[] = { static void isa_ide_class_initfn(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); - ISADeviceClass *ic = ISA_DEVICE_CLASS(klass); - ic->init = isa_ide_initfn; + + dc->realize = isa_ide_realizefn; dc->fw_name = "ide"; dc->reset = isa_ide_reset; dc->props = isa_ide_properties; diff --git a/hw/input/pckbd.c b/hw/input/pckbd.c index 17a56140de..fff0a4d1f8 100644 --- a/hw/input/pckbd.c +++ b/hw/input/pckbd.c @@ -489,31 +489,37 @@ static const MemoryRegionOps i8042_cmd_ops = { .endianness = DEVICE_LITTLE_ENDIAN, }; -static int i8042_initfn(ISADevice *dev) +static void i8042_initfn(Object *obj) { - ISAKBDState *isa_s = I8042(dev); + ISAKBDState *isa_s = I8042(obj); KBDState *s = &isa_s->kbd; - isa_init_irq(dev, &s->irq_kbd, 1); - isa_init_irq(dev, &s->irq_mouse, 12); - memory_region_init_io(isa_s->io + 0, &i8042_data_ops, s, "i8042-data", 1); - isa_register_ioport(dev, isa_s->io + 0, 0x60); - memory_region_init_io(isa_s->io + 1, &i8042_cmd_ops, s, "i8042-cmd", 1); - isa_register_ioport(dev, isa_s->io + 1, 0x64); +} + +static void i8042_realizefn(DeviceState *dev, Error **errp) +{ + ISADevice *isadev = ISA_DEVICE(dev); + ISAKBDState *isa_s = I8042(dev); + KBDState *s = &isa_s->kbd; + + isa_init_irq(isadev, &s->irq_kbd, 1); + isa_init_irq(isadev, &s->irq_mouse, 12); + + isa_register_ioport(isadev, isa_s->io + 0, 0x60); + isa_register_ioport(isadev, isa_s->io + 1, 0x64); s->kbd = ps2_kbd_init(kbd_update_kbd_irq, s); s->mouse = ps2_mouse_init(kbd_update_aux_irq, s); qemu_register_reset(kbd_reset, s); - return 0; } static void i8042_class_initfn(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); - ISADeviceClass *ic = ISA_DEVICE_CLASS(klass); - ic->init = i8042_initfn; + + dc->realize = i8042_realizefn; dc->no_user = 1; dc->vmsd = &vmstate_kbd_isa; } @@ -522,6 +528,7 @@ static const TypeInfo i8042_info = { .name = TYPE_I8042, .parent = TYPE_ISA_DEVICE, .instance_size = sizeof(ISAKBDState), + .instance_init = i8042_initfn, .class_init = i8042_class_initfn, }; diff --git a/hw/input/vmmouse.c b/hw/input/vmmouse.c index a610738374..abd032b794 100644 --- a/hw/input/vmmouse.c +++ b/hw/input/vmmouse.c @@ -261,7 +261,7 @@ static void vmmouse_reset(DeviceState *d) vmmouse_disable(s); } -static int vmmouse_initfn(ISADevice *dev) +static void vmmouse_realizefn(DeviceState *dev, Error **errp) { VMMouseState *s = VMMOUSE(dev); @@ -270,8 +270,6 @@ static int vmmouse_initfn(ISADevice *dev) vmport_register(VMMOUSE_STATUS, vmmouse_ioport_read, s); vmport_register(VMMOUSE_COMMAND, vmmouse_ioport_read, s); vmport_register(VMMOUSE_DATA, vmmouse_ioport_read, s); - - return 0; } static Property vmmouse_properties[] = { @@ -282,8 +280,8 @@ static Property vmmouse_properties[] = { static void vmmouse_class_initfn(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); - ISADeviceClass *ic = ISA_DEVICE_CLASS(klass); - ic->init = vmmouse_initfn; + + dc->realize = vmmouse_realizefn; dc->no_user = 1; dc->reset = vmmouse_reset; dc->vmsd = &vmstate_vmmouse; diff --git a/hw/intc/i8259.c b/hw/intc/i8259.c index fef00fca75..192a0ba68f 100644 --- a/hw/intc/i8259.c +++ b/hw/intc/i8259.c @@ -41,6 +41,20 @@ //#define DEBUG_IRQ_LATENCY //#define DEBUG_IRQ_COUNT +#define TYPE_I8259 "isa-i8259" +#define PIC_CLASS(class) OBJECT_CLASS_CHECK(PICClass, (class), TYPE_I8259) +#define PIC_GET_CLASS(obj) OBJECT_GET_CLASS(PICClass, (obj), TYPE_I8259) + +/** + * PICClass: + * @parent_realize: The parent's realizefn. + */ +typedef struct PICClass { + PICCommonClass parent_class; + + DeviceRealize parent_realize; +} PICClass; + #if defined(DEBUG_PIC) || defined(DEBUG_IRQ_COUNT) static int irq_level[16]; #endif @@ -398,15 +412,18 @@ static const MemoryRegionOps pic_elcr_ioport_ops = { }, }; -static void pic_init(PICCommonState *s) +static void pic_realize(DeviceState *dev, Error **err) { - DeviceState *dev = DEVICE(s); + PICCommonState *s = PIC_COMMON(dev); + PICClass *pc = PIC_GET_CLASS(dev); memory_region_init_io(&s->base_io, &pic_base_ioport_ops, s, "pic", 2); memory_region_init_io(&s->elcr_io, &pic_elcr_ioport_ops, s, "elcr", 1); qdev_init_gpio_out(dev, s->int_out, ARRAY_SIZE(s->int_out)); qdev_init_gpio_in(dev, pic_set_irq, 8); + + pc->parent_realize(dev, err); } void pic_info(Monitor *mon, const QDict *qdict) @@ -448,25 +465,28 @@ void irq_info(Monitor *mon, const QDict *qdict) qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq) { qemu_irq *irq_set; - ISADevice *dev; + DeviceState *dev; + ISADevice *isadev; int i; irq_set = g_malloc(ISA_NUM_IRQS * sizeof(qemu_irq)); - dev = i8259_init_chip("isa-i8259", bus, true); + isadev = i8259_init_chip(TYPE_I8259, bus, true); + dev = DEVICE(isadev); - qdev_connect_gpio_out(&dev->qdev, 0, parent_irq); + qdev_connect_gpio_out(dev, 0, parent_irq); for (i = 0 ; i < 8; i++) { - irq_set[i] = qdev_get_gpio_in(&dev->qdev, i); + irq_set[i] = qdev_get_gpio_in(dev, i); } - isa_pic = &dev->qdev; + isa_pic = dev; - dev = i8259_init_chip("isa-i8259", bus, false); + isadev = i8259_init_chip(TYPE_I8259, bus, false); + dev = DEVICE(isadev); - qdev_connect_gpio_out(&dev->qdev, 0, irq_set[2]); + qdev_connect_gpio_out(dev, 0, irq_set[2]); for (i = 0 ; i < 8; i++) { - irq_set[i + 8] = qdev_get_gpio_in(&dev->qdev, i); + irq_set[i + 8] = qdev_get_gpio_in(dev, i); } slave_pic = PIC_COMMON(dev); @@ -476,18 +496,20 @@ qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq) static void i8259_class_init(ObjectClass *klass, void *data) { - PICCommonClass *k = PIC_COMMON_CLASS(klass); + PICClass *k = PIC_CLASS(klass); DeviceClass *dc = DEVICE_CLASS(klass); - k->init = pic_init; + k->parent_realize = dc->realize; + dc->realize = pic_realize; dc->reset = pic_reset; } static const TypeInfo i8259_info = { - .name = "isa-i8259", + .name = TYPE_I8259, .instance_size = sizeof(PICCommonState), .parent = TYPE_PIC_COMMON, .class_init = i8259_class_init, + .class_size = sizeof(PICClass), }; static void pic_register_types(void) diff --git a/hw/intc/i8259_common.c b/hw/intc/i8259_common.c index c2ba6a5ad9..803d037f68 100644 --- a/hw/intc/i8259_common.c +++ b/hw/intc/i8259_common.c @@ -66,35 +66,32 @@ static int pic_dispatch_post_load(void *opaque, int version_id) return 0; } -static int pic_init_common(ISADevice *dev) +static void pic_common_realize(DeviceState *dev, Error **errp) { PICCommonState *s = PIC_COMMON(dev); - PICCommonClass *info = PIC_COMMON_GET_CLASS(s); - - info->init(s); isa_register_ioport(NULL, &s->base_io, s->iobase); if (s->elcr_addr != -1) { isa_register_ioport(NULL, &s->elcr_io, s->elcr_addr); } - qdev_set_legacy_instance_id(DEVICE(dev), s->iobase, 1); - - return 0; + qdev_set_legacy_instance_id(dev, s->iobase, 1); } ISADevice *i8259_init_chip(const char *name, ISABus *bus, bool master) { - ISADevice *dev; - - dev = isa_create(bus, name); - qdev_prop_set_uint32(&dev->qdev, "iobase", master ? 0x20 : 0xa0); - qdev_prop_set_uint32(&dev->qdev, "elcr_addr", master ? 0x4d0 : 0x4d1); - qdev_prop_set_uint8(&dev->qdev, "elcr_mask", master ? 0xf8 : 0xde); - qdev_prop_set_bit(&dev->qdev, "master", master); - qdev_init_nofail(&dev->qdev); - - return dev; + DeviceState *dev; + ISADevice *isadev; + + isadev = isa_create(bus, name); + dev = DEVICE(isadev); + qdev_prop_set_uint32(dev, "iobase", master ? 0x20 : 0xa0); + qdev_prop_set_uint32(dev, "elcr_addr", master ? 0x4d0 : 0x4d1); + qdev_prop_set_uint8(dev, "elcr_mask", master ? 0xf8 : 0xde); + qdev_prop_set_bit(dev, "master", master); + qdev_init_nofail(dev); + + return isadev; } static const VMStateDescription vmstate_pic_common = { @@ -135,13 +132,12 @@ static Property pic_properties_common[] = { static void pic_common_class_init(ObjectClass *klass, void *data) { - ISADeviceClass *ic = ISA_DEVICE_CLASS(klass); DeviceClass *dc = DEVICE_CLASS(klass); dc->vmsd = &vmstate_pic_common; dc->no_user = 1; dc->props = pic_properties_common; - ic->init = pic_init_common; + dc->realize = pic_common_realize; } static const TypeInfo pic_common_type = { diff --git a/hw/isa/i82378.c b/hw/isa/i82378.c index cced9aff26..a24cb98cba 100644 --- a/hw/isa/i82378.c +++ b/hw/isa/i82378.c @@ -168,7 +168,7 @@ static void i82378_request_pic_irq(void *opaque, int irq, int level) static void i82378_init(DeviceState *dev, I82378State *s) { - ISABus *isabus = DO_UPCAST(ISABus, qbus, qdev_get_child_bus(dev, "isa.0")); + ISABus *isabus = ISA_BUS(qdev_get_child_bus(dev, "isa.0")); ISADevice *pit; ISADevice *isa; qemu_irq *out0_irq; @@ -201,7 +201,7 @@ static void i82378_init(DeviceState *dev, I82378State *s) /* 2 82C37 (dma) */ isa = isa_create_simple(isabus, "i82374"); - qdev_connect_gpio_out(&isa->qdev, 0, s->out[1]); + qdev_connect_gpio_out(DEVICE(isa), 0, s->out[1]); /* timer */ isa_create_simple(isabus, "mc146818rtc"); diff --git a/hw/isa/isa-bus.c b/hw/isa/isa-bus.c index 7860b17d66..136d17ede0 100644 --- a/hw/isa/isa-bus.c +++ b/hw/isa/isa-bus.c @@ -55,7 +55,7 @@ ISABus *isa_bus_new(DeviceState *dev, MemoryRegion *address_space_io) qdev_init_nofail(dev); } - isabus = FROM_QBUS(ISABus, qbus_create(TYPE_ISA_BUS, dev, NULL)); + isabus = ISA_BUS(qbus_create(TYPE_ISA_BUS, dev, NULL)); isabus->address_space_io = address_space_io; return isabus; } @@ -76,7 +76,7 @@ void isa_bus_irqs(ISABus *bus, qemu_irq *irqs) */ qemu_irq isa_get_irq(ISADevice *dev, int isairq) { - assert(!dev || DO_UPCAST(ISABus, qbus, dev->qdev.parent_bus) == isabus); + assert(!dev || ISA_BUS(qdev_get_parent_bus(DEVICE(dev))) == isabus); if (isairq < 0 || isairq > 15) { hw_error("isa irq %d invalid", isairq); } @@ -119,18 +119,6 @@ void isa_register_portio_list(ISADevice *dev, uint16_t start, portio_list_add(piolist, isabus->address_space_io, start); } -static int isa_qdev_init(DeviceState *qdev) -{ - ISADevice *dev = ISA_DEVICE(qdev); - ISADeviceClass *klass = ISA_DEVICE_GET_CLASS(dev); - - if (klass->init) { - return klass->init(dev); - } - - return 0; -} - static void isa_device_init(Object *obj) { ISADevice *dev = ISA_DEVICE(obj); @@ -147,7 +135,7 @@ ISADevice *isa_create(ISABus *bus, const char *name) hw_error("Tried to create isa device %s with no isa bus present.", name); } - dev = qdev_create(&bus->qbus, name); + dev = qdev_create(BUS(bus), name); return ISA_DEVICE(dev); } @@ -159,7 +147,7 @@ ISADevice *isa_try_create(ISABus *bus, const char *name) hw_error("Tried to create isa device %s with no isa bus present.", name); } - dev = qdev_try_create(&bus->qbus, name); + dev = qdev_try_create(BUS(bus), name); return ISA_DEVICE(dev); } @@ -168,7 +156,7 @@ ISADevice *isa_create_simple(ISABus *bus, const char *name) ISADevice *dev; dev = isa_create(bus, name); - qdev_init_nofail(&dev->qdev); + qdev_init_nofail(DEVICE(dev)); return dev; } @@ -230,7 +218,6 @@ static const TypeInfo isabus_bridge_info = { static void isa_device_class_init(ObjectClass *klass, void *data) { DeviceClass *k = DEVICE_CLASS(klass); - k->init = isa_qdev_init; k->bus_type = TYPE_ISA_BUS; } @@ -253,7 +240,7 @@ static void isabus_register_types(void) static char *isabus_get_fw_dev_path(DeviceState *dev) { - ISADevice *d = (ISADevice*)dev; + ISADevice *d = ISA_DEVICE(dev); char path[40]; int off; diff --git a/hw/isa/pc87312.c b/hw/isa/pc87312.c index 82f7c80f9c..cc426df7f8 100644 --- a/hw/isa/pc87312.c +++ b/hw/isa/pc87312.c @@ -264,7 +264,7 @@ static void pc87312_reset(DeviceState *d) pc87312_soft_reset(s); } -static int pc87312_init(ISADevice *dev) +static void pc87312_realize(DeviceState *dev, Error **errp) { PC87312State *s; DeviceState *d; @@ -276,9 +276,10 @@ static int pc87312_init(ISADevice *dev) int i; s = PC87312(dev); - bus = isa_bus_from_device(dev); + isa = ISA_DEVICE(dev); + bus = isa_bus_from_device(isa); + isa_register_ioport(isa, &s->io, s->iobase); pc87312_hard_reset(s); - isa_register_ioport(dev, &s->io, s->iobase); if (is_parallel_enabled(s)) { chr = parallel_hds[0]; @@ -345,8 +346,6 @@ static int pc87312_init(ISADevice *dev) s->ide.dev = isa; trace_pc87312_info_ide(get_ide_iobase(s)); } - - return 0; } static void pc87312_initfn(Object *obj) @@ -378,9 +377,8 @@ static Property pc87312_properties[] = { static void pc87312_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); - ISADeviceClass *ic = ISA_DEVICE_CLASS(klass); - ic->init = pc87312_init; + dc->realize = pc87312_realize; dc->reset = pc87312_reset; dc->vmsd = &vmstate_pc87312; dc->props = pc87312_properties; diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index d750413a7e..1a1d4518ce 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -98,7 +98,7 @@ int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn) PCIDevice *d; d = pci_create_simple_multifunction(bus, devfn, true, "PIIX4"); - *isa_bus = DO_UPCAST(ISABus, qbus, qdev_get_child_bus(&d->qdev, "isa.0")); + *isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(d), "isa.0")); return d->devfn; } diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c index 52619276bd..391d90d14a 100644 --- a/hw/isa/vt82c686.c +++ b/hw/isa/vt82c686.c @@ -450,7 +450,7 @@ ISABus *vt82c686b_init(PCIBus *bus, int devfn) d = pci_create_simple_multifunction(bus, devfn, true, "VT82C686B"); - return DO_UPCAST(ISABus, qbus, qdev_get_child_bus(&d->qdev, "isa.0")); + return ISA_BUS(qdev_get_child_bus(DEVICE(d), "isa.0")); } static void via_class_init(ObjectClass *klass, void *data) diff --git a/hw/misc/applesmc.c b/hw/misc/applesmc.c index 78904a816b..46f4fbd005 100644 --- a/hw/misc/applesmc.c +++ b/hw/misc/applesmc.c @@ -201,7 +201,7 @@ static void qdev_applesmc_isa_reset(DeviceState *dev) applesmc_add_key(s, "MSSD", 1, "\0x3"); } -static int applesmc_isa_init(ISADevice *dev) +static void applesmc_isa_realize(DeviceState *dev, Error **errp) { AppleSMCState *s = APPLE_SMC(dev); @@ -220,9 +220,7 @@ static int applesmc_isa_init(ISADevice *dev) } QLIST_INIT(&s->data_def); - qdev_applesmc_isa_reset(&dev->qdev); - - return 0; + qdev_applesmc_isa_reset(dev); } static Property applesmc_isa_properties[] = { @@ -235,8 +233,8 @@ static Property applesmc_isa_properties[] = { static void qdev_applesmc_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); - ISADeviceClass *ic = ISA_DEVICE_CLASS(klass); - ic->init = applesmc_isa_init; + + dc->realize = applesmc_isa_realize; dc->reset = qdev_applesmc_isa_reset; dc->props = applesmc_isa_properties; } diff --git a/hw/misc/debugexit.c b/hw/misc/debugexit.c index 59bed5bff5..ee254e46d2 100644 --- a/hw/misc/debugexit.c +++ b/hw/misc/debugexit.c @@ -35,15 +35,15 @@ static const MemoryRegionOps debug_exit_ops = { .endianness = DEVICE_LITTLE_ENDIAN, }; -static int debug_exit_initfn(ISADevice *dev) +static void debug_exit_realizefn(DeviceState *d, Error **errp) { - ISADebugExitState *isa = ISA_DEBUG_EXIT_DEVICE(dev); + ISADevice *dev = ISA_DEVICE(d); + ISADebugExitState *isa = ISA_DEBUG_EXIT_DEVICE(d); memory_region_init_io(&isa->io, &debug_exit_ops, isa, TYPE_ISA_DEBUG_EXIT_DEVICE, isa->iosize); memory_region_add_subregion(isa_address_space_io(dev), isa->iobase, &isa->io); - return 0; } static Property debug_exit_properties[] = { @@ -55,8 +55,8 @@ static Property debug_exit_properties[] = { static void debug_exit_class_initfn(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); - ISADeviceClass *ic = ISA_DEVICE_CLASS(klass); - ic->init = debug_exit_initfn; + + dc->realize = debug_exit_realizefn; dc->props = debug_exit_properties; } diff --git a/hw/misc/pc-testdev.c b/hw/misc/pc-testdev.c index 32df175c10..e6707d69d4 100644 --- a/hw/misc/pc-testdev.c +++ b/hw/misc/pc-testdev.c @@ -142,9 +142,10 @@ static const MemoryRegionOps test_iomem_ops = { .endianness = DEVICE_LITTLE_ENDIAN, }; -static int init_test_device(ISADevice *isa) +static void testdev_realizefn(DeviceState *d, Error **errp) { - PCTestdev *dev = TESTDEV(isa); + ISADevice *isa = ISA_DEVICE(d); + PCTestdev *dev = TESTDEV(d); MemoryRegion *mem = isa_address_space(isa); MemoryRegion *io = isa_address_space_io(isa); @@ -161,15 +162,13 @@ static int init_test_device(ISADevice *isa) memory_region_add_subregion(io, 0xe4, &dev->flush); memory_region_add_subregion(io, 0x2000, &dev->irq); memory_region_add_subregion(mem, 0xff000000, &dev->iomem); - - return 0; } static void testdev_class_init(ObjectClass *klass, void *data) { - ISADeviceClass *k = ISA_DEVICE_CLASS(klass); + DeviceClass *dc = DEVICE_CLASS(klass); - k->init = init_test_device; + dc->realize = testdev_realizefn; } static const TypeInfo testdev_info = { diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c index 910e44f9d2..060099b553 100644 --- a/hw/misc/pvpanic.c +++ b/hw/misc/pvpanic.c @@ -86,14 +86,21 @@ static const MemoryRegionOps pvpanic_ops = { }, }; -static int pvpanic_isa_initfn(ISADevice *dev) +static void pvpanic_isa_initfn(Object *obj) { + PVPanicState *s = ISA_PVPANIC_DEVICE(obj); + + memory_region_init_io(&s->io, &pvpanic_ops, s, "pvpanic", 1); +} + +static void pvpanic_isa_realizefn(DeviceState *dev, Error **errp) +{ + ISADevice *d = ISA_DEVICE(dev); PVPanicState *s = ISA_PVPANIC_DEVICE(dev); static bool port_configured; FWCfgState *fw_cfg; - memory_region_init_io(&s->io, &pvpanic_ops, s, "pvpanic", 1); - isa_register_ioport(dev, &s->io, s->ioport); + isa_register_ioport(d, &s->io, s->ioport); if (!port_configured) { fw_cfg = fw_cfg_find(); @@ -104,8 +111,6 @@ static int pvpanic_isa_initfn(ISADevice *dev) port_configured = true; } } - - return 0; } int pvpanic_init(ISABus *bus) @@ -122,9 +127,8 @@ static Property pvpanic_isa_properties[] = { static void pvpanic_isa_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); - ISADeviceClass *ic = ISA_DEVICE_CLASS(klass); - ic->init = pvpanic_isa_initfn; + dc->realize = pvpanic_isa_realizefn; dc->no_user = 1; dc->props = pvpanic_isa_properties; } @@ -133,6 +137,7 @@ static TypeInfo pvpanic_isa_info = { .name = TYPE_ISA_PVPANIC_DEVICE, .parent = TYPE_ISA_DEVICE, .instance_size = sizeof(PVPanicState), + .instance_init = pvpanic_isa_initfn, .class_init = pvpanic_isa_class_init, }; diff --git a/hw/misc/sga.c b/hw/misc/sga.c index c842190999..08803e7ddc 100644 --- a/hw/misc/sga.c +++ b/hw/misc/sga.c @@ -38,17 +38,16 @@ typedef struct ISASGAState { ISADevice parent_obj; } ISASGAState; -static int sga_initfn(ISADevice *dev) +static void sga_realizefn(DeviceState *dev, Error **errp) { rom_add_vga(SGABIOS_FILENAME); - return 0; } static void sga_class_initfn(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); - ISADeviceClass *ic = ISA_DEVICE_CLASS(klass); - ic->init = sga_initfn; + + dc->realize = sga_realizefn; dc->desc = "Serial Graphics Adapter"; } diff --git a/hw/misc/vmport.c b/hw/misc/vmport.c index c14612905b..57b71f5248 100644 --- a/hw/misc/vmport.c +++ b/hw/misc/vmport.c @@ -137,25 +137,25 @@ static const MemoryRegionOps vmport_ops = { .endianness = DEVICE_LITTLE_ENDIAN, }; -static int vmport_initfn(ISADevice *dev) +static void vmport_realizefn(DeviceState *dev, Error **errp) { + ISADevice *isadev = ISA_DEVICE(dev); VMPortState *s = VMPORT(dev); memory_region_init_io(&s->io, &vmport_ops, s, "vmport", 1); - isa_register_ioport(dev, &s->io, 0x5658); + isa_register_ioport(isadev, &s->io, 0x5658); port_state = s; /* Register some generic port commands */ vmport_register(VMPORT_CMD_GETVERSION, vmport_cmd_get_version, NULL); vmport_register(VMPORT_CMD_GETRAMSIZE, vmport_cmd_ram_size, NULL); - return 0; } static void vmport_class_initfn(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); - ISADeviceClass *ic = ISA_DEVICE_CLASS(klass); - ic->init = vmport_initfn; + + dc->realize = vmport_realizefn; dc->no_user = 1; } diff --git a/hw/net/ne2000-isa.c b/hw/net/ne2000-isa.c index f8e610cfa2..9232abd466 100644 --- a/hw/net/ne2000-isa.c +++ b/hw/net/ne2000-isa.c @@ -66,24 +66,23 @@ static const VMStateDescription vmstate_isa_ne2000 = { } }; -static int isa_ne2000_initfn(ISADevice *dev) +static void isa_ne2000_realizefn(DeviceState *dev, Error **errp) { + ISADevice *isadev = ISA_DEVICE(dev); ISANE2000State *isa = ISA_NE2000(dev); NE2000State *s = &isa->ne2000; ne2000_setup_io(s, 0x20); - isa_register_ioport(dev, &s->io, isa->iobase); + isa_register_ioport(isadev, &s->io, isa->iobase); - isa_init_irq(dev, &s->irq, isa->isairq); + isa_init_irq(isadev, &s->irq, isa->isairq); qemu_macaddr_default_if_unset(&s->c.macaddr); ne2000_reset(s); s->nic = qemu_new_nic(&net_ne2000_isa_info, &s->c, - object_get_typename(OBJECT(dev)), dev->qdev.id, s); + object_get_typename(OBJECT(dev)), dev->id, s); qemu_format_nic_info_str(qemu_get_queue(s->nic), s->c.macaddr.a); - - return 0; } static Property ne2000_isa_properties[] = { @@ -96,8 +95,8 @@ static Property ne2000_isa_properties[] = { static void isa_ne2000_class_initfn(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); - ISADeviceClass *ic = ISA_DEVICE_CLASS(klass); - ic->init = isa_ne2000_initfn; + + dc->realize = isa_ne2000_realizefn; dc->props = ne2000_isa_properties; } diff --git a/hw/pci/pci.c b/hw/pci/pci.c index bb3879bd88..a3eb19ead2 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -1700,7 +1700,7 @@ static int pci_qdev_init(DeviceState *qdev) pci_dev->cap_present |= QEMU_PCI_CAP_EXPRESS; } - bus = FROM_QBUS(PCIBus, qdev_get_parent_bus(qdev)); + bus = PCI_BUS(qdev_get_parent_bus(qdev)); pci_dev = do_pci_register_device(pci_dev, bus, object_get_typename(OBJECT(qdev)), pci_dev->devfn); diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c index be8a50ec4a..4fdc1649fd 100644 --- a/hw/ppc/prep.c +++ b/hw/ppc/prep.c @@ -601,12 +601,13 @@ static void ppc_prep_init(QEMUMachineInitArgs *args) sysbus_connect_irq(&pcihost->busdev, 1, qdev_get_gpio_in(&pci->qdev, 11)); sysbus_connect_irq(&pcihost->busdev, 2, qdev_get_gpio_in(&pci->qdev, 9)); sysbus_connect_irq(&pcihost->busdev, 3, qdev_get_gpio_in(&pci->qdev, 11)); - isa_bus = DO_UPCAST(ISABus, qbus, qdev_get_child_bus(&pci->qdev, "isa.0")); + isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(pci), "isa.0")); /* Super I/O (parallel + serial ports) */ isa = isa_create(isa_bus, TYPE_PC87312); - qdev_prop_set_uint8(&isa->qdev, "config", 13); /* fdc, ser0, ser1, par0 */ - qdev_init_nofail(&isa->qdev); + dev = DEVICE(isa); + qdev_prop_set_uint8(dev, "config", 13); /* fdc, ser0, ser1, par0 */ + qdev_init_nofail(dev); /* Register 8 MB of ISA IO space (needed for non-contiguous map) */ memory_region_init_io(PPC_io_memory, &PPC_prep_io_ops, sysctrl, diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c index 2c2a111711..a6a3b76a76 100644 --- a/hw/sparc64/sun4u.c +++ b/hw/sparc64/sun4u.c @@ -585,8 +585,7 @@ pci_ebus_init(PCIBus *bus, int devfn, qemu_irq *irqs) ISABus *isa_bus; pci_dev = pci_create_simple(bus, devfn, "ebus"); - isa_bus = DO_UPCAST(ISABus, qbus, - qdev_get_child_bus(&pci_dev->qdev, "isa.0")); + isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(pci_dev), "isa.0")); isa_irq = qemu_allocate_irqs(isa_irq_handler, irqs, 16); isa_bus_irqs(isa_bus, isa_irq); return isa_bus; diff --git a/hw/ssi/ssi.c b/hw/ssi/ssi.c index 1264d9da23..2c25260875 100644 --- a/hw/ssi/ssi.c +++ b/hw/ssi/ssi.c @@ -103,7 +103,7 @@ SSIBus *ssi_create_bus(DeviceState *parent, const char *name) { BusState *bus; bus = qbus_create(TYPE_SSI_BUS, parent, name); - return FROM_QBUS(SSIBus, bus); + return SSI_BUS(bus); } uint32_t ssi_transfer(SSIBus *bus, uint32_t val) diff --git a/hw/timer/i8254.c b/hw/timer/i8254.c index 20c0c3601d..16c8dd687f 100644 --- a/hw/timer/i8254.c +++ b/hw/timer/i8254.c @@ -35,6 +35,15 @@ #define RW_STATE_WORD0 3 #define RW_STATE_WORD1 4 +#define PIT_CLASS(class) OBJECT_CLASS_CHECK(PITClass, (class), TYPE_I8254) +#define PIT_GET_CLASS(obj) OBJECT_GET_CLASS(PITClass, (obj), TYPE_I8254) + +typedef struct PITClass { + PITCommonClass parent_class; + + DeviceRealize parent_realize; +} PITClass; + static void pit_irq_timer_update(PITChannelState *s, int64_t current_time); static int pit_get_count(PITChannelState *s) @@ -265,7 +274,7 @@ static void pit_irq_timer(void *opaque) static void pit_reset(DeviceState *dev) { - PITCommonState *pit = DO_UPCAST(PITCommonState, dev.qdev, dev); + PITCommonState *pit = PIT_COMMON(dev); PITChannelState *s; pit_reset_common(pit); @@ -313,20 +322,22 @@ static void pit_post_load(PITCommonState *s) } } -static int pit_initfn(PITCommonState *pit) +static void pit_realizefn(DeviceState *dev, Error **err) { + PITCommonState *pit = PIT_COMMON(dev); + PITClass *pc = PIT_GET_CLASS(dev); PITChannelState *s; s = &pit->channels[0]; /* the timer 0 is connected to an IRQ */ s->irq_timer = qemu_new_timer_ns(vm_clock, pit_irq_timer, s); - qdev_init_gpio_out(&pit->dev.qdev, &s->irq, 1); + qdev_init_gpio_out(dev, &s->irq, 1); memory_region_init_io(&pit->ioports, &pit_ioport_ops, pit, "pit", 4); - qdev_init_gpio_in(&pit->dev.qdev, pit_irq_control, 1); + qdev_init_gpio_in(dev, pit_irq_control, 1); - return 0; + pc->parent_realize(dev, err); } static Property pit_properties[] = { @@ -336,10 +347,12 @@ static Property pit_properties[] = { static void pit_class_initfn(ObjectClass *klass, void *data) { + PITClass *pc = PIT_CLASS(klass); PITCommonClass *k = PIT_COMMON_CLASS(klass); DeviceClass *dc = DEVICE_CLASS(klass); - k->init = pit_initfn; + pc->parent_realize = dc->realize; + dc->realize = pit_realizefn; k->set_channel_gate = pit_set_channel_gate; k->get_channel_info = pit_get_channel_info_common; k->post_load = pit_post_load; @@ -348,10 +361,11 @@ static void pit_class_initfn(ObjectClass *klass, void *data) } static const TypeInfo pit_info = { - .name = "isa-pit", + .name = TYPE_I8254, .parent = TYPE_PIT_COMMON, .instance_size = sizeof(PITCommonState), .class_init = pit_class_initfn, + .class_size = sizeof(PITClass), }; static void pit_register_types(void) diff --git a/hw/timer/i8254_common.c b/hw/timer/i8254_common.c index 5342df4a34..4e5bf0b63c 100644 --- a/hw/timer/i8254_common.c +++ b/hw/timer/i8254_common.c @@ -166,22 +166,14 @@ void pit_reset_common(PITCommonState *pit) } } -static int pit_init_common(ISADevice *dev) +static void pit_common_realize(DeviceState *dev, Error **errp) { + ISADevice *isadev = ISA_DEVICE(dev); PITCommonState *pit = PIT_COMMON(dev); - PITCommonClass *c = PIT_COMMON_GET_CLASS(pit); - int ret; - - ret = c->init(pit); - if (ret < 0) { - return ret; - } - isa_register_ioport(dev, &pit->ioports, pit->iobase); + isa_register_ioport(isadev, &pit->ioports, pit->iobase); - qdev_set_legacy_instance_id(&dev->qdev, pit->iobase, 2); - - return 0; + qdev_set_legacy_instance_id(dev, pit->iobase, 2); } static const VMStateDescription vmstate_pit_channel = { @@ -286,10 +278,9 @@ static const VMStateDescription vmstate_pit_common = { static void pit_common_class_init(ObjectClass *klass, void *data) { - ISADeviceClass *ic = ISA_DEVICE_CLASS(klass); DeviceClass *dc = DEVICE_CLASS(klass); - ic->init = pit_init_common; + dc->realize = pit_common_realize; dc->vmsd = &vmstate_pit_common; dc->no_user = 1; } diff --git a/hw/timer/m48t59.c b/hw/timer/m48t59.c index 45753d88c5..bf6c4c876c 100644 --- a/hw/timer/m48t59.c +++ b/hw/timer/m48t59.c @@ -691,7 +691,7 @@ M48t59State *m48t59_init_isa(ISABus *bus, uint32_t io_base, uint16_t size, return s; } -static void m48t59_init_common(M48t59State *s) +static void m48t59_realize_common(M48t59State *s, Error **errp) { s->buffer = g_malloc0(s->size); if (s->model == 59) { @@ -703,27 +703,31 @@ static void m48t59_init_common(M48t59State *s) vmstate_register(NULL, -1, &vmstate_m48t59, s); } -static int m48t59_init_isa1(ISADevice *dev) +static void m48t59_isa_realize(DeviceState *dev, Error **errp) { + ISADevice *isadev = ISA_DEVICE(dev); M48t59ISAState *d = ISA_M48T59(dev); M48t59State *s = &d->state; - isa_init_irq(dev, &s->IRQ, 8); - m48t59_init_common(s); - - return 0; + isa_init_irq(isadev, &s->IRQ, 8); + m48t59_realize_common(s, errp); } static int m48t59_init1(SysBusDevice *dev) { M48t59SysBusState *d = FROM_SYSBUS(M48t59SysBusState, dev); M48t59State *s = &d->state; + Error *err = NULL; sysbus_init_irq(dev, &s->IRQ); memory_region_init_io(&s->iomem, &nvram_ops, s, "m48t59.nvram", s->size); sysbus_init_mmio(dev, &s->iomem); - m48t59_init_common(s); + m48t59_realize_common(s, &err); + if (err != NULL) { + error_free(err); + return -1; + } return 0; } @@ -738,8 +742,8 @@ static Property m48t59_isa_properties[] = { static void m48t59_isa_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); - ISADeviceClass *ic = ISA_DEVICE_CLASS(klass); - ic->init = m48t59_init_isa1; + + dc->realize = m48t59_isa_realize; dc->no_user = 1; dc->reset = m48t59_reset_isa; dc->props = m48t59_isa_properties; diff --git a/hw/timer/mc146818rtc.c b/hw/timer/mc146818rtc.c index 481604de35..9c4a7bd074 100644 --- a/hw/timer/mc146818rtc.c +++ b/hw/timer/mc146818rtc.c @@ -814,8 +814,9 @@ static void rtc_get_date(Object *obj, Visitor *v, void *opaque, visit_end_struct(v, errp); } -static int rtc_initfn(ISADevice *dev) +static void rtc_realizefn(DeviceState *dev, Error **errp) { + ISADevice *isadev = ISA_DEVICE(dev); RTCState *s = MC146818_RTC(dev); int base = 0x70; @@ -836,7 +837,7 @@ static int rtc_initfn(ISADevice *dev) s->base_year = 0; } - rtc_set_date_from_host(dev); + rtc_set_date_from_host(isadev); #ifdef TARGET_I386 switch (s->lost_tick_policy) { @@ -847,7 +848,8 @@ static int rtc_initfn(ISADevice *dev) case LOST_TICK_DISCARD: break; default: - return -EINVAL; + error_setg(errp, "Invalid lost tick policy."); + return; } #endif @@ -862,15 +864,13 @@ static int rtc_initfn(ISADevice *dev) qemu_register_suspend_notifier(&s->suspend_notifier); memory_region_init_io(&s->io, &cmos_ops, s, "rtc", 2); - isa_register_ioport(dev, &s->io, base); + isa_register_ioport(isadev, &s->io, base); - qdev_set_legacy_instance_id(&dev->qdev, base, 3); + qdev_set_legacy_instance_id(dev, base, 3); qemu_register_reset(rtc_reset, s); object_property_add(OBJECT(s), "date", "struct tm", rtc_get_date, NULL, NULL, s, NULL); - - return 0; } ISADevice *rtc_init(ISABus *bus, int base_year, qemu_irq intercept_irq) @@ -902,8 +902,8 @@ static Property mc146818rtc_properties[] = { static void rtc_class_initfn(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); - ISADeviceClass *ic = ISA_DEVICE_CLASS(klass); - ic->init = rtc_initfn; + + dc->realize = rtc_realizefn; dc->no_user = 1; dc->vmsd = &vmstate_rtc; dc->props = mc146818rtc_properties; diff --git a/hw/watchdog/wdt_ib700.c b/hw/watchdog/wdt_ib700.c index 6b8e33a286..d85c8945ec 100644 --- a/hw/watchdog/wdt_ib700.c +++ b/hw/watchdog/wdt_ib700.c @@ -97,7 +97,7 @@ static const VMStateDescription vmstate_ib700 = { } }; -static int wdt_ib700_init(ISADevice *dev) +static void wdt_ib700_realize(DeviceState *dev, Error **errp) { IB700State *s = IB700(dev); @@ -106,8 +106,6 @@ static int wdt_ib700_init(ISADevice *dev) s->timer = qemu_new_timer_ns(vm_clock, ib700_timer_expired, s); register_ioport_write(0x441, 2, 1, ib700_write_disable_reg, s); register_ioport_write(0x443, 2, 1, ib700_write_enable_reg, s); - - return 0; } static void wdt_ib700_reset(DeviceState *dev) @@ -127,8 +125,8 @@ static WatchdogTimerModel model = { static void wdt_ib700_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); - ISADeviceClass *ic = ISA_DEVICE_CLASS(klass); - ic->init = wdt_ib700_init; + + dc->realize = wdt_ib700_realize; dc->reset = wdt_ib700_reset; dc->vmsd = &vmstate_ib700; } diff --git a/include/hw/audio/pcspk.h b/include/hw/audio/pcspk.h index 7625137991..ef95dd1360 100644 --- a/include/hw/audio/pcspk.h +++ b/include/hw/audio/pcspk.h @@ -32,14 +32,16 @@ static inline ISADevice *pcspk_init(ISABus *bus, ISADevice *pit) { - ISADevice *dev; + DeviceState *dev; + ISADevice *isadev; - dev = isa_create(bus, TYPE_PC_SPEAKER); - qdev_prop_set_uint32(&dev->qdev, "iobase", 0x61); - qdev_prop_set_ptr(&dev->qdev, "pit", pit); - qdev_init_nofail(&dev->qdev); + isadev = isa_create(bus, TYPE_PC_SPEAKER); + dev = DEVICE(isadev); + qdev_prop_set_uint32(dev, "iobase", 0x61); + qdev_prop_set_ptr(dev, "pit", pit); + qdev_init_nofail(dev); - return dev; + return isadev; } #endif /* !HW_PCSPK_H */ diff --git a/include/hw/char/serial.h b/include/hw/char/serial.h index 9ab81f6321..85f58acd51 100644 --- a/include/hw/char/serial.h +++ b/include/hw/char/serial.h @@ -78,7 +78,7 @@ struct SerialState { extern const VMStateDescription vmstate_serial; extern const MemoryRegionOps serial_io_ops; -void serial_init_core(SerialState *s); +void serial_realize_core(SerialState *s, Error **errp); void serial_exit_core(SerialState *s); void serial_set_frequency(SerialState *s, uint32_t frequency); diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index fab9be51cc..7f0496764c 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -14,15 +14,17 @@ /* parallel.c */ static inline bool parallel_init(ISABus *bus, int index, CharDriverState *chr) { - ISADevice *dev; + DeviceState *dev; + ISADevice *isadev; - dev = isa_try_create(bus, "isa-parallel"); - if (!dev) { + isadev = isa_try_create(bus, "isa-parallel"); + if (!isadev) { return false; } - qdev_prop_set_uint32(&dev->qdev, "index", index); - qdev_prop_set_chr(&dev->qdev, "chardev", chr); - if (qdev_init(&dev->qdev) < 0) { + dev = DEVICE(isadev); + qdev_prop_set_uint32(dev, "index", index); + qdev_prop_set_chr(dev, "chardev", chr); + if (qdev_init(dev) < 0) { return false; } return true; @@ -155,18 +157,20 @@ int isa_vga_mm_init(hwaddr vram_base, /* ne2000.c */ static inline bool isa_ne2000_init(ISABus *bus, int base, int irq, NICInfo *nd) { - ISADevice *dev; + DeviceState *dev; + ISADevice *isadev; qemu_check_nic_model(nd, "ne2k_isa"); - dev = isa_try_create(bus, "ne2k_isa"); - if (!dev) { + isadev = isa_try_create(bus, "ne2k_isa"); + if (!isadev) { return false; } - qdev_prop_set_uint32(&dev->qdev, "iobase", base); - qdev_prop_set_uint32(&dev->qdev, "irq", irq); - qdev_set_nic_properties(&dev->qdev, nd); - qdev_init_nofail(&dev->qdev); + dev = DEVICE(isadev); + qdev_prop_set_uint32(dev, "iobase", base); + qdev_prop_set_uint32(dev, "irq", irq); + qdev_set_nic_properties(dev, nd); + qdev_init_nofail(dev); return true; } diff --git a/include/hw/i386/smbios.h b/include/hw/i386/smbios.h index 94e3641f9a..9babeaf270 100644 --- a/include/hw/i386/smbios.h +++ b/include/hw/i386/smbios.h @@ -14,7 +14,7 @@ */ int smbios_entry_add(const char *t); -void smbios_add_field(int type, int offset, int len, void *data); +void smbios_add_field(int type, int offset, const void *data, size_t len); uint8_t *smbios_get_table(size_t *length); /* diff --git a/include/hw/isa/i8259_internal.h b/include/hw/isa/i8259_internal.h index b4e757a461..cded509636 100644 --- a/include/hw/isa/i8259_internal.h +++ b/include/hw/isa/i8259_internal.h @@ -42,7 +42,7 @@ typedef struct PICCommonState PICCommonState; typedef struct PICCommonClass { ISADeviceClass parent_class; - void (*init)(PICCommonState *s); + void (*pre_save)(PICCommonState *s); void (*post_load)(PICCommonState *s); } PICCommonClass; diff --git a/include/hw/isa/isa.h b/include/hw/isa/isa.h index 82da37c11d..e1bf96ca69 100644 --- a/include/hw/isa/isa.h +++ b/include/hw/isa/isa.h @@ -22,17 +22,22 @@ typedef struct ISADeviceClass { DeviceClass parent_class; - int (*init)(ISADevice *dev); } ISADeviceClass; struct ISABus { - BusState qbus; + /*< private >*/ + BusState parent_obj; + /*< public >*/ + MemoryRegion *address_space_io; qemu_irq *irqs; }; struct ISADevice { - DeviceState qdev; + /*< private >*/ + DeviceState parent_obj; + /*< public >*/ + uint32_t isairq[2]; int nirqs; int ioport_id; diff --git a/include/hw/qdev-core.h b/include/hw/qdev-core.h index cf83d5471a..7fbffcbaad 100644 --- a/include/hw/qdev-core.h +++ b/include/hw/qdev-core.h @@ -261,8 +261,6 @@ void qbus_reset_all_fn(void *opaque); void qbus_free(BusState *bus); -#define FROM_QBUS(type, dev) DO_UPCAST(type, qbus, dev) - /* This should go away once we get rid of the NULL bus hack */ BusState *sysbus_get_default(void); diff --git a/include/hw/timer/i8254.h b/include/hw/timer/i8254.h index 75bb530ad9..434903348c 100644 --- a/include/hw/timer/i8254.h +++ b/include/hw/timer/i8254.h @@ -37,29 +37,36 @@ typedef struct PITChannelInfo { int out; } PITChannelInfo; +#define TYPE_I8254 "isa-pit" +#define TYPE_KVM_I8254 "kvm-pit" + static inline ISADevice *pit_init(ISABus *bus, int base, int isa_irq, qemu_irq alt_irq) { - ISADevice *dev; + DeviceState *dev; + ISADevice *d; - dev = isa_create(bus, "isa-pit"); - qdev_prop_set_uint32(&dev->qdev, "iobase", base); - qdev_init_nofail(&dev->qdev); - qdev_connect_gpio_out(&dev->qdev, 0, - isa_irq >= 0 ? isa_get_irq(dev, isa_irq) : alt_irq); + d = isa_create(bus, TYPE_I8254); + dev = DEVICE(d); + qdev_prop_set_uint32(dev, "iobase", base); + qdev_init_nofail(dev); + qdev_connect_gpio_out(dev, 0, + isa_irq >= 0 ? isa_get_irq(d, isa_irq) : alt_irq); - return dev; + return d; } static inline ISADevice *kvm_pit_init(ISABus *bus, int base) { - ISADevice *dev; + DeviceState *dev; + ISADevice *d; - dev = isa_create(bus, "kvm-pit"); - qdev_prop_set_uint32(&dev->qdev, "iobase", base); - qdev_init_nofail(&dev->qdev); + d = isa_create(bus, TYPE_KVM_I8254); + dev = DEVICE(d); + qdev_prop_set_uint32(dev, "iobase", base); + qdev_init_nofail(dev); - return dev; + return d; } void pit_set_gate(ISADevice *dev, int channel, int val); diff --git a/include/hw/timer/i8254_internal.h b/include/hw/timer/i8254_internal.h index e0cff0cf5a..61a1bfbc4e 100644 --- a/include/hw/timer/i8254_internal.h +++ b/include/hw/timer/i8254_internal.h @@ -68,7 +68,6 @@ typedef struct PITCommonState { typedef struct PITCommonClass { ISADeviceClass parent_class; - int (*init)(PITCommonState *s); void (*set_channel_gate)(PITCommonState *s, PITChannelState *sc, int val); void (*get_channel_info)(PITCommonState *s, PITChannelState *sc, PITChannelInfo *info); diff --git a/include/qemu/error-report.h b/include/qemu/error-report.h index c902cc10de..14c1719ad2 100644 --- a/include/qemu/error-report.h +++ b/include/qemu/error-report.h @@ -14,6 +14,7 @@ #define QEMU_ERROR_H #include <stdarg.h> +#include "qemu/compiler.h" typedef struct Location { /* all members are private to qemu-error.c */ diff --git a/include/qemu/log.h b/include/qemu/log.h index 6b0db02efc..fd76f913eb 100644 --- a/include/qemu/log.h +++ b/include/qemu/log.h @@ -2,6 +2,9 @@ #define QEMU_LOG_H #include <stdarg.h> +#include <stdbool.h> +#include <stdio.h> +#include "qemu/compiler.h" #ifdef NEED_CPU_H #include "disas/disas.h" #endif diff --git a/target-i386/cc_helper.c b/target-i386/cc_helper.c index 9daa1a06b8..ee04092b4e 100644 --- a/target-i386/cc_helper.c +++ b/target-i386/cc_helper.c @@ -331,7 +331,7 @@ target_ulong helper_read_eflags(CPUX86State *env) uint32_t eflags; eflags = cpu_cc_compute_all(env, CC_OP); - eflags |= (DF & DF_MASK); + eflags |= (env->df & DF_MASK); eflags |= env->eflags & ~(VM_MASK | RF_MASK); return eflags; } diff --git a/target-i386/cpu.h b/target-i386/cpu.h index 058c57fc19..62e3547310 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -1101,26 +1101,6 @@ static inline int cpu_mmu_index (CPUX86State *env) ? MMU_KSMAP_IDX : MMU_KERNEL_IDX; } -#undef EAX -#define EAX (env->regs[R_EAX]) -#undef ECX -#define ECX (env->regs[R_ECX]) -#undef EDX -#define EDX (env->regs[R_EDX]) -#undef EBX -#define EBX (env->regs[R_EBX]) -#undef ESP -#define ESP (env->regs[R_ESP]) -#undef EBP -#define EBP (env->regs[R_EBP]) -#undef ESI -#define ESI (env->regs[R_ESI]) -#undef EDI -#define EDI (env->regs[R_EDI]) -#undef EIP -#define EIP (env->eip) -#define DF (env->df) - #define CC_DST (env->cc_dst) #define CC_SRC (env->cc_src) #define CC_SRC2 (env->cc_src2) @@ -1214,7 +1194,7 @@ uint32_t cpu_cc_compute_all(CPUX86State *env1, int op); static inline uint32_t cpu_compute_eflags(CPUX86State *env) { - return env->eflags | cpu_cc_compute_all(env, CC_OP) | (DF & DF_MASK); + return env->eflags | cpu_cc_compute_all(env, CC_OP) | (env->df & DF_MASK); } /* NOTE: CC_OP must be modified manually to CC_OP_EFLAGS */ @@ -1222,7 +1202,7 @@ static inline void cpu_load_eflags(CPUX86State *env, int eflags, int update_mask) { CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C); - DF = 1 - (2 * ((eflags >> 10) & 1)); + env->df = 1 - (2 * ((eflags >> 10) & 1)); env->eflags = (env->eflags & ~update_mask) | (eflags & update_mask) | 0x2; } diff --git a/target-i386/excp_helper.c b/target-i386/excp_helper.c index 179ea82f0f..5319aef7df 100644 --- a/target-i386/excp_helper.c +++ b/target-i386/excp_helper.c @@ -87,7 +87,7 @@ static int check_exception(CPUX86State *env, int intno, int *error_code) /* * Signal an interruption. It is executed in the main CPU loop. * is_int is TRUE if coming from the int instruction. next_eip is the - * EIP value AFTER the interrupt instruction. It is only relevant if + * env->eip value AFTER the interrupt instruction. It is only relevant if * is_int is TRUE. */ static void QEMU_NORETURN raise_interrupt2(CPUX86State *env, int intno, diff --git a/target-i386/int_helper.c b/target-i386/int_helper.c index 74c7c36124..0555318938 100644 --- a/target-i386/int_helper.c +++ b/target-i386/int_helper.c @@ -45,7 +45,7 @@ void helper_divb_AL(CPUX86State *env, target_ulong t0) { unsigned int num, den, q, r; - num = (EAX & 0xffff); + num = (env->regs[R_EAX] & 0xffff); den = (t0 & 0xff); if (den == 0) { raise_exception(env, EXCP00_DIVZ); @@ -56,14 +56,14 @@ void helper_divb_AL(CPUX86State *env, target_ulong t0) } q &= 0xff; r = (num % den) & 0xff; - EAX = (EAX & ~0xffff) | (r << 8) | q; + env->regs[R_EAX] = (env->regs[R_EAX] & ~0xffff) | (r << 8) | q; } void helper_idivb_AL(CPUX86State *env, target_ulong t0) { int num, den, q, r; - num = (int16_t)EAX; + num = (int16_t)env->regs[R_EAX]; den = (int8_t)t0; if (den == 0) { raise_exception(env, EXCP00_DIVZ); @@ -74,14 +74,14 @@ void helper_idivb_AL(CPUX86State *env, target_ulong t0) } q &= 0xff; r = (num % den) & 0xff; - EAX = (EAX & ~0xffff) | (r << 8) | q; + env->regs[R_EAX] = (env->regs[R_EAX] & ~0xffff) | (r << 8) | q; } void helper_divw_AX(CPUX86State *env, target_ulong t0) { unsigned int num, den, q, r; - num = (EAX & 0xffff) | ((EDX & 0xffff) << 16); + num = (env->regs[R_EAX] & 0xffff) | ((env->regs[R_EDX] & 0xffff) << 16); den = (t0 & 0xffff); if (den == 0) { raise_exception(env, EXCP00_DIVZ); @@ -92,15 +92,15 @@ void helper_divw_AX(CPUX86State *env, target_ulong t0) } q &= 0xffff; r = (num % den) & 0xffff; - EAX = (EAX & ~0xffff) | q; - EDX = (EDX & ~0xffff) | r; + env->regs[R_EAX] = (env->regs[R_EAX] & ~0xffff) | q; + env->regs[R_EDX] = (env->regs[R_EDX] & ~0xffff) | r; } void helper_idivw_AX(CPUX86State *env, target_ulong t0) { int num, den, q, r; - num = (EAX & 0xffff) | ((EDX & 0xffff) << 16); + num = (env->regs[R_EAX] & 0xffff) | ((env->regs[R_EDX] & 0xffff) << 16); den = (int16_t)t0; if (den == 0) { raise_exception(env, EXCP00_DIVZ); @@ -111,8 +111,8 @@ void helper_idivw_AX(CPUX86State *env, target_ulong t0) } q &= 0xffff; r = (num % den) & 0xffff; - EAX = (EAX & ~0xffff) | q; - EDX = (EDX & ~0xffff) | r; + env->regs[R_EAX] = (env->regs[R_EAX] & ~0xffff) | q; + env->regs[R_EDX] = (env->regs[R_EDX] & ~0xffff) | r; } void helper_divl_EAX(CPUX86State *env, target_ulong t0) @@ -120,7 +120,7 @@ void helper_divl_EAX(CPUX86State *env, target_ulong t0) unsigned int den, r; uint64_t num, q; - num = ((uint32_t)EAX) | ((uint64_t)((uint32_t)EDX) << 32); + num = ((uint32_t)env->regs[R_EAX]) | ((uint64_t)((uint32_t)env->regs[R_EDX]) << 32); den = t0; if (den == 0) { raise_exception(env, EXCP00_DIVZ); @@ -130,8 +130,8 @@ void helper_divl_EAX(CPUX86State *env, target_ulong t0) if (q > 0xffffffff) { raise_exception(env, EXCP00_DIVZ); } - EAX = (uint32_t)q; - EDX = (uint32_t)r; + env->regs[R_EAX] = (uint32_t)q; + env->regs[R_EDX] = (uint32_t)r; } void helper_idivl_EAX(CPUX86State *env, target_ulong t0) @@ -139,7 +139,7 @@ void helper_idivl_EAX(CPUX86State *env, target_ulong t0) int den, r; int64_t num, q; - num = ((uint32_t)EAX) | ((uint64_t)((uint32_t)EDX) << 32); + num = ((uint32_t)env->regs[R_EAX]) | ((uint64_t)((uint32_t)env->regs[R_EDX]) << 32); den = t0; if (den == 0) { raise_exception(env, EXCP00_DIVZ); @@ -149,8 +149,8 @@ void helper_idivl_EAX(CPUX86State *env, target_ulong t0) if (q != (int32_t)q) { raise_exception(env, EXCP00_DIVZ); } - EAX = (uint32_t)q; - EDX = (uint32_t)r; + env->regs[R_EAX] = (uint32_t)q; + env->regs[R_EDX] = (uint32_t)r; } /* bcd */ @@ -160,10 +160,10 @@ void helper_aam(CPUX86State *env, int base) { int al, ah; - al = EAX & 0xff; + al = env->regs[R_EAX] & 0xff; ah = al / base; al = al % base; - EAX = (EAX & ~0xffff) | al | (ah << 8); + env->regs[R_EAX] = (env->regs[R_EAX] & ~0xffff) | al | (ah << 8); CC_DST = al; } @@ -171,10 +171,10 @@ void helper_aad(CPUX86State *env, int base) { int al, ah; - al = EAX & 0xff; - ah = (EAX >> 8) & 0xff; + al = env->regs[R_EAX] & 0xff; + ah = (env->regs[R_EAX] >> 8) & 0xff; al = ((ah * base) + al) & 0xff; - EAX = (EAX & ~0xffff) | al; + env->regs[R_EAX] = (env->regs[R_EAX] & ~0xffff) | al; CC_DST = al; } @@ -186,8 +186,8 @@ void helper_aaa(CPUX86State *env) eflags = cpu_cc_compute_all(env, CC_OP); af = eflags & CC_A; - al = EAX & 0xff; - ah = (EAX >> 8) & 0xff; + al = env->regs[R_EAX] & 0xff; + ah = (env->regs[R_EAX] >> 8) & 0xff; icarry = (al > 0xf9); if (((al & 0x0f) > 9) || af) { @@ -198,7 +198,7 @@ void helper_aaa(CPUX86State *env) eflags &= ~(CC_C | CC_A); al &= 0x0f; } - EAX = (EAX & ~0xffff) | al | (ah << 8); + env->regs[R_EAX] = (env->regs[R_EAX] & ~0xffff) | al | (ah << 8); CC_SRC = eflags; } @@ -210,8 +210,8 @@ void helper_aas(CPUX86State *env) eflags = cpu_cc_compute_all(env, CC_OP); af = eflags & CC_A; - al = EAX & 0xff; - ah = (EAX >> 8) & 0xff; + al = env->regs[R_EAX] & 0xff; + ah = (env->regs[R_EAX] >> 8) & 0xff; icarry = (al < 6); if (((al & 0x0f) > 9) || af) { @@ -222,7 +222,7 @@ void helper_aas(CPUX86State *env) eflags &= ~(CC_C | CC_A); al &= 0x0f; } - EAX = (EAX & ~0xffff) | al | (ah << 8); + env->regs[R_EAX] = (env->regs[R_EAX] & ~0xffff) | al | (ah << 8); CC_SRC = eflags; } @@ -234,7 +234,7 @@ void helper_daa(CPUX86State *env) eflags = cpu_cc_compute_all(env, CC_OP); cf = eflags & CC_C; af = eflags & CC_A; - old_al = al = EAX & 0xff; + old_al = al = env->regs[R_EAX] & 0xff; eflags = 0; if (((al & 0x0f) > 9) || af) { @@ -245,7 +245,7 @@ void helper_daa(CPUX86State *env) al = (al + 0x60) & 0xff; eflags |= CC_C; } - EAX = (EAX & ~0xff) | al; + env->regs[R_EAX] = (env->regs[R_EAX] & ~0xff) | al; /* well, speed is not an issue here, so we compute the flags by hand */ eflags |= (al == 0) << 6; /* zf */ eflags |= parity_table[al]; /* pf */ @@ -261,7 +261,7 @@ void helper_das(CPUX86State *env) eflags = cpu_cc_compute_all(env, CC_OP); cf = eflags & CC_C; af = eflags & CC_A; - al = EAX & 0xff; + al = env->regs[R_EAX] & 0xff; eflags = 0; al1 = al; @@ -276,7 +276,7 @@ void helper_das(CPUX86State *env) al = (al - 0x60) & 0xff; eflags |= CC_C; } - EAX = (EAX & ~0xff) | al; + env->regs[R_EAX] = (env->regs[R_EAX] & ~0xff) | al; /* well, speed is not an issue here, so we compute the flags by hand */ eflags |= (al == 0) << 6; /* zf */ eflags |= parity_table[al]; /* pf */ @@ -381,13 +381,13 @@ void helper_divq_EAX(CPUX86State *env, target_ulong t0) if (t0 == 0) { raise_exception(env, EXCP00_DIVZ); } - r0 = EAX; - r1 = EDX; + r0 = env->regs[R_EAX]; + r1 = env->regs[R_EDX]; if (div64(&r0, &r1, t0)) { raise_exception(env, EXCP00_DIVZ); } - EAX = r0; - EDX = r1; + env->regs[R_EAX] = r0; + env->regs[R_EDX] = r1; } void helper_idivq_EAX(CPUX86State *env, target_ulong t0) @@ -397,13 +397,13 @@ void helper_idivq_EAX(CPUX86State *env, target_ulong t0) if (t0 == 0) { raise_exception(env, EXCP00_DIVZ); } - r0 = EAX; - r1 = EDX; + r0 = env->regs[R_EAX]; + r1 = env->regs[R_EDX]; if (idiv64(&r0, &r1, t0)) { raise_exception(env, EXCP00_DIVZ); } - EAX = r0; - EDX = r1; + env->regs[R_EAX] = r0; + env->regs[R_EDX] = r1; } #endif diff --git a/target-i386/mem_helper.c b/target-i386/mem_helper.c index 6cf9ba076e..319a219f8a 100644 --- a/target-i386/mem_helper.c +++ b/target-i386/mem_helper.c @@ -45,14 +45,14 @@ void helper_cmpxchg8b(CPUX86State *env, target_ulong a0) eflags = cpu_cc_compute_all(env, CC_OP); d = cpu_ldq_data(env, a0); - if (d == (((uint64_t)EDX << 32) | (uint32_t)EAX)) { - cpu_stq_data(env, a0, ((uint64_t)ECX << 32) | (uint32_t)EBX); + if (d == (((uint64_t)env->regs[R_EDX] << 32) | (uint32_t)env->regs[R_EAX])) { + cpu_stq_data(env, a0, ((uint64_t)env->regs[R_ECX] << 32) | (uint32_t)env->regs[R_EBX]); eflags |= CC_Z; } else { /* always do the store */ cpu_stq_data(env, a0, d); - EDX = (uint32_t)(d >> 32); - EAX = (uint32_t)d; + env->regs[R_EDX] = (uint32_t)(d >> 32); + env->regs[R_EAX] = (uint32_t)d; eflags &= ~CC_Z; } CC_SRC = eflags; @@ -70,16 +70,16 @@ void helper_cmpxchg16b(CPUX86State *env, target_ulong a0) eflags = cpu_cc_compute_all(env, CC_OP); d0 = cpu_ldq_data(env, a0); d1 = cpu_ldq_data(env, a0 + 8); - if (d0 == EAX && d1 == EDX) { - cpu_stq_data(env, a0, EBX); - cpu_stq_data(env, a0 + 8, ECX); + if (d0 == env->regs[R_EAX] && d1 == env->regs[R_EDX]) { + cpu_stq_data(env, a0, env->regs[R_EBX]); + cpu_stq_data(env, a0 + 8, env->regs[R_ECX]); eflags |= CC_Z; } else { /* always do the store */ cpu_stq_data(env, a0, d0); cpu_stq_data(env, a0 + 8, d1); - EDX = d1; - EAX = d0; + env->regs[R_EDX] = d1; + env->regs[R_EAX] = d0; eflags &= ~CC_Z; } CC_SRC = eflags; diff --git a/target-i386/misc_helper.c b/target-i386/misc_helper.c index ec834fc67e..e345f9a1e7 100644 --- a/target-i386/misc_helper.c +++ b/target-i386/misc_helper.c @@ -122,11 +122,12 @@ void helper_cpuid(CPUX86State *env) cpu_svm_check_intercept_param(env, SVM_EXIT_CPUID, 0); - cpu_x86_cpuid(env, (uint32_t)EAX, (uint32_t)ECX, &eax, &ebx, &ecx, &edx); - EAX = eax; - EBX = ebx; - ECX = ecx; - EDX = edx; + cpu_x86_cpuid(env, (uint32_t)env->regs[R_EAX], (uint32_t)env->regs[R_ECX], + &eax, &ebx, &ecx, &edx); + env->regs[R_EAX] = eax; + env->regs[R_EBX] = ebx; + env->regs[R_ECX] = ecx; + env->regs[R_EDX] = edx; } #if defined(CONFIG_USER_ONLY) @@ -234,14 +235,14 @@ void helper_rdtsc(CPUX86State *env) cpu_svm_check_intercept_param(env, SVM_EXIT_RDTSC, 0); val = cpu_get_tsc(env) + env->tsc_offset; - EAX = (uint32_t)(val); - EDX = (uint32_t)(val >> 32); + env->regs[R_EAX] = (uint32_t)(val); + env->regs[R_EDX] = (uint32_t)(val >> 32); } void helper_rdtscp(CPUX86State *env) { helper_rdtsc(env); - ECX = (uint32_t)(env->tsc_aux); + env->regs[R_ECX] = (uint32_t)(env->tsc_aux); } void helper_rdpmc(CPUX86State *env) @@ -271,9 +272,10 @@ void helper_wrmsr(CPUX86State *env) cpu_svm_check_intercept_param(env, SVM_EXIT_MSR, 1); - val = ((uint32_t)EAX) | ((uint64_t)((uint32_t)EDX) << 32); + val = ((uint32_t)env->regs[R_EAX]) | + ((uint64_t)((uint32_t)env->regs[R_EDX]) << 32); - switch ((uint32_t)ECX) { + switch ((uint32_t)env->regs[R_ECX]) { case MSR_IA32_SYSENTER_CS: env->sysenter_cs = val & 0xffff; break; @@ -350,7 +352,8 @@ void helper_wrmsr(CPUX86State *env) case MSR_MTRRphysBase(5): case MSR_MTRRphysBase(6): case MSR_MTRRphysBase(7): - env->mtrr_var[((uint32_t)ECX - MSR_MTRRphysBase(0)) / 2].base = val; + env->mtrr_var[((uint32_t)env->regs[R_ECX] - + MSR_MTRRphysBase(0)) / 2].base = val; break; case MSR_MTRRphysMask(0): case MSR_MTRRphysMask(1): @@ -360,14 +363,17 @@ void helper_wrmsr(CPUX86State *env) case MSR_MTRRphysMask(5): case MSR_MTRRphysMask(6): case MSR_MTRRphysMask(7): - env->mtrr_var[((uint32_t)ECX - MSR_MTRRphysMask(0)) / 2].mask = val; + env->mtrr_var[((uint32_t)env->regs[R_ECX] - + MSR_MTRRphysMask(0)) / 2].mask = val; break; case MSR_MTRRfix64K_00000: - env->mtrr_fixed[(uint32_t)ECX - MSR_MTRRfix64K_00000] = val; + env->mtrr_fixed[(uint32_t)env->regs[R_ECX] - + MSR_MTRRfix64K_00000] = val; break; case MSR_MTRRfix16K_80000: case MSR_MTRRfix16K_A0000: - env->mtrr_fixed[(uint32_t)ECX - MSR_MTRRfix16K_80000 + 1] = val; + env->mtrr_fixed[(uint32_t)env->regs[R_ECX] - + MSR_MTRRfix16K_80000 + 1] = val; break; case MSR_MTRRfix4K_C0000: case MSR_MTRRfix4K_C8000: @@ -377,7 +383,8 @@ void helper_wrmsr(CPUX86State *env) case MSR_MTRRfix4K_E8000: case MSR_MTRRfix4K_F0000: case MSR_MTRRfix4K_F8000: - env->mtrr_fixed[(uint32_t)ECX - MSR_MTRRfix4K_C0000 + 3] = val; + env->mtrr_fixed[(uint32_t)env->regs[R_ECX] - + MSR_MTRRfix4K_C0000 + 3] = val; break; case MSR_MTRRdefType: env->mtrr_deftype = val; @@ -398,9 +405,10 @@ void helper_wrmsr(CPUX86State *env) env->msr_ia32_misc_enable = val; break; default: - if ((uint32_t)ECX >= MSR_MC0_CTL - && (uint32_t)ECX < MSR_MC0_CTL + (4 * env->mcg_cap & 0xff)) { - uint32_t offset = (uint32_t)ECX - MSR_MC0_CTL; + if ((uint32_t)env->regs[R_ECX] >= MSR_MC0_CTL + && (uint32_t)env->regs[R_ECX] < MSR_MC0_CTL + + (4 * env->mcg_cap & 0xff)) { + uint32_t offset = (uint32_t)env->regs[R_ECX] - MSR_MC0_CTL; if ((offset & 0x3) != 0 || (val == 0 || val == ~(uint64_t)0)) { env->mce_banks[offset] = val; @@ -418,7 +426,7 @@ void helper_rdmsr(CPUX86State *env) cpu_svm_check_intercept_param(env, SVM_EXIT_MSR, 0); - switch ((uint32_t)ECX) { + switch ((uint32_t)env->regs[R_ECX]) { case MSR_IA32_SYSENTER_CS: val = env->sysenter_cs; break; @@ -480,7 +488,8 @@ void helper_rdmsr(CPUX86State *env) case MSR_MTRRphysBase(5): case MSR_MTRRphysBase(6): case MSR_MTRRphysBase(7): - val = env->mtrr_var[((uint32_t)ECX - MSR_MTRRphysBase(0)) / 2].base; + val = env->mtrr_var[((uint32_t)env->regs[R_ECX] - + MSR_MTRRphysBase(0)) / 2].base; break; case MSR_MTRRphysMask(0): case MSR_MTRRphysMask(1): @@ -490,14 +499,16 @@ void helper_rdmsr(CPUX86State *env) case MSR_MTRRphysMask(5): case MSR_MTRRphysMask(6): case MSR_MTRRphysMask(7): - val = env->mtrr_var[((uint32_t)ECX - MSR_MTRRphysMask(0)) / 2].mask; + val = env->mtrr_var[((uint32_t)env->regs[R_ECX] - + MSR_MTRRphysMask(0)) / 2].mask; break; case MSR_MTRRfix64K_00000: val = env->mtrr_fixed[0]; break; case MSR_MTRRfix16K_80000: case MSR_MTRRfix16K_A0000: - val = env->mtrr_fixed[(uint32_t)ECX - MSR_MTRRfix16K_80000 + 1]; + val = env->mtrr_fixed[(uint32_t)env->regs[R_ECX] - + MSR_MTRRfix16K_80000 + 1]; break; case MSR_MTRRfix4K_C0000: case MSR_MTRRfix4K_C8000: @@ -507,7 +518,8 @@ void helper_rdmsr(CPUX86State *env) case MSR_MTRRfix4K_E8000: case MSR_MTRRfix4K_F0000: case MSR_MTRRfix4K_F8000: - val = env->mtrr_fixed[(uint32_t)ECX - MSR_MTRRfix4K_C0000 + 3]; + val = env->mtrr_fixed[(uint32_t)env->regs[R_ECX] - + MSR_MTRRfix4K_C0000 + 3]; break; case MSR_MTRRdefType: val = env->mtrr_deftype; @@ -538,9 +550,10 @@ void helper_rdmsr(CPUX86State *env) val = env->msr_ia32_misc_enable; break; default: - if ((uint32_t)ECX >= MSR_MC0_CTL - && (uint32_t)ECX < MSR_MC0_CTL + (4 * env->mcg_cap & 0xff)) { - uint32_t offset = (uint32_t)ECX - MSR_MC0_CTL; + if ((uint32_t)env->regs[R_ECX] >= MSR_MC0_CTL + && (uint32_t)env->regs[R_ECX] < MSR_MC0_CTL + + (4 * env->mcg_cap & 0xff)) { + uint32_t offset = (uint32_t)env->regs[R_ECX] - MSR_MC0_CTL; val = env->mce_banks[offset]; break; } @@ -548,8 +561,8 @@ void helper_rdmsr(CPUX86State *env) val = 0; break; } - EAX = (uint32_t)(val); - EDX = (uint32_t)(val >> 32); + env->regs[R_EAX] = (uint32_t)(val); + env->regs[R_EDX] = (uint32_t)(val >> 32); } #endif @@ -569,14 +582,14 @@ void helper_hlt(CPUX86State *env, int next_eip_addend) X86CPU *cpu = x86_env_get_cpu(env); cpu_svm_check_intercept_param(env, SVM_EXIT_HLT, 0); - EIP += next_eip_addend; + env->eip += next_eip_addend; do_hlt(cpu); } void helper_monitor(CPUX86State *env, target_ulong ptr) { - if ((uint32_t)ECX != 0) { + if ((uint32_t)env->regs[R_ECX] != 0) { raise_exception(env, EXCP0D_GPF); } /* XXX: store address? */ @@ -588,11 +601,11 @@ void helper_mwait(CPUX86State *env, int next_eip_addend) CPUState *cs; X86CPU *cpu; - if ((uint32_t)ECX != 0) { + if ((uint32_t)env->regs[R_ECX] != 0) { raise_exception(env, EXCP0D_GPF); } cpu_svm_check_intercept_param(env, SVM_EXIT_MWAIT, 0); - EIP += next_eip_addend; + env->eip += next_eip_addend; cpu = x86_env_get_cpu(env); cs = CPU(cpu); diff --git a/target-i386/seg_helper.c b/target-i386/seg_helper.c index 906e4f3d20..9c799e1009 100644 --- a/target-i386/seg_helper.c +++ b/target-i386/seg_helper.c @@ -324,14 +324,14 @@ static void switch_tss(CPUX86State *env, int tss_selector, /* 32 bit */ cpu_stl_kernel(env, env->tr.base + 0x20, next_eip); cpu_stl_kernel(env, env->tr.base + 0x24, old_eflags); - cpu_stl_kernel(env, env->tr.base + (0x28 + 0 * 4), EAX); - cpu_stl_kernel(env, env->tr.base + (0x28 + 1 * 4), ECX); - cpu_stl_kernel(env, env->tr.base + (0x28 + 2 * 4), EDX); - cpu_stl_kernel(env, env->tr.base + (0x28 + 3 * 4), EBX); - cpu_stl_kernel(env, env->tr.base + (0x28 + 4 * 4), ESP); - cpu_stl_kernel(env, env->tr.base + (0x28 + 5 * 4), EBP); - cpu_stl_kernel(env, env->tr.base + (0x28 + 6 * 4), ESI); - cpu_stl_kernel(env, env->tr.base + (0x28 + 7 * 4), EDI); + cpu_stl_kernel(env, env->tr.base + (0x28 + 0 * 4), env->regs[R_EAX]); + cpu_stl_kernel(env, env->tr.base + (0x28 + 1 * 4), env->regs[R_ECX]); + cpu_stl_kernel(env, env->tr.base + (0x28 + 2 * 4), env->regs[R_EDX]); + cpu_stl_kernel(env, env->tr.base + (0x28 + 3 * 4), env->regs[R_EBX]); + cpu_stl_kernel(env, env->tr.base + (0x28 + 4 * 4), env->regs[R_ESP]); + cpu_stl_kernel(env, env->tr.base + (0x28 + 5 * 4), env->regs[R_EBP]); + cpu_stl_kernel(env, env->tr.base + (0x28 + 6 * 4), env->regs[R_ESI]); + cpu_stl_kernel(env, env->tr.base + (0x28 + 7 * 4), env->regs[R_EDI]); for (i = 0; i < 6; i++) { cpu_stw_kernel(env, env->tr.base + (0x48 + i * 4), env->segs[i].selector); @@ -340,14 +340,14 @@ static void switch_tss(CPUX86State *env, int tss_selector, /* 16 bit */ cpu_stw_kernel(env, env->tr.base + 0x0e, next_eip); cpu_stw_kernel(env, env->tr.base + 0x10, old_eflags); - cpu_stw_kernel(env, env->tr.base + (0x12 + 0 * 2), EAX); - cpu_stw_kernel(env, env->tr.base + (0x12 + 1 * 2), ECX); - cpu_stw_kernel(env, env->tr.base + (0x12 + 2 * 2), EDX); - cpu_stw_kernel(env, env->tr.base + (0x12 + 3 * 2), EBX); - cpu_stw_kernel(env, env->tr.base + (0x12 + 4 * 2), ESP); - cpu_stw_kernel(env, env->tr.base + (0x12 + 5 * 2), EBP); - cpu_stw_kernel(env, env->tr.base + (0x12 + 6 * 2), ESI); - cpu_stw_kernel(env, env->tr.base + (0x12 + 7 * 2), EDI); + cpu_stw_kernel(env, env->tr.base + (0x12 + 0 * 2), env->regs[R_EAX]); + cpu_stw_kernel(env, env->tr.base + (0x12 + 1 * 2), env->regs[R_ECX]); + cpu_stw_kernel(env, env->tr.base + (0x12 + 2 * 2), env->regs[R_EDX]); + cpu_stw_kernel(env, env->tr.base + (0x12 + 3 * 2), env->regs[R_EBX]); + cpu_stw_kernel(env, env->tr.base + (0x12 + 4 * 2), env->regs[R_ESP]); + cpu_stw_kernel(env, env->tr.base + (0x12 + 5 * 2), env->regs[R_EBP]); + cpu_stw_kernel(env, env->tr.base + (0x12 + 6 * 2), env->regs[R_ESI]); + cpu_stw_kernel(env, env->tr.base + (0x12 + 7 * 2), env->regs[R_EDI]); for (i = 0; i < 4; i++) { cpu_stw_kernel(env, env->tr.base + (0x22 + i * 4), env->segs[i].selector); @@ -396,14 +396,14 @@ static void switch_tss(CPUX86State *env, int tss_selector, } cpu_load_eflags(env, new_eflags, eflags_mask); /* XXX: what to do in 16 bit case? */ - EAX = new_regs[0]; - ECX = new_regs[1]; - EDX = new_regs[2]; - EBX = new_regs[3]; - ESP = new_regs[4]; - EBP = new_regs[5]; - ESI = new_regs[6]; - EDI = new_regs[7]; + env->regs[R_EAX] = new_regs[0]; + env->regs[R_ECX] = new_regs[1]; + env->regs[R_EDX] = new_regs[2]; + env->regs[R_EBX] = new_regs[3]; + env->regs[R_ESP] = new_regs[4]; + env->regs[R_EBP] = new_regs[5]; + env->regs[R_ESI] = new_regs[6]; + env->regs[R_EDI] = new_regs[7]; if (new_eflags & VM_MASK) { for (i = 0; i < 6; i++) { load_seg_vm(env, i, new_segs[i]); @@ -457,7 +457,7 @@ static void switch_tss(CPUX86State *env, int tss_selector, tss_load_seg(env, R_GS, new_segs[R_GS]); } - /* check that EIP is in the CS segment limits */ + /* check that env->eip is in the CS segment limits */ if (new_eip > env->segs[R_CS].limit) { /* XXX: different exception if CALL? */ raise_exception_err(env, EXCP0D_GPF, 0); @@ -502,20 +502,22 @@ static int exception_has_error_code(int intno) } #ifdef TARGET_X86_64 -#define SET_ESP(val, sp_mask) \ - do { \ - if ((sp_mask) == 0xffff) { \ - ESP = (ESP & ~0xffff) | ((val) & 0xffff); \ - } else if ((sp_mask) == 0xffffffffLL) { \ - ESP = (uint32_t)(val); \ - } else { \ - ESP = (val); \ - } \ +#define SET_ESP(val, sp_mask) \ + do { \ + if ((sp_mask) == 0xffff) { \ + env->regs[R_ESP] = (env->regs[R_ESP] & ~0xffff) | \ + ((val) & 0xffff); \ + } else if ((sp_mask) == 0xffffffffLL) { \ + env->regs[R_ESP] = (uint32_t)(val); \ + } else { \ + env->regs[R_ESP] = (val); \ + } \ } while (0) #else -#define SET_ESP(val, sp_mask) \ - do { \ - ESP = (ESP & ~(sp_mask)) | ((val) & (sp_mask)); \ +#define SET_ESP(val, sp_mask) \ + do { \ + env->regs[R_ESP] = (env->regs[R_ESP] & ~(sp_mask)) | \ + ((val) & (sp_mask)); \ } while (0) #endif @@ -598,7 +600,7 @@ static void do_interrupt_protected(CPUX86State *env, int intno, int is_int, } else { mask = 0xffff; } - esp = (ESP - (2 << shift)) & mask; + esp = (env->regs[R_ESP] - (2 << shift)) & mask; ssp = env->segs[R_SS].base + esp; if (shift) { cpu_stl_kernel(env, ssp, error_code); @@ -680,7 +682,7 @@ static void do_interrupt_protected(CPUX86State *env, int intno, int is_int, new_stack = 0; sp_mask = get_sp_mask(env->segs[R_SS].flags); ssp = env->segs[R_SS].base; - esp = ESP; + esp = env->regs[R_ESP]; dpl = cpl; } else { raise_exception_err(env, EXCP0D_GPF, selector & 0xfffc); @@ -709,7 +711,7 @@ static void do_interrupt_protected(CPUX86State *env, int intno, int is_int, PUSHL(ssp, esp, sp_mask, env->segs[R_ES].selector); } PUSHL(ssp, esp, sp_mask, env->segs[R_SS].selector); - PUSHL(ssp, esp, sp_mask, ESP); + PUSHL(ssp, esp, sp_mask, env->regs[R_ESP]); } PUSHL(ssp, esp, sp_mask, cpu_compute_eflags(env)); PUSHL(ssp, esp, sp_mask, env->segs[R_CS].selector); @@ -726,7 +728,7 @@ static void do_interrupt_protected(CPUX86State *env, int intno, int is_int, PUSHW(ssp, esp, sp_mask, env->segs[R_ES].selector); } PUSHW(ssp, esp, sp_mask, env->segs[R_SS].selector); - PUSHW(ssp, esp, sp_mask, ESP); + PUSHW(ssp, esp, sp_mask, env->regs[R_ESP]); } PUSHW(ssp, esp, sp_mask, cpu_compute_eflags(env)); PUSHW(ssp, esp, sp_mask, env->segs[R_CS].selector); @@ -888,7 +890,7 @@ static void do_interrupt64(CPUX86State *env, int intno, int is_int, if (ist != 0) { esp = get_rsp_from_tss(env, ist + 3); } else { - esp = ESP; + esp = env->regs[R_ESP]; } esp &= ~0xfLL; /* align stack */ dpl = cpl; @@ -899,7 +901,7 @@ static void do_interrupt64(CPUX86State *env, int intno, int is_int, } PUSHQ(esp, env->segs[R_SS].selector); - PUSHQ(esp, ESP); + PUSHQ(esp, env->regs[R_ESP]); PUSHQ(esp, cpu_compute_eflags(env)); PUSHQ(esp, env->segs[R_CS].selector); PUSHQ(esp, old_eip); @@ -911,7 +913,7 @@ static void do_interrupt64(CPUX86State *env, int intno, int is_int, ss = 0 | dpl; cpu_x86_load_seg_cache(env, R_SS, ss, 0, 0, 0); } - ESP = esp; + env->regs[R_ESP] = esp; selector = (selector & ~3) | dpl; cpu_x86_load_seg_cache(env, R_CS, selector, @@ -949,7 +951,7 @@ void helper_syscall(CPUX86State *env, int next_eip_addend) if (env->hflags & HF_LMA_MASK) { int code64; - ECX = env->eip + next_eip_addend; + env->regs[R_ECX] = env->eip + next_eip_addend; env->regs[11] = cpu_compute_eflags(env); code64 = env->hflags & HF_CS64_MASK; @@ -974,7 +976,7 @@ void helper_syscall(CPUX86State *env, int next_eip_addend) env->eip = env->cstar; } } else { - ECX = (uint32_t)(env->eip + next_eip_addend); + env->regs[R_ECX] = (uint32_t)(env->eip + next_eip_addend); cpu_x86_set_cpl(env, 0); cpu_x86_load_seg_cache(env, R_CS, selector & 0xfffc, @@ -1015,14 +1017,14 @@ void helper_sysret(CPUX86State *env, int dflag) DESC_S_MASK | (3 << DESC_DPL_SHIFT) | DESC_CS_MASK | DESC_R_MASK | DESC_A_MASK | DESC_L_MASK); - env->eip = ECX; + env->eip = env->regs[R_ECX]; } else { cpu_x86_load_seg_cache(env, R_CS, selector | 3, 0, 0xffffffff, DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK | (3 << DESC_DPL_SHIFT) | DESC_CS_MASK | DESC_R_MASK | DESC_A_MASK); - env->eip = (uint32_t)ECX; + env->eip = (uint32_t)env->regs[R_ECX]; } cpu_x86_load_seg_cache(env, R_SS, selector + 8, 0, 0xffffffff, @@ -1039,7 +1041,7 @@ void helper_sysret(CPUX86State *env, int dflag) DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK | (3 << DESC_DPL_SHIFT) | DESC_CS_MASK | DESC_R_MASK | DESC_A_MASK); - env->eip = (uint32_t)ECX; + env->eip = (uint32_t)env->regs[R_ECX]; cpu_x86_load_seg_cache(env, R_SS, selector + 8, 0, 0xffffffff, DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | @@ -1069,7 +1071,7 @@ static void do_interrupt_real(CPUX86State *env, int intno, int is_int, ptr = dt->base + intno * 4; offset = cpu_lduw_kernel(env, ptr); selector = cpu_lduw_kernel(env, ptr + 2); - esp = ESP; + esp = env->regs[R_ESP]; ssp = env->segs[R_SS].base; if (is_int) { old_eip = next_eip; @@ -1083,7 +1085,7 @@ static void do_interrupt_real(CPUX86State *env, int intno, int is_int, PUSHW(ssp, esp, 0xffff, old_eip); /* update processor state */ - ESP = (ESP & ~0xffff) | (esp & 0xffff); + env->regs[R_ESP] = (env->regs[R_ESP] & ~0xffff) | (esp & 0xffff); env->eip = offset; env->segs[R_CS].selector = selector; env->segs[R_CS].base = (selector << 4); @@ -1120,7 +1122,7 @@ static void do_interrupt_user(CPUX86State *env, int intno, int is_int, exiting the emulation with the suitable exception and error code */ if (is_int) { - EIP = next_eip; + env->eip = next_eip; } } @@ -1155,7 +1157,7 @@ static void handle_even_inj(CPUX86State *env, int intno, int is_int, /* * Begin execution of an interruption. is_int is TRUE if coming from - * the int instruction. next_eip is the EIP value AFTER the interrupt + * the int instruction. next_eip is the env->eip value AFTER the interrupt * instruction. It is only relevant if is_int is TRUE. */ static void do_interrupt_all(CPUX86State *env, int intno, int is_int, @@ -1169,13 +1171,13 @@ static void do_interrupt_all(CPUX86State *env, int intno, int is_int, " pc=" TARGET_FMT_lx " SP=%04x:" TARGET_FMT_lx, count, intno, error_code, is_int, env->hflags & HF_CPL_MASK, - env->segs[R_CS].selector, EIP, - (int)env->segs[R_CS].base + EIP, - env->segs[R_SS].selector, ESP); + env->segs[R_CS].selector, env->eip, + (int)env->segs[R_CS].base + env->eip, + env->segs[R_SS].selector, env->regs[R_ESP]); if (intno == 0x0e) { qemu_log(" CR2=" TARGET_FMT_lx, env->cr[2]); } else { - qemu_log(" EAX=" TARGET_FMT_lx, EAX); + qemu_log(" env->regs[R_EAX]=" TARGET_FMT_lx, env->regs[R_EAX]); } qemu_log("\n"); log_cpu_state(env, CPU_DUMP_CCOP); @@ -1272,8 +1274,8 @@ void helper_enter_level(CPUX86State *env, int level, int data32, esp_mask = get_sp_mask(env->segs[R_SS].flags); ssp = env->segs[R_SS].base; - ebp = EBP; - esp = ESP; + ebp = env->regs[R_EBP]; + esp = env->regs[R_ESP]; if (data32) { /* 32 bit */ esp -= 4; @@ -1305,8 +1307,8 @@ void helper_enter64_level(CPUX86State *env, int level, int data64, { target_ulong esp, ebp; - ebp = EBP; - esp = ESP; + ebp = env->regs[R_EBP]; + esp = env->regs[R_ESP]; if (data64) { /* 64 bit */ @@ -1582,7 +1584,7 @@ void helper_ljmp_protected(CPUX86State *env, int new_cs, target_ulong new_eip, } cpu_x86_load_seg_cache(env, R_CS, (new_cs & 0xfffc) | cpl, get_seg_base(e1, e2), limit, e2); - EIP = new_eip; + env->eip = new_eip; } else { /* jump to call or task gate */ dpl = (e2 >> DESC_DPL_SHIFT) & 3; @@ -1635,7 +1637,7 @@ void helper_ljmp_protected(CPUX86State *env, int new_cs, target_ulong new_eip, } cpu_x86_load_seg_cache(env, R_CS, (gate_cs & 0xfffc) | cpl, get_seg_base(e1, e2), limit, e2); - EIP = new_eip; + env->eip = new_eip; break; default: raise_exception_err(env, EXCP0D_GPF, new_cs & 0xfffc); @@ -1653,7 +1655,7 @@ void helper_lcall_real(CPUX86State *env, int new_cs, target_ulong new_eip1, target_ulong ssp; new_eip = new_eip1; - esp = ESP; + esp = env->regs[R_ESP]; esp_mask = get_sp_mask(env->segs[R_SS].flags); ssp = env->segs[R_SS].base; if (shift) { @@ -1721,19 +1723,19 @@ void helper_lcall_protected(CPUX86State *env, int new_cs, target_ulong new_eip, target_ulong rsp; /* 64 bit case */ - rsp = ESP; + rsp = env->regs[R_ESP]; PUSHQ(rsp, env->segs[R_CS].selector); PUSHQ(rsp, next_eip); /* from this point, not restartable */ - ESP = rsp; + env->regs[R_ESP] = rsp; cpu_x86_load_seg_cache(env, R_CS, (new_cs & 0xfffc) | cpl, get_seg_base(e1, e2), get_seg_limit(e1, e2), e2); - EIP = new_eip; + env->eip = new_eip; } else #endif { - sp = ESP; + sp = env->regs[R_ESP]; sp_mask = get_sp_mask(env->segs[R_SS].flags); ssp = env->segs[R_SS].base; if (shift) { @@ -1752,7 +1754,7 @@ void helper_lcall_protected(CPUX86State *env, int new_cs, target_ulong new_eip, SET_ESP(sp, sp_mask); cpu_x86_load_seg_cache(env, R_CS, (new_cs & 0xfffc) | cpl, get_seg_base(e1, e2), limit, e2); - EIP = new_eip; + env->eip = new_eip; } } else { /* check gate type */ @@ -1809,9 +1811,9 @@ void helper_lcall_protected(CPUX86State *env, int new_cs, target_ulong new_eip, if (!(e2 & DESC_C_MASK) && dpl < cpl) { /* to inner privilege */ get_ss_esp_from_tss(env, &ss, &sp, dpl); - LOG_PCALL("new ss:esp=%04x:%08x param_count=%d ESP=" TARGET_FMT_lx - "\n", - ss, sp, param_count, ESP); + LOG_PCALL("new ss:esp=%04x:%08x param_count=%d env->regs[R_ESP]=" + TARGET_FMT_lx "\n", ss, sp, param_count, + env->regs[R_ESP]); if ((ss & 0xfffc) == 0) { raise_exception_err(env, EXCP0A_TSS, ss & 0xfffc); } @@ -1843,25 +1845,27 @@ void helper_lcall_protected(CPUX86State *env, int new_cs, target_ulong new_eip, ssp = get_seg_base(ss_e1, ss_e2); if (shift) { PUSHL(ssp, sp, sp_mask, env->segs[R_SS].selector); - PUSHL(ssp, sp, sp_mask, ESP); + PUSHL(ssp, sp, sp_mask, env->regs[R_ESP]); for (i = param_count - 1; i >= 0; i--) { - val = cpu_ldl_kernel(env, old_ssp + ((ESP + i * 4) & - old_sp_mask)); + val = cpu_ldl_kernel(env, old_ssp + + ((env->regs[R_ESP] + i * 4) & + old_sp_mask)); PUSHL(ssp, sp, sp_mask, val); } } else { PUSHW(ssp, sp, sp_mask, env->segs[R_SS].selector); - PUSHW(ssp, sp, sp_mask, ESP); + PUSHW(ssp, sp, sp_mask, env->regs[R_ESP]); for (i = param_count - 1; i >= 0; i--) { - val = cpu_lduw_kernel(env, old_ssp + ((ESP + i * 2) & - old_sp_mask)); + val = cpu_lduw_kernel(env, old_ssp + + ((env->regs[R_ESP] + i * 2) & + old_sp_mask)); PUSHW(ssp, sp, sp_mask, val); } } new_stack = 1; } else { /* to same privilege */ - sp = ESP; + sp = env->regs[R_ESP]; sp_mask = get_sp_mask(env->segs[R_SS].flags); ssp = env->segs[R_SS].base; /* push_size = (4 << shift); */ @@ -1893,7 +1897,7 @@ void helper_lcall_protected(CPUX86State *env, int new_cs, target_ulong new_eip, e2); cpu_x86_set_cpl(env, dpl); SET_ESP(sp, sp_mask); - EIP = offset; + env->eip = offset; } } @@ -1905,7 +1909,7 @@ void helper_iret_real(CPUX86State *env, int shift) int eflags_mask; sp_mask = 0xffff; /* XXXX: use SS segment size? */ - sp = ESP; + sp = env->regs[R_ESP]; ssp = env->segs[R_SS].base; if (shift == 1) { /* 32 bits */ @@ -1919,7 +1923,7 @@ void helper_iret_real(CPUX86State *env, int shift) POPW(ssp, sp, sp_mask, new_cs); POPW(ssp, sp, sp_mask, new_eflags); } - ESP = (ESP & ~sp_mask) | (sp & sp_mask); + env->regs[R_ESP] = (env->regs[R_ESP] & ~sp_mask) | (sp & sp_mask); env->segs[R_CS].selector = new_cs; env->segs[R_CS].base = (new_cs << 4); env->eip = new_eip; @@ -1978,7 +1982,7 @@ static inline void helper_ret_protected(CPUX86State *env, int shift, { sp_mask = get_sp_mask(env->segs[R_SS].flags); } - sp = ESP; + sp = env->regs[R_ESP]; ssp = env->segs[R_SS].base; new_eflags = 0; /* avoid warning */ #ifdef TARGET_X86_64 @@ -2179,7 +2183,7 @@ static inline void helper_ret_protected(CPUX86State *env, int shift, load_seg_vm(env, R_GS, new_gs & 0xffff); env->eip = new_eip & 0xffff; - ESP = new_esp; + env->regs[R_ESP] = new_esp; } void helper_iret_protected(CPUX86State *env, int shift, int next_eip) @@ -2248,8 +2252,8 @@ void helper_sysenter(CPUX86State *env) DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK | DESC_W_MASK | DESC_A_MASK); - ESP = env->sysenter_esp; - EIP = env->sysenter_eip; + env->regs[R_ESP] = env->sysenter_esp; + env->eip = env->sysenter_eip; } void helper_sysexit(CPUX86State *env, int dflag) @@ -2288,8 +2292,8 @@ void helper_sysexit(CPUX86State *env, int dflag) DESC_S_MASK | (3 << DESC_DPL_SHIFT) | DESC_W_MASK | DESC_A_MASK); } - ESP = ECX; - EIP = EDX; + env->regs[R_ESP] = env->regs[R_ECX]; + env->eip = env->regs[R_EDX]; } target_ulong helper_lsl(CPUX86State *env, target_ulong selector1) diff --git a/target-i386/smm_helper.c b/target-i386/smm_helper.c index eea2fe9782..248957337e 100644 --- a/target-i386/smm_helper.c +++ b/target-i386/smm_helper.c @@ -82,14 +82,14 @@ void do_smm_enter(CPUX86State *env) stq_phys(sm_state + 0x7ed0, env->efer); - stq_phys(sm_state + 0x7ff8, EAX); - stq_phys(sm_state + 0x7ff0, ECX); - stq_phys(sm_state + 0x7fe8, EDX); - stq_phys(sm_state + 0x7fe0, EBX); - stq_phys(sm_state + 0x7fd8, ESP); - stq_phys(sm_state + 0x7fd0, EBP); - stq_phys(sm_state + 0x7fc8, ESI); - stq_phys(sm_state + 0x7fc0, EDI); + stq_phys(sm_state + 0x7ff8, env->regs[R_EAX]); + stq_phys(sm_state + 0x7ff0, env->regs[R_ECX]); + stq_phys(sm_state + 0x7fe8, env->regs[R_EDX]); + stq_phys(sm_state + 0x7fe0, env->regs[R_EBX]); + stq_phys(sm_state + 0x7fd8, env->regs[R_ESP]); + stq_phys(sm_state + 0x7fd0, env->regs[R_EBP]); + stq_phys(sm_state + 0x7fc8, env->regs[R_ESI]); + stq_phys(sm_state + 0x7fc0, env->regs[R_EDI]); for (i = 8; i < 16; i++) { stq_phys(sm_state + 0x7ff8 - i * 8, env->regs[i]); } @@ -109,14 +109,14 @@ void do_smm_enter(CPUX86State *env) stl_phys(sm_state + 0x7ff8, env->cr[3]); stl_phys(sm_state + 0x7ff4, cpu_compute_eflags(env)); stl_phys(sm_state + 0x7ff0, env->eip); - stl_phys(sm_state + 0x7fec, EDI); - stl_phys(sm_state + 0x7fe8, ESI); - stl_phys(sm_state + 0x7fe4, EBP); - stl_phys(sm_state + 0x7fe0, ESP); - stl_phys(sm_state + 0x7fdc, EBX); - stl_phys(sm_state + 0x7fd8, EDX); - stl_phys(sm_state + 0x7fd4, ECX); - stl_phys(sm_state + 0x7fd0, EAX); + stl_phys(sm_state + 0x7fec, env->regs[R_EDI]); + stl_phys(sm_state + 0x7fe8, env->regs[R_ESI]); + stl_phys(sm_state + 0x7fe4, env->regs[R_EBP]); + stl_phys(sm_state + 0x7fe0, env->regs[R_ESP]); + stl_phys(sm_state + 0x7fdc, env->regs[R_EBX]); + stl_phys(sm_state + 0x7fd8, env->regs[R_EDX]); + stl_phys(sm_state + 0x7fd4, env->regs[R_ECX]); + stl_phys(sm_state + 0x7fd0, env->regs[R_EAX]); stl_phys(sm_state + 0x7fcc, env->dr[6]); stl_phys(sm_state + 0x7fc8, env->dr[7]); @@ -213,14 +213,14 @@ void helper_rsm(CPUX86State *env) env->tr.limit = ldl_phys(sm_state + 0x7e94); env->tr.flags = (lduw_phys(sm_state + 0x7e92) & 0xf0ff) << 8; - EAX = ldq_phys(sm_state + 0x7ff8); - ECX = ldq_phys(sm_state + 0x7ff0); - EDX = ldq_phys(sm_state + 0x7fe8); - EBX = ldq_phys(sm_state + 0x7fe0); - ESP = ldq_phys(sm_state + 0x7fd8); - EBP = ldq_phys(sm_state + 0x7fd0); - ESI = ldq_phys(sm_state + 0x7fc8); - EDI = ldq_phys(sm_state + 0x7fc0); + env->regs[R_EAX] = ldq_phys(sm_state + 0x7ff8); + env->regs[R_ECX] = ldq_phys(sm_state + 0x7ff0); + env->regs[R_EDX] = ldq_phys(sm_state + 0x7fe8); + env->regs[R_EBX] = ldq_phys(sm_state + 0x7fe0); + env->regs[R_ESP] = ldq_phys(sm_state + 0x7fd8); + env->regs[R_EBP] = ldq_phys(sm_state + 0x7fd0); + env->regs[R_ESI] = ldq_phys(sm_state + 0x7fc8); + env->regs[R_EDI] = ldq_phys(sm_state + 0x7fc0); for (i = 8; i < 16; i++) { env->regs[i] = ldq_phys(sm_state + 0x7ff8 - i * 8); } @@ -244,14 +244,14 @@ void helper_rsm(CPUX86State *env) cpu_load_eflags(env, ldl_phys(sm_state + 0x7ff4), ~(CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C | DF_MASK)); env->eip = ldl_phys(sm_state + 0x7ff0); - EDI = ldl_phys(sm_state + 0x7fec); - ESI = ldl_phys(sm_state + 0x7fe8); - EBP = ldl_phys(sm_state + 0x7fe4); - ESP = ldl_phys(sm_state + 0x7fe0); - EBX = ldl_phys(sm_state + 0x7fdc); - EDX = ldl_phys(sm_state + 0x7fd8); - ECX = ldl_phys(sm_state + 0x7fd4); - EAX = ldl_phys(sm_state + 0x7fd0); + env->regs[R_EDI] = ldl_phys(sm_state + 0x7fec); + env->regs[R_ESI] = ldl_phys(sm_state + 0x7fe8); + env->regs[R_EBP] = ldl_phys(sm_state + 0x7fe4); + env->regs[R_ESP] = ldl_phys(sm_state + 0x7fe0); + env->regs[R_EBX] = ldl_phys(sm_state + 0x7fdc); + env->regs[R_EDX] = ldl_phys(sm_state + 0x7fd8); + env->regs[R_ECX] = ldl_phys(sm_state + 0x7fd4); + env->regs[R_EAX] = ldl_phys(sm_state + 0x7fd0); env->dr[6] = ldl_phys(sm_state + 0x7fcc); env->dr[7] = ldl_phys(sm_state + 0x7fc8); diff --git a/target-i386/svm_helper.c b/target-i386/svm_helper.c index c46a213c9c..4a7de42b35 100644 --- a/target-i386/svm_helper.c +++ b/target-i386/svm_helper.c @@ -129,9 +129,9 @@ void helper_vmrun(CPUX86State *env, int aflag, int next_eip_addend) cpu_svm_check_intercept_param(env, SVM_EXIT_VMRUN, 0); if (aflag == 2) { - addr = EAX; + addr = env->regs[R_EAX]; } else { - addr = (uint32_t)EAX; + addr = (uint32_t)env->regs[R_EAX]; } qemu_log_mask(CPU_LOG_TB_IN_ASM, "vmrun! " TARGET_FMT_lx "\n", addr); @@ -170,9 +170,9 @@ void helper_vmrun(CPUX86State *env, int aflag, int next_eip_addend) &env->segs[R_DS]); stq_phys(env->vm_hsave + offsetof(struct vmcb, save.rip), - EIP + next_eip_addend); - stq_phys(env->vm_hsave + offsetof(struct vmcb, save.rsp), ESP); - stq_phys(env->vm_hsave + offsetof(struct vmcb, save.rax), EAX); + env->eip + next_eip_addend); + stq_phys(env->vm_hsave + offsetof(struct vmcb, save.rsp), env->regs[R_ESP]); + stq_phys(env->vm_hsave + offsetof(struct vmcb, save.rax), env->regs[R_EAX]); /* load the interception bitmaps so we do not need to access the vmcb in svm mode */ @@ -248,10 +248,10 @@ void helper_vmrun(CPUX86State *env, int aflag, int next_eip_addend) svm_load_seg_cache(env, env->vm_vmcb + offsetof(struct vmcb, save.ds), R_DS); - EIP = ldq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rip)); - env->eip = EIP; - ESP = ldq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rsp)); - EAX = ldq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rax)); + env->eip = ldq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rip)); + + env->regs[R_ESP] = ldq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rsp)); + env->regs[R_EAX] = ldq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rax)); env->dr[7] = ldq_phys(env->vm_vmcb + offsetof(struct vmcb, save.dr7)); env->dr[6] = ldq_phys(env->vm_vmcb + offsetof(struct vmcb, save.dr6)); cpu_x86_set_cpl(env, ldub_phys(env->vm_vmcb + offsetof(struct vmcb, @@ -302,7 +302,7 @@ void helper_vmrun(CPUX86State *env, int aflag, int next_eip_addend) env->exception_index = EXCP02_NMI; env->error_code = event_inj_err; env->exception_is_int = 0; - env->exception_next_eip = EIP; + env->exception_next_eip = env->eip; qemu_log_mask(CPU_LOG_TB_IN_ASM, "NMI"); cpu_loop_exit(env); break; @@ -318,7 +318,7 @@ void helper_vmrun(CPUX86State *env, int aflag, int next_eip_addend) env->exception_index = vector; env->error_code = event_inj_err; env->exception_is_int = 1; - env->exception_next_eip = EIP; + env->exception_next_eip = env->eip; qemu_log_mask(CPU_LOG_TB_IN_ASM, "SOFT"); cpu_loop_exit(env); break; @@ -341,9 +341,9 @@ void helper_vmload(CPUX86State *env, int aflag) cpu_svm_check_intercept_param(env, SVM_EXIT_VMLOAD, 0); if (aflag == 2) { - addr = EAX; + addr = env->regs[R_EAX]; } else { - addr = (uint32_t)EAX; + addr = (uint32_t)env->regs[R_EAX]; } qemu_log_mask(CPU_LOG_TB_IN_ASM, "vmload! " TARGET_FMT_lx @@ -379,9 +379,9 @@ void helper_vmsave(CPUX86State *env, int aflag) cpu_svm_check_intercept_param(env, SVM_EXIT_VMSAVE, 0); if (aflag == 2) { - addr = EAX; + addr = env->regs[R_EAX]; } else { - addr = (uint32_t)EAX; + addr = (uint32_t)env->regs[R_EAX]; } qemu_log_mask(CPU_LOG_TB_IN_ASM, "vmsave! " TARGET_FMT_lx @@ -439,9 +439,9 @@ void helper_invlpga(CPUX86State *env, int aflag) cpu_svm_check_intercept_param(env, SVM_EXIT_INVLPGA, 0); if (aflag == 2) { - addr = EAX; + addr = env->regs[R_EAX]; } else { - addr = (uint32_t)EAX; + addr = (uint32_t)env->regs[R_EAX]; } /* XXX: could use the ASID to see if it is needed to do the @@ -489,18 +489,18 @@ void helper_svm_check_intercept_param(CPUX86State *env, uint32_t type, control.msrpm_base_pa)); uint32_t t0, t1; - switch ((uint32_t)ECX) { + switch ((uint32_t)env->regs[R_ECX]) { case 0 ... 0x1fff: - t0 = (ECX * 2) % 8; - t1 = (ECX * 2) / 8; + t0 = (env->regs[R_ECX] * 2) % 8; + t1 = (env->regs[R_ECX] * 2) / 8; break; case 0xc0000000 ... 0xc0001fff: - t0 = (8192 + ECX - 0xc0000000) * 2; + t0 = (8192 + env->regs[R_ECX] - 0xc0000000) * 2; t1 = (t0 / 8); t0 %= 8; break; case 0xc0010000 ... 0xc0011fff: - t0 = (16384 + ECX - 0xc0010000) * 2; + t0 = (16384 + env->regs[R_ECX] - 0xc0010000) * 2; t1 = (t0 / 8); t0 %= 8; break; @@ -539,7 +539,7 @@ void helper_svm_check_io(CPUX86State *env, uint32_t port, uint32_t param, uint16_t mask = (1 << ((param >> 4) & 7)) - 1; if (lduw_phys(addr + port / 8) & (mask << (port & 7))) { - /* next EIP */ + /* next env->eip */ stq_phys(env->vm_vmcb + offsetof(struct vmcb, control.exit_info_2), env->eip + next_eip_addend); helper_vmexit(env, SVM_EXIT_IOIO, param | (port << 16)); @@ -558,7 +558,7 @@ void helper_vmexit(CPUX86State *env, uint32_t exit_code, uint64_t exit_info_1) exit_code, exit_info_1, ldq_phys(env->vm_vmcb + offsetof(struct vmcb, control.exit_info_2)), - EIP); + env->eip); if (env->hflags & HF_INHIBIT_IRQ_MASK) { stl_phys(env->vm_vmcb + offsetof(struct vmcb, control.int_state), @@ -606,8 +606,8 @@ void helper_vmexit(CPUX86State *env, uint32_t exit_code, uint64_t exit_info_1) cpu_compute_eflags(env)); stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rip), env->eip); - stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rsp), ESP); - stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rax), EAX); + stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rsp), env->regs[R_ESP]); + stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rax), env->regs[R_EAX]); stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.dr7), env->dr[7]); stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.dr6), env->dr[6]); stb_phys(env->vm_vmcb + offsetof(struct vmcb, save.cpl), @@ -657,9 +657,11 @@ void helper_vmexit(CPUX86State *env, uint32_t exit_code, uint64_t exit_info_1) svm_load_seg_cache(env, env->vm_hsave + offsetof(struct vmcb, save.ds), R_DS); - EIP = ldq_phys(env->vm_hsave + offsetof(struct vmcb, save.rip)); - ESP = ldq_phys(env->vm_hsave + offsetof(struct vmcb, save.rsp)); - EAX = ldq_phys(env->vm_hsave + offsetof(struct vmcb, save.rax)); + env->eip = ldq_phys(env->vm_hsave + offsetof(struct vmcb, save.rip)); + env->regs[R_ESP] = ldq_phys(env->vm_hsave + + offsetof(struct vmcb, save.rsp)); + env->regs[R_EAX] = ldq_phys(env->vm_hsave + + offsetof(struct vmcb, save.rax)); env->dr[6] = ldq_phys(env->vm_hsave + offsetof(struct vmcb, save.dr6)); env->dr[7] = ldq_phys(env->vm_hsave + offsetof(struct vmcb, save.dr7)); diff --git a/tests/ide-test.c b/tests/ide-test.c index 828e71a38c..7e2eb9455a 100644 --- a/tests/ide-test.c +++ b/tests/ide-test.c @@ -455,7 +455,10 @@ static void test_flush(void) data = inb(IDE_BASE + reg_device); g_assert_cmpint(data & DEV, ==, 0); - data = inb(IDE_BASE + reg_status); + do { + data = inb(IDE_BASE + reg_status); + } while (data & BSY); + assert_bit_set(data, DRDY); assert_bit_clear(data, BSY | DF | ERR | DRQ); @@ -377,7 +377,11 @@ static void gd_cursor_define(DisplayChangeListener *dcl, pixbuf, c->hot_x, c->hot_y); gdk_window_set_cursor(gtk_widget_get_window(s->drawing_area), cursor); g_object_unref(pixbuf); +#if !GTK_CHECK_VERSION(3, 0, 0) gdk_cursor_unref(cursor); +#else + g_object_unref(cursor); +#endif } static void gd_switch(DisplayChangeListener *dcl, @@ -199,9 +199,7 @@ static int rtc_date_offset = -1; /* -1 means no change */ QEMUClock *rtc_clock; int vga_interface_type = VGA_NONE; static int full_screen = 0; -#ifdef CONFIG_SDL static int no_frame = 0; -#endif int no_quit = 0; CharDriverState *serial_hds[MAX_SERIAL_PORTS]; CharDriverState *parallel_hds[MAX_PARALLEL_PORTS]; |