diff options
Diffstat (limited to 'hw/mc146818rtc.c')
| -rw-r--r-- | hw/mc146818rtc.c | 38 |
1 files changed, 18 insertions, 20 deletions
diff --git a/hw/mc146818rtc.c b/hw/mc146818rtc.c index 9d6a62751f..bec5687e42 100644 --- a/hw/mc146818rtc.c +++ b/hw/mc146818rtc.c @@ -108,8 +108,8 @@ static void rtc_coalesced_timer_update(RTCState *s) } else { /* divide each RTC interval to 2 - 8 smaller intervals */ int c = MIN(s->irq_coalesced, 7) + 1; - int64_t next_clock = qemu_get_clock(vm_clock) + - muldiv64(s->period / c, get_ticks_per_sec(), 32768); + int64_t next_clock = qemu_get_clock(rtc_clock) + + muldiv64(s->period / c, get_ticks_per_sec(), 32768); qemu_mod_timer(s->coalesced_timer, next_clock); } } @@ -161,7 +161,8 @@ static void rtc_timer_update(RTCState *s, int64_t current_time) /* compute 32 khz clock */ cur_clock = muldiv64(current_time, 32768, get_ticks_per_sec()); next_irq_clock = (cur_clock & ~(period - 1)) + period; - s->next_periodic_time = muldiv64(next_irq_clock, get_ticks_per_sec(), 32768) + 1; + s->next_periodic_time = + muldiv64(next_irq_clock, get_ticks_per_sec(), 32768) + 1; qemu_mod_timer(s->periodic_timer, s->next_periodic_time); } else { #ifdef TARGET_I386 @@ -232,7 +233,7 @@ static void cmos_ioport_write(void *opaque, uint32_t addr, uint32_t data) /* UIP bit is read only */ s->cmos_data[RTC_REG_A] = (data & ~REG_A_UIP) | (s->cmos_data[RTC_REG_A] & REG_A_UIP); - rtc_timer_update(s, qemu_get_clock(vm_clock)); + rtc_timer_update(s, qemu_get_clock(rtc_clock)); break; case RTC_REG_B: if (data & REG_B_SET) { @@ -246,7 +247,7 @@ static void cmos_ioport_write(void *opaque, uint32_t addr, uint32_t data) } } s->cmos_data[RTC_REG_B] = data; - rtc_timer_update(s, qemu_get_clock(vm_clock)); + rtc_timer_update(s, qemu_get_clock(rtc_clock)); break; case RTC_REG_C: case RTC_REG_D: @@ -605,18 +606,17 @@ static int rtc_initfn(ISADevice *dev) rtc_set_date_from_host(s); - s->periodic_timer = qemu_new_timer(vm_clock, - rtc_periodic_timer, s); + s->periodic_timer = qemu_new_timer(rtc_clock, rtc_periodic_timer, s); #ifdef TARGET_I386 if (rtc_td_hack) - s->coalesced_timer = qemu_new_timer(vm_clock, rtc_coalesced_timer, s); + s->coalesced_timer = + qemu_new_timer(rtc_clock, rtc_coalesced_timer, s); #endif - s->second_timer = qemu_new_timer(vm_clock, - rtc_update_second, s); - s->second_timer2 = qemu_new_timer(vm_clock, - rtc_update_second2, s); + s->second_timer = qemu_new_timer(rtc_clock, rtc_update_second, s); + s->second_timer2 = qemu_new_timer(rtc_clock, rtc_update_second2, s); - s->next_second_time = qemu_get_clock(vm_clock) + (get_ticks_per_sec() * 99) / 100; + s->next_second_time = + qemu_get_clock(rtc_clock) + (get_ticks_per_sec() * 99) / 100; qemu_mod_timer(s->second_timer2, s->next_second_time); register_ioport_write(base, 2, 1, cmos_ioport_write, s); @@ -747,14 +747,12 @@ RTCState *rtc_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq, s->base_year = base_year; rtc_set_date_from_host(s); - s->periodic_timer = qemu_new_timer(vm_clock, - rtc_periodic_timer, s); - s->second_timer = qemu_new_timer(vm_clock, - rtc_update_second, s); - s->second_timer2 = qemu_new_timer(vm_clock, - rtc_update_second2, s); + s->periodic_timer = qemu_new_timer(rtc_clock, rtc_periodic_timer, s); + s->second_timer = qemu_new_timer(rtc_clock, rtc_update_second, s); + s->second_timer2 = qemu_new_timer(rtc_clock, rtc_update_second2, s); - s->next_second_time = qemu_get_clock(vm_clock) + (get_ticks_per_sec() * 99) / 100; + s->next_second_time = + qemu_get_clock(rtc_clock) + (get_ticks_per_sec() * 99) / 100; qemu_mod_timer(s->second_timer2, s->next_second_time); io_memory = cpu_register_io_memory(rtc_mm_read, rtc_mm_write, s); |