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-rw-r--r--hw/an5206.c11
-rw-r--r--hw/apic_common.c2
-rw-r--r--hw/apic_internal.h2
-rw-r--r--hw/kvmvapic.c13
-rw-r--r--hw/mcf.h4
-rw-r--r--hw/mcf5206.c8
-rw-r--r--hw/mcf5208.c11
-rw-r--r--hw/mcf_intc.c8
-rw-r--r--hw/pc.c1
-rw-r--r--hw/ppc.c12
-rw-r--r--hw/ppc.h6
-rw-r--r--hw/ppc/e500.c11
-rw-r--r--hw/ppc405_uc.c16
-rw-r--r--hw/ppce500_spin.c15
-rw-r--r--hw/spapr_hcall.c16
15 files changed, 66 insertions, 70 deletions
diff --git a/hw/an5206.c b/hw/an5206.c
index 750115a3aa..924be81d57 100644
--- a/hw/an5206.c
+++ b/hw/an5206.c
@@ -24,6 +24,7 @@ static void an5206_init(QEMUMachineInitArgs *args)
ram_addr_t ram_size = args->ram_size;
const char *cpu_model = args->cpu_model;
const char *kernel_filename = args->kernel_filename;
+ M68kCPU *cpu;
CPUM68KState *env;
int kernel_size;
uint64_t elf_entry;
@@ -32,12 +33,14 @@ static void an5206_init(QEMUMachineInitArgs *args)
MemoryRegion *ram = g_new(MemoryRegion, 1);
MemoryRegion *sram = g_new(MemoryRegion, 1);
- if (!cpu_model)
+ if (!cpu_model) {
cpu_model = "m5206";
- env = cpu_init(cpu_model);
- if (!env) {
+ }
+ cpu = cpu_m68k_init(cpu_model);
+ if (!cpu) {
hw_error("Unable to find m68k CPU definition\n");
}
+ env = &cpu->env;
/* Initialize CPU registers. */
env->vbr = 0;
@@ -55,7 +58,7 @@ static void an5206_init(QEMUMachineInitArgs *args)
vmstate_register_ram_global(sram);
memory_region_add_subregion(address_space_mem, AN5206_RAMBAR_ADDR, sram);
- mcf5206_init(address_space_mem, AN5206_MBAR_ADDR, env);
+ mcf5206_init(address_space_mem, AN5206_MBAR_ADDR, cpu);
/* Load kernel. */
if (!kernel_filename) {
diff --git a/hw/apic_common.c b/hw/apic_common.c
index 6e1b1e0320..d8c9810509 100644
--- a/hw/apic_common.c
+++ b/hw/apic_common.c
@@ -103,7 +103,7 @@ void apic_handle_tpr_access_report(DeviceState *d, target_ulong ip,
{
APICCommonState *s = DO_UPCAST(APICCommonState, busdev.qdev, d);
- vapic_report_tpr_access(s->vapic, &s->cpu->env, ip, access);
+ vapic_report_tpr_access(s->vapic, CPU(s->cpu), ip, access);
}
void apic_report_irq_delivered(int delivered)
diff --git a/hw/apic_internal.h b/hw/apic_internal.h
index dcbbfd41cb..9265e52cd6 100644
--- a/hw/apic_internal.h
+++ b/hw/apic_internal.h
@@ -143,7 +143,7 @@ bool apic_next_timer(APICCommonState *s, int64_t current_time);
void apic_enable_tpr_access_reporting(DeviceState *d, bool enable);
void apic_enable_vapic(DeviceState *d, hwaddr paddr);
-void vapic_report_tpr_access(DeviceState *dev, void *cpu, target_ulong ip,
+void vapic_report_tpr_access(DeviceState *dev, CPUState *cpu, target_ulong ip,
TPRAccess access);
#endif /* !QEMU_APIC_INTERNAL_H */
diff --git a/hw/kvmvapic.c b/hw/kvmvapic.c
index 1b5f416a78..9265baf568 100644
--- a/hw/kvmvapic.c
+++ b/hw/kvmvapic.c
@@ -382,8 +382,10 @@ static void patch_call(VAPICROMState *s, CPUX86State *env, target_ulong ip,
cpu_memory_rw_debug(env, ip + 1, (void *)&offset, sizeof(offset), 1);
}
-static void patch_instruction(VAPICROMState *s, CPUX86State *env, target_ulong ip)
+static void patch_instruction(VAPICROMState *s, X86CPU *cpu, target_ulong ip)
{
+ CPUState *cs = CPU(cpu);
+ CPUX86State *env = &cpu->env;
VAPICHandlers *handlers;
uint8_t opcode[2];
uint32_t imm32;
@@ -439,17 +441,18 @@ static void patch_instruction(VAPICROMState *s, CPUX86State *env, target_ulong i
resume_all_vcpus();
if (!kvm_enabled()) {
- env->current_tb = NULL;
+ cs->current_tb = NULL;
tb_gen_code(env, current_pc, current_cs_base, current_flags, 1);
cpu_resume_from_signal(env, NULL);
}
}
-void vapic_report_tpr_access(DeviceState *dev, void *cpu, target_ulong ip,
+void vapic_report_tpr_access(DeviceState *dev, CPUState *cs, target_ulong ip,
TPRAccess access)
{
VAPICROMState *s = DO_UPCAST(VAPICROMState, busdev.qdev, dev);
- CPUX86State *env = cpu;
+ X86CPU *cpu = X86_CPU(cs);
+ CPUX86State *env = &cpu->env;
cpu_synchronize_state(env);
@@ -465,7 +468,7 @@ void vapic_report_tpr_access(DeviceState *dev, void *cpu, target_ulong ip,
if (vapic_enable(s, env) < 0) {
return;
}
- patch_instruction(s, env, ip);
+ patch_instruction(s, cpu, ip);
}
typedef struct VAPICEnableTPRReporting {
diff --git a/hw/mcf.h b/hw/mcf.h
index f929910f02..fbc8dc26df 100644
--- a/hw/mcf.h
+++ b/hw/mcf.h
@@ -17,7 +17,7 @@ void mcf_uart_mm_init(struct MemoryRegion *sysmem,
/* mcf_intc.c */
qemu_irq *mcf_intc_init(struct MemoryRegion *sysmem,
hwaddr base,
- CPUM68KState *env);
+ M68kCPU *cpu);
/* mcf_fec.c */
void mcf_fec_init(struct MemoryRegion *sysmem, NICInfo *nd,
@@ -25,6 +25,6 @@ void mcf_fec_init(struct MemoryRegion *sysmem, NICInfo *nd,
/* mcf5206.c */
qemu_irq *mcf5206_init(struct MemoryRegion *sysmem,
- uint32_t base, CPUM68KState *env);
+ uint32_t base, M68kCPU *cpu);
#endif
diff --git a/hw/mcf5206.c b/hw/mcf5206.c
index d8c0059ed6..ea2db2325a 100644
--- a/hw/mcf5206.c
+++ b/hw/mcf5206.c
@@ -145,7 +145,7 @@ static m5206_timer_state *m5206_timer_init(qemu_irq irq)
/* System Integration Module. */
typedef struct {
- CPUM68KState *env;
+ M68kCPU *cpu;
MemoryRegion iomem;
m5206_timer_state *timer[2];
void *uart[2];
@@ -226,7 +226,7 @@ static void m5206_mbar_update(m5206_mbar_state *s)
level = 0;
vector = 0;
}
- m68k_set_irq_level(s->env, level, vector);
+ m68k_set_irq_level(s->cpu, level, vector);
}
static void m5206_mbar_set_irq(void *opaque, int irq, int level)
@@ -525,7 +525,7 @@ static const MemoryRegionOps m5206_mbar_ops = {
.endianness = DEVICE_NATIVE_ENDIAN,
};
-qemu_irq *mcf5206_init(MemoryRegion *sysmem, uint32_t base, CPUM68KState *env)
+qemu_irq *mcf5206_init(MemoryRegion *sysmem, uint32_t base, M68kCPU *cpu)
{
m5206_mbar_state *s;
qemu_irq *pic;
@@ -541,7 +541,7 @@ qemu_irq *mcf5206_init(MemoryRegion *sysmem, uint32_t base, CPUM68KState *env)
s->timer[1] = m5206_timer_init(pic[10]);
s->uart[0] = mcf_uart_init(pic[12], serial_hds[0]);
s->uart[1] = mcf_uart_init(pic[13], serial_hds[1]);
- s->env = env;
+ s->cpu = cpu;
m5206_mbar_reset(s);
return pic;
diff --git a/hw/mcf5208.c b/hw/mcf5208.c
index 2c9a5dc98a..86402d30d5 100644
--- a/hw/mcf5208.c
+++ b/hw/mcf5208.c
@@ -192,6 +192,7 @@ static void mcf5208evb_init(QEMUMachineInitArgs *args)
ram_addr_t ram_size = args->ram_size;
const char *cpu_model = args->cpu_model;
const char *kernel_filename = args->kernel_filename;
+ M68kCPU *cpu;
CPUM68KState *env;
int kernel_size;
uint64_t elf_entry;
@@ -201,13 +202,15 @@ static void mcf5208evb_init(QEMUMachineInitArgs *args)
MemoryRegion *ram = g_new(MemoryRegion, 1);
MemoryRegion *sram = g_new(MemoryRegion, 1);
- if (!cpu_model)
+ if (!cpu_model) {
cpu_model = "m5208";
- env = cpu_init(cpu_model);
- if (!env) {
+ }
+ cpu = cpu_m68k_init(cpu_model);
+ if (!cpu) {
fprintf(stderr, "Unable to find m68k CPU definition\n");
exit(1);
}
+ env = &cpu->env;
/* Initialize CPU registers. */
env->vbr = 0;
@@ -224,7 +227,7 @@ static void mcf5208evb_init(QEMUMachineInitArgs *args)
memory_region_add_subregion(address_space_mem, 0x80000000, sram);
/* Internal peripherals. */
- pic = mcf_intc_init(address_space_mem, 0xfc048000, env);
+ pic = mcf_intc_init(address_space_mem, 0xfc048000, cpu);
mcf_uart_mm_init(address_space_mem, 0xfc060000, pic[26], serial_hds[0]);
mcf_uart_mm_init(address_space_mem, 0xfc064000, pic[27], serial_hds[1]);
diff --git a/hw/mcf_intc.c b/hw/mcf_intc.c
index 3bed3a2e4c..b213656300 100644
--- a/hw/mcf_intc.c
+++ b/hw/mcf_intc.c
@@ -16,7 +16,7 @@ typedef struct {
uint64_t ifr;
uint64_t enabled;
uint8_t icr[64];
- CPUM68KState *env;
+ M68kCPU *cpu;
int active_vector;
} mcf_intc_state;
@@ -40,7 +40,7 @@ static void mcf_intc_update(mcf_intc_state *s)
}
}
s->active_vector = ((best == 64) ? 24 : (best + 64));
- m68k_set_irq_level(s->env, best_level, s->active_vector);
+ m68k_set_irq_level(s->cpu, best_level, s->active_vector);
}
static uint64_t mcf_intc_read(void *opaque, hwaddr addr,
@@ -139,12 +139,12 @@ static const MemoryRegionOps mcf_intc_ops = {
qemu_irq *mcf_intc_init(MemoryRegion *sysmem,
hwaddr base,
- CPUM68KState *env)
+ M68kCPU *cpu)
{
mcf_intc_state *s;
s = g_malloc0(sizeof(mcf_intc_state));
- s->env = env;
+ s->cpu = cpu;
mcf_intc_reset(s);
memory_region_init_io(&s->iomem, &mcf_intc_ops, s, "mcf", 0x100);
diff --git a/hw/pc.c b/hw/pc.c
index 53cc173eb2..07caba78ba 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -876,7 +876,6 @@ void pc_cpus_init(const char *cpu_model)
for (i = 0; i < smp_cpus; i++) {
if (!cpu_x86_init(cpu_model)) {
- fprintf(stderr, "Unable to find x86 CPU definition\n");
exit(1);
}
}
diff --git a/hw/ppc.c b/hw/ppc.c
index 6053bd5652..8cfb84fa13 100644
--- a/hw/ppc.c
+++ b/hw/ppc.c
@@ -300,20 +300,20 @@ static void ppc40x_set_irq(void *opaque, int pin, int level)
if (level) {
LOG_IRQ("%s: reset the PowerPC system\n",
__func__);
- ppc40x_system_reset(env);
+ ppc40x_system_reset(cpu);
}
break;
case PPC40x_INPUT_RESET_CHIP:
if (level) {
LOG_IRQ("%s: reset the PowerPC chip\n", __func__);
- ppc40x_chip_reset(env);
+ ppc40x_chip_reset(cpu);
}
break;
case PPC40x_INPUT_RESET_CORE:
/* XXX: TODO: update DBSR[MRR] */
if (level) {
LOG_IRQ("%s: reset the PowerPC core\n", __func__);
- ppc40x_core_reset(env);
+ ppc40x_core_reset(cpu);
}
break;
case PPC40x_INPUT_CINT:
@@ -1011,13 +1011,13 @@ static void cpu_4xx_wdt_cb (void *opaque)
/* No reset */
break;
case 0x1: /* Core reset */
- ppc40x_core_reset(env);
+ ppc40x_core_reset(cpu);
break;
case 0x2: /* Chip reset */
- ppc40x_chip_reset(env);
+ ppc40x_chip_reset(cpu);
break;
case 0x3: /* System reset */
- ppc40x_system_reset(env);
+ ppc40x_system_reset(cpu);
break;
}
}
diff --git a/hw/ppc.h b/hw/ppc.h
index ee0cd16ee5..acaf0d6580 100644
--- a/hw/ppc.h
+++ b/hw/ppc.h
@@ -58,9 +58,9 @@ clk_setup_cb ppc_40x_timers_init (CPUPPCState *env, uint32_t freq,
unsigned int decr_excp);
/* Embedded PowerPC reset */
-void ppc40x_core_reset (CPUPPCState *env);
-void ppc40x_chip_reset (CPUPPCState *env);
-void ppc40x_system_reset (CPUPPCState *env);
+void ppc40x_core_reset(PowerPCCPU *cpu);
+void ppc40x_chip_reset(PowerPCCPU *cpu);
+void ppc40x_system_reset(PowerPCCPU *cpu);
void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val);
extern CPUWriteMemoryFunc * const PPC_io_write[];
diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
index b7474c05f9..451682cb83 100644
--- a/hw/ppc/e500.c
+++ b/hw/ppc/e500.c
@@ -240,20 +240,15 @@ static int ppce500_load_device_tree(CPUPPCState *env,
/* We need to generate the cpu nodes in reverse order, so Linux can pick
the first node as boot node and be happy */
for (i = smp_cpus - 1; i >= 0; i--) {
- CPUState *cpu = NULL;
+ CPUState *cpu;
char cpu_name[128];
uint64_t cpu_release_addr = MPC8544_SPIN_BASE + (i * 0x20);
- for (env = first_cpu; env != NULL; env = env->next_cpu) {
- cpu = ENV_GET_CPU(env);
- if (cpu->cpu_index == i) {
- break;
- }
- }
-
+ cpu = qemu_get_cpu(i);
if (cpu == NULL) {
continue;
}
+ env = cpu->env_ptr;
snprintf(cpu_name, sizeof(cpu_name), "/cpus/PowerPC,8544@%x",
cpu->cpu_index);
diff --git a/hw/ppc405_uc.c b/hw/ppc405_uc.c
index c96d103d1c..d8cbe875bd 100644
--- a/hw/ppc405_uc.c
+++ b/hw/ppc405_uc.c
@@ -1770,8 +1770,9 @@ static void ppc405_mal_init(CPUPPCState *env, qemu_irq irqs[4])
/*****************************************************************************/
/* SPR */
-void ppc40x_core_reset (CPUPPCState *env)
+void ppc40x_core_reset(PowerPCCPU *cpu)
{
+ CPUPPCState *env = &cpu->env;
target_ulong dbsr;
printf("Reset PowerPC core\n");
@@ -1782,8 +1783,9 @@ void ppc40x_core_reset (CPUPPCState *env)
env->spr[SPR_40x_DBSR] = dbsr;
}
-void ppc40x_chip_reset (CPUPPCState *env)
+void ppc40x_chip_reset(PowerPCCPU *cpu)
{
+ CPUPPCState *env = &cpu->env;
target_ulong dbsr;
printf("Reset PowerPC chip\n");
@@ -1795,7 +1797,7 @@ void ppc40x_chip_reset (CPUPPCState *env)
env->spr[SPR_40x_DBSR] = dbsr;
}
-void ppc40x_system_reset (CPUPPCState *env)
+void ppc40x_system_reset(PowerPCCPU *cpu)
{
printf("Reset PowerPC system\n");
qemu_system_reset_request();
@@ -1803,21 +1805,23 @@ void ppc40x_system_reset (CPUPPCState *env)
void store_40x_dbcr0 (CPUPPCState *env, uint32_t val)
{
+ PowerPCCPU *cpu = ppc_env_get_cpu(env);
+
switch ((val >> 28) & 0x3) {
case 0x0:
/* No action */
break;
case 0x1:
/* Core reset */
- ppc40x_core_reset(env);
+ ppc40x_core_reset(cpu);
break;
case 0x2:
/* Chip reset */
- ppc40x_chip_reset(env);
+ ppc40x_chip_reset(cpu);
break;
case 0x3:
/* System reset */
- ppc40x_system_reset(env);
+ ppc40x_system_reset(cpu);
break;
}
}
diff --git a/hw/ppce500_spin.c b/hw/ppce500_spin.c
index 7e90fb9824..5bdce52e24 100644
--- a/hw/ppce500_spin.c
+++ b/hw/ppce500_spin.c
@@ -123,18 +123,11 @@ static void spin_write(void *opaque, hwaddr addr, uint64_t value,
{
SpinState *s = opaque;
int env_idx = addr / sizeof(SpinInfo);
- CPUPPCState *env;
- CPUState *cpu = NULL;
+ CPUState *cpu;
SpinInfo *curspin = &s->spin[env_idx];
uint8_t *curspin_p = (uint8_t*)curspin;
- for (env = first_cpu; env != NULL; env = env->next_cpu) {
- cpu = CPU(ppc_env_get_cpu(env));
- if (cpu->cpu_index == env_idx) {
- break;
- }
- }
-
+ cpu = qemu_get_cpu(env_idx);
if (cpu == NULL) {
/* Unknown CPU */
return;
@@ -161,11 +154,11 @@ static void spin_write(void *opaque, hwaddr addr, uint64_t value,
if (!(ldq_p(&curspin->addr) & 1)) {
/* run CPU */
SpinKick kick = {
- .cpu = ppc_env_get_cpu(env),
+ .cpu = POWERPC_CPU(cpu),
.spin = curspin,
};
- run_on_cpu(CPU(kick.cpu), spin_kick, &kick);
+ run_on_cpu(cpu, spin_kick, &kick);
}
}
diff --git a/hw/spapr_hcall.c b/hw/spapr_hcall.c
index 2889742788..7b8959488e 100644
--- a/hw/spapr_hcall.c
+++ b/hw/spapr_hcall.c
@@ -469,16 +469,11 @@ static target_ulong h_register_vpa(PowerPCCPU *cpu, sPAPREnvironment *spapr,
CPUPPCState *tenv;
CPUState *tcpu;
- for (tenv = first_cpu; tenv; tenv = tenv->next_cpu) {
- tcpu = CPU(ppc_env_get_cpu(tenv));
- if (tcpu->cpu_index == procno) {
- break;
- }
- }
-
- if (!tenv) {
+ tcpu = qemu_get_cpu(procno);
+ if (!tcpu) {
return H_PARAMETER;
}
+ tenv = tcpu->env_ptr;
switch (flags) {
case FLAGS_REGISTER_VPA:
@@ -513,13 +508,14 @@ static target_ulong h_cede(PowerPCCPU *cpu, sPAPREnvironment *spapr,
target_ulong opcode, target_ulong *args)
{
CPUPPCState *env = &cpu->env;
+ CPUState *cs = CPU(cpu);
env->msr |= (1ULL << MSR_EE);
hreg_compute_hflags(env);
- if (!cpu_has_work(CPU(cpu))) {
+ if (!cpu_has_work(cs)) {
env->halted = 1;
env->exception_index = EXCP_HLT;
- env->exit_request = 1;
+ cs->exit_request = 1;
}
return H_SUCCESS;
}
generated by cgit v1.2.1 (git 2.18.0) at 2024-07-09 03:26:20 +0000