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-rw-r--r--include/hw/arm/armv7m.h4
-rw-r--r--include/hw/arm/aspeed_soc.h2
-rw-r--r--include/hw/arm/stm32f205_soc.h2
-rw-r--r--include/hw/boards.h10
-rw-r--r--include/qemu/osdep.h7
-rw-r--r--include/qom/cpu.h22
-rw-r--r--include/qom/object_interfaces.h8
7 files changed, 51 insertions, 4 deletions
diff --git a/include/hw/arm/armv7m.h b/include/hw/arm/armv7m.h
index 10eb058027..9ad316c76e 100644
--- a/include/hw/arm/armv7m.h
+++ b/include/hw/arm/armv7m.h
@@ -35,7 +35,7 @@ typedef struct {
/* ARMv7M container object.
* + Unnamed GPIO input lines: external IRQ lines for the NVIC
* + Named GPIO output SYSRESETREQ: signalled for guest AIRCR.SYSRESETREQ
- * + Property "cpu-model": CPU model to instantiate
+ * + Property "cpu-type": CPU type to instantiate
* + Property "num-irq": number of external IRQ lines
* + Property "memory": MemoryRegion defining the physical address space
* that CPU accesses see. (The NVIC, bitbanding and other CPU-internal
@@ -55,7 +55,7 @@ typedef struct ARMv7MState {
MemoryRegion container;
/* Properties */
- char *cpu_model;
+ char *cpu_type;
/* MemoryRegion the board provides to us (with its devices, RAM, etc) */
MemoryRegion *board_memory;
} ARMv7MState;
diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h
index 0b88baaad0..f26914a2b9 100644
--- a/include/hw/arm/aspeed_soc.h
+++ b/include/hw/arm/aspeed_soc.h
@@ -49,7 +49,7 @@ typedef struct AspeedSoCState {
typedef struct AspeedSoCInfo {
const char *name;
- const char *cpu_model;
+ const char *cpu_type;
uint32_t silicon_rev;
hwaddr sdram_base;
uint64_t sram_size;
diff --git a/include/hw/arm/stm32f205_soc.h b/include/hw/arm/stm32f205_soc.h
index e2dce1122e..922a733f88 100644
--- a/include/hw/arm/stm32f205_soc.h
+++ b/include/hw/arm/stm32f205_soc.h
@@ -52,7 +52,7 @@ typedef struct STM32F205State {
SysBusDevice parent_obj;
/*< public >*/
- char *cpu_model;
+ char *cpu_type;
ARMv7MState armv7m;
diff --git a/include/hw/boards.h b/include/hw/boards.h
index 7f044d101d..156e0a5701 100644
--- a/include/hw/boards.h
+++ b/include/hw/boards.h
@@ -123,8 +123,15 @@ typedef struct {
* Returns an array of @CPUArchId architecture-dependent CPU IDs
* which includes CPU IDs for present and possible to hotplug CPUs.
* Caller is responsible for freeing returned list.
+ * @get_default_cpu_node_id:
+ * returns default board specific node_id value for CPU slot specified by
+ * index @idx in @ms->possible_cpus[]
* @has_hotpluggable_cpus:
* If true, board supports CPUs creation with -device/device_add.
+ * @default_cpu_type:
+ * specifies default CPU_TYPE, which will be used for parsing target
+ * specific features and for creating CPUs if CPU name wasn't provided
+ * explicitly at CLI
* @minimum_page_bits:
* If non-zero, the board promises never to create a CPU with a page size
* smaller than this, so QEMU can use a more efficient larger page
@@ -177,6 +184,7 @@ struct MachineClass {
GArray *compat_props;
const char *hw_version;
ram_addr_t default_ram_size;
+ const char *default_cpu_type;
bool option_rom_has_mr;
bool rom_file_has_mr;
int minimum_page_bits;
@@ -191,6 +199,7 @@ struct MachineClass {
CpuInstanceProperties (*cpu_index_to_instance_props)(MachineState *machine,
unsigned cpu_index);
const CPUArchIdList *(*possible_cpu_arch_ids)(MachineState *machine);
+ int64_t (*get_default_cpu_node_id)(const MachineState *ms, int idx);
};
/**
@@ -231,6 +240,7 @@ struct MachineState {
char *kernel_cmdline;
char *initrd_filename;
const char *cpu_model;
+ const char *cpu_type;
AccelState *accelerator;
CPUArchIdList *possible_cpus;
};
diff --git a/include/qemu/osdep.h b/include/qemu/osdep.h
index 99666383b2..72b75bf044 100644
--- a/include/qemu/osdep.h
+++ b/include/qemu/osdep.h
@@ -273,6 +273,11 @@ void qemu_anon_ram_free(void *ptr, size_t size);
#else
#define QEMU_MADV_NOHUGEPAGE QEMU_MADV_INVALID
#endif
+#ifdef MADV_REMOVE
+#define QEMU_MADV_REMOVE MADV_REMOVE
+#else
+#define QEMU_MADV_REMOVE QEMU_MADV_INVALID
+#endif
#elif defined(CONFIG_POSIX_MADVISE)
@@ -285,6 +290,7 @@ void qemu_anon_ram_free(void *ptr, size_t size);
#define QEMU_MADV_DONTDUMP QEMU_MADV_INVALID
#define QEMU_MADV_HUGEPAGE QEMU_MADV_INVALID
#define QEMU_MADV_NOHUGEPAGE QEMU_MADV_INVALID
+#define QEMU_MADV_REMOVE QEMU_MADV_INVALID
#else /* no-op */
@@ -297,6 +303,7 @@ void qemu_anon_ram_free(void *ptr, size_t size);
#define QEMU_MADV_DONTDUMP QEMU_MADV_INVALID
#define QEMU_MADV_HUGEPAGE QEMU_MADV_INVALID
#define QEMU_MADV_NOHUGEPAGE QEMU_MADV_INVALID
+#define QEMU_MADV_REMOVE QEMU_MADV_INVALID
#endif
diff --git a/include/qom/cpu.h b/include/qom/cpu.h
index 0dc767a753..0efebdbcf4 100644
--- a/include/qom/cpu.h
+++ b/include/qom/cpu.h
@@ -645,6 +645,28 @@ void cpu_reset(CPUState *cpu);
ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model);
/**
+ * cpu_create:
+ * @typename: The CPU type.
+ *
+ * Instantiates a CPU and realizes the CPU.
+ *
+ * Returns: A #CPUState or %NULL if an error occurred.
+ */
+CPUState *cpu_create(const char *typename);
+
+/**
+ * cpu_parse_cpu_model:
+ * @typename: The CPU base type or CPU type.
+ * @cpu_model: The model string including optional parameters.
+ *
+ * processes optional parameters and registers them as global properties
+ *
+ * Returns: type of CPU to create or prints error and terminates process
+ * if an error occurred.
+ */
+const char *cpu_parse_cpu_model(const char *typename, const char *cpu_model);
+
+/**
* cpu_generic_init:
* @typename: The CPU base type.
* @cpu_model: The model string including optional parameters.
diff --git a/include/qom/object_interfaces.h b/include/qom/object_interfaces.h
index d63c1c28f8..d23e11bc53 100644
--- a/include/qom/object_interfaces.h
+++ b/include/qom/object_interfaces.h
@@ -147,4 +147,12 @@ int user_creatable_add_opts_foreach(void *opaque,
*/
void user_creatable_del(const char *id, Error **errp);
+/**
+ * user_creatable_cleanup:
+ *
+ * Delete all user-creatable objects and the user-creatable
+ * objects container.
+ */
+void user_creatable_cleanup(void);
+
#endif