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-rw-r--r--target-arm/translate.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target-arm/translate.c b/target-arm/translate.c
index 0bd3d0517b..ae705775d1 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -8500,7 +8500,7 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn)
}
/* Perform base writeback before the loaded value to
ensure correct behavior with overlapping index registers.
- ldrd with base writeback is is undefined if the
+ ldrd with base writeback is undefined if the
destination and index registers overlap. */
if (!(insn & (1 << 24))) {
gen_add_datah_offset(s, insn, address_offset, addr);