summaryrefslogtreecommitdiff
path: root/target-ppc
diff options
context:
space:
mode:
Diffstat (limited to 'target-ppc')
-rw-r--r--target-ppc/cpu.h1
-rw-r--r--target-ppc/translate_init.c14
2 files changed, 14 insertions, 1 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 9a40d209bb..d02fd0425e 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -1508,6 +1508,7 @@ static inline int cpu_mmu_index (CPUPPCState *env)
#define SPR_RCPU_L2U_RA2 (0x32A)
#define SPR_MPC_MD_DBRAM1 (0x32A)
#define SPR_RCPU_L2U_RA3 (0x32B)
+#define SPR_TAR (0x32F)
#define SPR_440_INV0 (0x370)
#define SPR_440_INV1 (0x371)
#define SPR_440_INV2 (0x372)
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index b4328f6617..cb84a8f987 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -7133,6 +7133,18 @@ POWERPC_FAMILY(POWER7P)(ObjectClass *oc, void *data)
pcc->l1_icache_size = 0x8000;
}
+static void init_proc_POWER8(CPUPPCState *env)
+{
+ /* inherit P7 */
+ init_proc_POWER7(env);
+
+ /* P8 supports the TAR */
+ spr_register(env, SPR_TAR, "TAR",
+ &spr_read_generic, &spr_write_generic,
+ &spr_read_generic, &spr_write_generic,
+ 0x00000000);
+}
+
POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
@@ -7142,7 +7154,7 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data)
dc->desc = "POWER8";
pcc->pvr = CPU_POWERPC_POWER8_BASE;
pcc->pvr_mask = CPU_POWERPC_POWER8_MASK;
- pcc->init_proc = init_proc_POWER7;
+ pcc->init_proc = init_proc_POWER8;
pcc->check_pow = check_pow_nocheck;
pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | PPC_MFTB |
PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES |