diff options
Diffstat (limited to 'target-unicore32/softmmu.c')
-rw-r--r-- | target-unicore32/softmmu.c | 29 |
1 files changed, 17 insertions, 12 deletions
diff --git a/target-unicore32/softmmu.c b/target-unicore32/softmmu.c index 22defc6db9..9a3786dddb 100644 --- a/target-unicore32/softmmu.c +++ b/target-unicore32/softmmu.c @@ -33,6 +33,8 @@ /* Map CPU modes onto saved register banks. */ static inline int bank_number(CPUUniCore32State *env, int mode) { + UniCore32CPU *cpu = uc32_env_get_cpu(env); + switch (mode) { case ASR_MODE_USER: case ASR_MODE_SUSR: @@ -46,7 +48,7 @@ static inline int bank_number(CPUUniCore32State *env, int mode) case ASR_MODE_INTR: return 4; } - cpu_abort(env, "Bad mode %x\n", mode); + cpu_abort(CPU(cpu), "Bad mode %x\n", mode); return -1; } @@ -79,7 +81,7 @@ void uc32_cpu_do_interrupt(CPUState *cs) uint32_t addr; int new_mode; - switch (env->exception_index) { + switch (cs->exception_index) { case UC32_EXCP_PRIV: new_mode = ASR_MODE_PRIV; addr = 0x08; @@ -99,7 +101,7 @@ void uc32_cpu_do_interrupt(CPUState *cs) addr = 0x18; break; default: - cpu_abort(env, "Unhandled exception 0x%x\n", env->exception_index); + cpu_abort(cs, "Unhandled exception 0x%x\n", cs->exception_index); return; } /* High vectors. */ @@ -121,7 +123,8 @@ static int get_phys_addr_ucv2(CPUUniCore32State *env, uint32_t address, int access_type, int is_user, uint32_t *phys_ptr, int *prot, target_ulong *page_size) { - CPUState *cs = ENV_GET_CPU(env); + UniCore32CPU *cpu = uc32_env_get_cpu(env); + CPUState *cs = CPU(cpu); int code; uint32_t table; uint32_t desc; @@ -168,11 +171,11 @@ static int get_phys_addr_ucv2(CPUUniCore32State *env, uint32_t address, *page_size = TARGET_PAGE_SIZE; break; default: - cpu_abort(env, "wrong page type!"); + cpu_abort(CPU(cpu), "wrong page type!"); } break; default: - cpu_abort(env, "wrong page type!"); + cpu_abort(CPU(cpu), "wrong page type!"); } *phys_ptr = phys_addr; @@ -209,9 +212,11 @@ do_fault: return code; } -int uc32_cpu_handle_mmu_fault(CPUUniCore32State *env, target_ulong address, +int uc32_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int access_type, int mmu_idx) { + UniCore32CPU *cpu = UNICORE32_CPU(cs); + CPUUniCore32State *env = &cpu->env; uint32_t phys_addr; target_ulong page_size; int prot; @@ -231,7 +236,7 @@ int uc32_cpu_handle_mmu_fault(CPUUniCore32State *env, target_ulong address, ret = get_phys_addr_ucv2(env, address, access_type, is_user, &phys_addr, &prot, &page_size); if (is_user) { - DPRINTF("user space access: ret %x, address %x, " + DPRINTF("user space access: ret %x, address %" VADDR_PRIx ", " "access_type %x, phys_addr %x, prot %x\n", ret, address, access_type, phys_addr, prot); } @@ -248,16 +253,16 @@ int uc32_cpu_handle_mmu_fault(CPUUniCore32State *env, target_ulong address, /* Map a single page. */ phys_addr &= TARGET_PAGE_MASK; address &= TARGET_PAGE_MASK; - tlb_set_page(env, address, phys_addr, prot, mmu_idx, page_size); + tlb_set_page(cs, address, phys_addr, prot, mmu_idx, page_size); return 0; } env->cp0.c3_faultstatus = ret; env->cp0.c4_faultaddr = address; if (access_type == 2) { - env->exception_index = UC32_EXCP_ITRAP; + cs->exception_index = UC32_EXCP_ITRAP; } else { - env->exception_index = UC32_EXCP_DTRAP; + cs->exception_index = UC32_EXCP_DTRAP; } return ret; } @@ -266,6 +271,6 @@ hwaddr uc32_cpu_get_phys_page_debug(CPUState *cs, vaddr addr) { UniCore32CPU *cpu = UNICORE32_CPU(cs); - cpu_abort(&cpu->env, "%s not supported yet\n", __func__); + cpu_abort(CPU(cpu), "%s not supported yet\n", __func__); return addr; } |