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2013-06-03configure: Report unknown target names more helpfullyPeter Maydell1-0/+13
If the user specifies a target list themselves, check each entry to make sure it's a target we recognise. This allows us to print a helpful error message, rather than falling through (where we would probably eventually end up hitting the uninformative "ERROR: Unsupported target CPU"). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1369062976-301-3-git-send-email-peter.maydell@linaro.org Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-06-03configure: Autogenerate default target listPeter Maydell1-70/+14
Autogenerate the default target list based on what files exist in default-configs; this allows us to remove one of the places that has to be kept up to date with a complete list of every target we support. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1369062976-301-2-git-send-email-peter.maydell@linaro.org Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-06-03Merge remote-tracking branch 'pmaydell/arm-devs.next' into stagingAnthony Liguori8-455/+735
# By Peter Crosthwaite (20) and others # Via Peter Maydell * pmaydell/arm-devs.next: (24 commits) i.MX: Improve EPIT timer code. exynos4210.c: register rom_mem for memory migration hw/arm/exynos4210.c: convert chipid_and_omr to an mmio region i.MX: split GPT and EPIT timer implementation sd/sd.c: Fix "inquiry" ACMD41 sd/sdhci:ADMA: fix interrupt sd/sdhci.c: Fix bdata_read DPRINT message sd/sdhci: Fix Buffer Write Ready interrupt sd/sdhci.c: Only reset data_count on new commands xilinx_spips: lqspi: Fix byte/misaligned access xilinx_spips: lqspi: Push more data to tx-fifo xilinx_spips: Multiple debug verbosity levels xilinx_spips: Debug msgs for Snoop state xilinx_spips: Fix striping behaviour xilinx_spips: Fix CTRL register RW bits xilinx_spips: lqspi: Dont touch config register xilinx_spips: Implement automatic CS xilinx_spips: Add automatic start support xilinx_spips: Trash LQ page cache on mode change xilinx_spips: Fix QSPI FIFO size ... Message-id: 1370277021-26129-1-git-send-email-peter.maydell@linaro.org Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-06-03i.MX: Improve EPIT timer code.Jean-Christophe DUBOIS1-104/+132
* Unify function and type naming * use dynamic cast whenever possible * simplify Debug printf. * use new style device intialization. Signed-off-by: Jean-Christophe DUBOIS <jcd@tribudubois.net> Reviewed-by: Peter Chubb <peter.chubb@nicta.com.au> Message-id: 1369839656-24466-1-git-send-email-jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-03exynos4210.c: register rom_mem for memory migrationIgor Mitsyanko1-0/+1
Even if we do not register newly created RAM MemoryRegion for migration with vmstate_register_ram_global() function, ram_save_setup() still saves this region to snapshot file with empty idstr=="". Consequently this results in error during VM loading in ram_load(). Register rom_mem for migration. Signed-off-by: Igor Mitsyanko <i.mitsyanko@samsung.com> Message-id: 1368199981-45292-3-git-send-email-i.mitsyanko@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-03hw/arm/exynos4210.c: convert chipid_and_omr to an mmio regionIgor Mitsyanko1-3/+24
Exynos SoC was misusing memory_region_init_ram_ptr(): this interface can safely be used only for memory regions which size is a multiple of target page size. Change chipid_and_omr memory to an mmio region to fix this. Signed-off-by: Igor Mitsyanko <i.mitsyanko@samsung.com> Message-id: 1368199981-45292-2-git-send-email-i.mitsyanko@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-03i.MX: split GPT and EPIT timer implementationJean-Christophe DUBOIS3-363/+410
There is no common code between these 2 timer implementation. So it is better to split them. Signed-off-by: Jean-Christophe DUBOIS <jcd@tribudubois.net> Message-id: 1368990197-19694-1-git-send-email-jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-03sd/sd.c: Fix "inquiry" ACMD41Peter Crosthwaite1-2/+9
QEMU models two (of the three) ACMD41 has two modes, "inquiry" and "first". The selection logic for which of the two is incorrect - it compares != 0 for the entire argument value rather than only bits 23:0 as per the spec. Fix. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 3ef0a7fd1b2f3ebb23b4fdeabcc14caf3fad6d71.1369622254.git.peter.crosthwaite@xilinx.com Reviewed-by: Igor Mitsyanko <i.mitsyanko@gmail.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-03sd/sdhci:ADMA: fix interruptPeter Crosthwaite1-9/+9
The end of transfer check was occurring and potentially returning before the interrupt flag was checked. This means the interrupt will be missed if it occurs on the last packet. Fix by checking for the interrupt before checking for the end of transfer. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Igor Mitsyanko <i.mitsyanko@gmail.com> Message-id: 9969ec154777957ec738fc4e539d68e7494d0081.1369370934.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-03sd/sdhci.c: Fix bdata_read DPRINT messagePeter Crosthwaite1-1/+2
This message was printing out the data in decimal only, which is not very friendly to the debugging developer. Add hex variant in parenthesis to make it consistent with other similar messages in this module. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Igor Mitsyanko <i.mitsyanko@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: d624179649137832eaa8caa263ef9589b4395d5e.1369370934.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-03sd/sdhci: Fix Buffer Write Ready interruptPeter Crosthwaite1-3/+2
This interrupt is not risen after the last block is written to sd. It is mutually exclusive with the end of transfer conditions. Fix. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Igor Mitsyanko <i.mitsyanko@gmail.com> Message-id: 7ca9fd3e03ce1bec94aff08f607c15a0ec3d3371.1369370934.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-03sd/sdhci.c: Only reset data_count on new commandsPeter Crosthwaite1-1/+1
The data_count variable was being reset on every transfer, including DMA transfer resumptions. This is incorrect, it should only be set on a new command. Manifests as a bug when using ADMA and there is a timer delay between ADMA frames where the fifo is left in a non empty state. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Igor Mitsyanko <i.mitsyanko@gmail.com> Message-id: 15a98609cc32315211b0963091a8efd67522e160.1369370934.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-03xilinx_spips: lqspi: Fix byte/misaligned accessPeter Crosthwaite1-14/+17
The LQSPI bus attachment supports byte/halfword and misaligned accesses. Fixed. Refactored the LQSPI cache to be byte-wise instead of word wise accordingly. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Message-id: 5ec47b13563ad2d22105a1f26186d7756718394b.1369117359.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-03xilinx_spips: lqspi: Push more data to tx-fifoPeter Crosthwaite1-4/+7
Do 16 words per fifo flush. Increases performance and decreases debug verbosity. This data depth has no real hardware analogue, so just go with something that has reasonable performance. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Message-id: 5621ee4621941d3639b5cacfdec26bd3148f31d5.1369117359.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-03xilinx_spips: Multiple debug verbosity levelsPeter Crosthwaite1-28/+42
The debug printfs on every SPI operation is extremely verbose. Add a second level of debug for this. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Message-id: f63478b8e5b29cc011cdc10e29f8537bb2fc2b5e.1369117359.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-03xilinx_spips: Debug msgs for Snoop statePeter Crosthwaite1-0/+3
This is worth keeping track of when debugging the device model. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Message-id: d3b44ecf23d671798b062eee5dc362c716ea54cd.1369117359.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-03xilinx_spips: Fix striping behaviourPeter Crosthwaite1-21/+63
The QSPI controller was using byte-wide stripes when striping across the two flashes in dual parallel mode. The real hardware however uses individual bit striping. QEMU misbehaves in the (corner) case where data is written/read in dual-parallel mode and read/written back in single mode. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Message-id: 718a61df1bf746ec06f6da44d12f8317af7b08ce.1369117359.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-03xilinx_spips: Fix CTRL register RW bitsPeter Crosthwaite1-2/+3
The CTRL register was RAZ/WI on some of the RW bits. Even though the function behind these bits is invalid in QEMU, they should still be guest accessible. Fix. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Message-id: b7aaad93163ce4af0c428635804ac7b77a567b25.1369117359.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-03xilinx_spips: lqspi: Dont touch config registerPeter Crosthwaite1-6/+6
The LQSPI mode is supposed to work via the automatic CS mode feature rather than manipulate CS lines itself. Now that auto CS is implemented remove LQSPIs CS mode override logic. There is still a need to manipulate the U_PAGE bit in LQSPI config register to implement dual-stack mode however. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Message-id: 000c8dd54df09523f17052638100722ef0f5a3af.1369117359.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-03xilinx_spips: Implement automatic CSPeter Crosthwaite1-4/+14
Implement the automatic CS control feature. If the MANUAL_CS bit is cleared then the chip select stay de-asserted as long as the tx FIFO is empty. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Message-id: 1d67383adc42761af715a93f161344b9284dfc9a.1369117359.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-03xilinx_spips: Add automatic start supportPeter Crosthwaite1-1/+2
SPI has a mode where it automatically starts based on tx fifo occupancy. Implemented. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Message-id: f4e9accb5de87b526fff6ed937f63278db76533b.1369117359.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-03xilinx_spips: Trash LQ page cache on mode changePeter Crosthwaite1-1/+24
Invalidate the LQSPI cached page when transitioning into LQSPI mode. Otherwise there is a possibility that the controller will return stale data to the guest when transitioning back to LQ_MODE after a page program. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Message-id: 677490a6ee1953fe5d366e599d665de645ac84db.1369117359.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-03xilinx_spips: Fix QSPI FIFO sizePeter Crosthwaite1-2/+25
QSPI has a bigger FIFO than the regular SPI controller. Differentiate between the two with correct FIFO sizes for each. This is the first piece of class data for SPIPS, so this patch sees the creation of the XilinxSPIPSClass definition and assoicated QOM constructs. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Message-id: acee25dd5e203215cbc15ca5d3cb5d5b2efebe7b.1369117359.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-03xilinx_spips: Add verbose LQSPI debug outputPeter Crosthwaite1-1/+4
You really need this is you want to track a guest banging on LQSPI. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Message-id: 26e508da4af11058d37daa777064c9e5c2a69abb.1369117359.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-03xilinx_spips: Inhibit interrupts in LQSPI modePeter Crosthwaite1-1/+6
The real hardware does not produce interrupts in LQSPI mode. Inhibit generation of interrupts when the LQ_MODE bit is set. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Message-id: dff794a06872009ea7e5733ce6adcff94d18bbd0.1369117359.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-03xilinx_spips: Make interrupts clear on readPeter Crosthwaite1-0/+4
By default these interrupts are clear on read. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Message-id: 999ff0091ed3cc3969a431bf55c00ef934cecc8e.1369117359.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-03xilinx_spips: seperate SPI and QSPI as two classesPeter Crosthwaite2-15/+56
Make SPI and QSPI different classes. QSPIPS is setup as a child of SPIPS. Only QSPI has the LQSPI functionality, so move all that to the child class. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Message-id: 2cdd0cadb5ba77ca02fde5cae627852dc9a64c71.1369117359.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-03xen: use pc_init_pci instead of pc_init_pci_no_kvmclockStefano Stabellini1-2/+2
Call kvmclock_create only if kvmclock_enabled. Use pc_init_pci on Xen rather than pc_init_pci_no_kvmclock. Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
2013-06-03xen: remove xen_vcpu_initStefano Stabellini3-25/+0
No need for xen_vcpu_init anymore: - the RTC emulator doesn't have any periodic timers continuously running even in absence of guest interactions anymore; - qemu_dummy_start_vcpu takes care of disabling TCG for us, so we don't need to do it manually here. Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> Reviewed-by: Andreas Färber <afaerber@suse.de>
2013-06-03xen: start PCI hole at 0xe0000000 (same as pc_init1 and qemu-xen-traditional)Stefano Stabellini3-9/+12
We are currently setting the PCI hole to start at HVM_BELOW_4G_RAM_END, that is 0xf0000000. Start the PCI hole at 0xe0000000 instead, that is the same value used by pc_init1 and qemu-xen-traditional. Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> CC: qemu-stable@nongnu.org
2013-06-03xen_machine_pv: do not create a dummy CPU in machine->initStefano Stabellini1-16/+0
This fixes a regression introduced by: commit 62fc403f11523169eb4264de31279745f48e3ecc Author: Igor Mammedov <imammedo@redhat.com> Date: Mon Apr 29 18:54:13 2013 +0200 target-i386: Attach ICC bus to CPU on its creation X86CPU should have parent bus so it could provide bus for child APIC. The commit makes it mandatory to pass a valid ICC bus to cpu_x86_create, but cpu_x86_init just passes NULL to it. xen_machine_pv uses cpu_x86_init, therefore it has been broken. This patch fixes the problem by removing the dummy CPU creation altogether from xen_init_pv, relying on the fact that QEMU can now cope with a machine without an emulated CPU. Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> Reviewed-by: Andreas Färber <afaerber@suse.de> CC: imammedo@redhat.com CC: qemu-stable@nongnu.org
2013-06-03main_loop: do not set nonblocking if xen_enabled()Stefano Stabellini1-1/+1
Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> CC: qemu-stable@nongnu.org
2013-06-03xen: simplify xen_enabledStefano Stabellini1-4/+0
No need for preprocessor conditionals in xen_enabled: xen_allowed is always defined. Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> CC: qemu-stable@nongnu.org
2013-06-03po/hu.po: Hungarian translation for the GTK+ interfaceÁkos Kovács1-0/+63
Cc: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Ákos Kovács <akoskovacs@gmx.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Message-id: 1367860492-3357-1-git-send-email-akoskovacs@gmx.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-06-03Merge remote-tracking branch 'kraxel/usb.83' into stagingAnthony Liguori5-25/+251
# By Gerd Hoffmann (5) and others # Via Gerd Hoffmann * kraxel/usb.83: xhci: add live migration support xhci: add xhci_init_epctx xhci: add xhci_alloc_epctx xhci: add XHCISlot->addressed pci: add VMSTATE_MSIX host-libusb: Correct test for USB packet state Fix usage of USB_DEV_FLAG_IS_HOST flag. Message-id: 1370253951-12323-1-git-send-email-kraxel@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-06-03Merge remote-tracking branch 'mjt/trivial-patches' into stagingAnthony Liguori15-60/+29
# By Ed Maste (3) and others # Via Michael Tokarev * mjt/trivial-patches: do not check pointers after dereferencing them m25p80: Add Micron n25q032a qemu: fix out of tree cross compile slirp: cleanup leftovers from misc.h migration: Remove duplicate bandwidth_limit set docs: Fix typo and update file in migration configure: try pkg-config ncurses first rtc: remove rtc_set_date linux-user: Fix typo in comment configure: remove confusing file manipulation debugcon: fix compiler warning when open DEBUG_DEBUGCON debugcon: make debug message more readable debugcon: fix always print "addr=0x0, val=0x0" bug when use DEBUG_DEBUGCON Remove unnecessary break statements don't run pkg-config for features explicitly disabled Message-id: 51A9CCFB.1000109@msgid.tls.msk.ru Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-06-03xhci: add live migration supportGerd Hoffmann1-1/+163
With all preparing pieces in place we can finally drop in the vmstate structs and the postload function. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2013-06-03xhci: add xhci_init_epctxGerd Hoffmann1-18/+25
Factor out endpoint context initialization to a separate function. xhci live migration will need that too, in post_load. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2013-06-03xhci: add xhci_alloc_epctxGerd Hoffmann1-11/+21
Factor out endpoint context allocation to a separate function. xhci live migration will need that too, in post_load. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2013-06-03xhci: add XHCISlot->addressedGerd Hoffmann1-0/+3
Preparing for live-migration support, post_load will need that. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2013-06-03pci: add VMSTATE_MSIXGerd Hoffmann2-0/+44
Using a trick cut+pasted from vmstate_scsi_device to wind up msix_save and msix_load. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com>
2013-06-03host-libusb: Correct test for USB packet stateEd Maste1-1/+1
USB_RET_ASYNC is -6, so inflight was always false. Signed-off-by: Ed Maste <emaste@freebsd.org> Cc: qemu-stable@nongnu.org Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2013-06-03Fix usage of USB_DEV_FLAG_IS_HOST flag.Michael Marineau1-1/+1
USB_DEV_FLAG_IS_HOST is the bit number, not value. Booting with a "Fitbit Base Station" USB dongle was triggering this assert. Signed-off-by: Michael Marineau <mike@marineau.org> Cc: qemu-stable@nongnu.org Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2013-06-02tcx: Fix 24-bit display modeMark Cave-Ayland1-4/+6
Commit d08151bf (conversion of tcx to the memory API) broke the 24-bit mode of the tcx display adapter by accidentally passing in the final address of the dirty region to memory_region_reset_dirty() instead of its size. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-06-02pvpanic: use FWCfgState explicitlyMichael S. Tsirkin1-1/+1
Use the type-safe FWCfgState structure instead of the unsafe void *. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-06-02fw_cfg: fw_cfg is a singletonMichael S. Tsirkin1-4/+3
Make sure we only have a single instance ever: because if it isn't we can't find it so it's useless anyway. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-06-02fw_cfg: add API to find FW cfg objectMichael S. Tsirkin3-4/+15
Remove some code duplication by adding a function to look up the fw cfg file. This way, we don't need to duplicate same strings everywhere. Use by both fw cfg and pvpanic device. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-06-02fw_cfg: move typedef to qemu/typedefs.hMichael S. Tsirkin3-2/+2
Less header dependencies this way. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-06-02refer to FWCfgState explicitlyLaszlo Ersek10-29/+33
Currently some places use pointer-to-void even though they mean pointer-to-FWCfgState. Clean them up. Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-06-02apic: rename apic specific bitoptsMichael S. Tsirkin1-21/+21
apic has its own version of bitops, with the difference that it works on u32 and not long. Add apic_ prefix to avoid namespace clashes. We should look into reusing standard bitops long-term, but that's not entirely trivial. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
generated by cgit v1.2.1 (git 2.18.0) at 2024-05-18 21:58:31 +0000