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2014-02-05Merge remote-tracking branch 'remotes/mjt/tags/trivial-patches-2014-02-02' ↵Peter Maydell9-28/+12
into staging trivial patches for 2014-02-02 # gpg: Signature made Sun 02 Feb 2014 16:11:37 GMT using RSA key ID 74F0C838 # gpg: Good signature from "Michael Tokarev <mjt@tls.msk.ru>" # gpg: aka "Michael Tokarev <mjt@corpit.ru>" # gpg: aka "Michael Tokarev <mjt@debian.org>" # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 6EE1 95D1 886E 8FFB 810D 4324 457C E0A0 8044 65C5 # Subkey fingerprint: E190 8639 3B10 B51B AC2C 8B73 5253 C5AD 74F0 C838 * remotes/mjt/tags/trivial-patches-2014-02-02: tests/.gitignore: Ignore tests/check-qom-interface hw/ppc: Remove unused defines readline: Add missing GCC_FMT_ATTR tcg/s390: Remove sigill_handler i386: Add missing include file for QEMU_PACKED osdep: drop unused #include "trace.h" qemu 1.7.0 does not build on NetBSD Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-05Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into ↵Peter Maydell10-57/+108
staging Block pull request # gpg: Signature made Fri 31 Jan 2014 21:16:43 GMT using RSA key ID 81AB73C8 # gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>" # gpg: aka "Stefan Hajnoczi <stefanha@gmail.com>" # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35 775A 9CA4 ABB3 81AB 73C8 * remotes/stefanha/tags/block-pull-request: qemu-iotests: only run 071 on qcow2 dataplane: Comment fix block/vhdx: Error checking fixes qemu-iotests: Drop assert_no_active_commit in case 040 block/vmdk: add basic .bdrv_check support block: remove qcow2 .bdrv_make_empty implementation block: remove QED .bdrv_make_empty implementation Describe flaws in qcow/qcow2 encryption in the docs Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-04Merge remote-tracking branch 'remotes/borntraeger/tags/kvm-s390-20140131' ↵Peter Maydell8-101/+304
into staging This patch set contains the sclp defines and events for cpu hotplug, the initial sclp defines (without code yet) for standby memory (some sort of memory hotplug) as well as a cleanup of the kvm register synchronization. # gpg: Signature made Fri 31 Jan 2014 08:54:29 GMT using RSA key ID B5A61C7C # gpg: Can't check signature: public key not found * remotes/borntraeger/tags/kvm-s390-20140131: s390x/kvm: cleanup partial register handling sclp-s390: Define new SCLP codes and structures s390-sclp: SCLP Event integration s390-sclp: SCLP CPU Info s390-sclp: Define New SCLP Codes Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-04Merge remote-tracking branch 'remotes/mcayland/qemu-openbios' into stagingPeter Maydell6-1/+1
* remotes/mcayland/qemu-openbios: Update OpenBIOS images Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-03linux-user: Fix trampoline code for CRISStefan Weil1-4/+4
__put_user can write bytes, words (2 bytes) or longwords (4 bytes). Here obviously words should have been written, but bytes were written, so values like 0x9c5f were truncated to 0x5f. Fix this by changing retcode from uint8_t to to uint16_t in target_signal_frame and also in the unused rt_signal_frame. This problem was reported by static code analysis (smatch). Cc: qemu-stable@nongnu.org Signed-off-by: Stefan Weil <sw@weilnetz.de> Acked-by: Riku Voipio <riku.voipio@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2014-02-03cris: Remove the CRIS PIC glueEdgar E. Iglesias3-50/+0
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2014-02-03axis-dev88: Connect the PIC upstream IRQs directly to the CPUEdgar E. Iglesias1-4/+3
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2014-02-03cris: Add interrupt signals to the CPU deviceEdgar E. Iglesias2-0/+24
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2014-02-03cris: Abort when a v10 takes interrupts while in a delayslotEdgar E. Iglesias1-0/+5
This is an internal error as the CRISv10 should mask interrupts while executing delay slots. Bail out sooner rather than later. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2014-02-03cris: Add "any" as alias for "crisv32" in user emulationEdgar E. Iglesias1-0/+6
Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2014-02-01Merge remote-tracking branch 'qmp-unstable/queue/qmp' into stagingPeter Maydell9-26/+160
* qmp-unstable/queue/qmp: monitor: Cleanup mon->outbuf on write error virtio_rng: replace custom backend API with UserCreatable.complete() callback add optional 2nd stage initialization to -object/object-add commands vl.c: -object: don't ignore duplicate 'id' object_add: consolidate error handling Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-01Merge remote-tracking branch 'pmaydell/tags/pull-target-arm-20140131' into ↵Peter Maydell16-70/+3087
staging target-arm queue: * implementation of first part of the A64 Neon instruction set * v8 AArch32 rounding and 16<->64 fp conversion instructions * fix MIDR value on Zynq boards * some minor bugfixes/code cleanups # gpg: Signature made Fri 31 Jan 2014 15:06:34 GMT using RSA key ID 14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" * pmaydell/tags/pull-target-arm-20140131: (34 commits) arm_gic: Fix GICD_ICPENDR and GICD_ISPENDR writes arm_gic: Introduce define for GIC_NR_SGIS target-arm: A64: Add SIMD shift by immediate target-arm: A64: Add simple SIMD 3-same floating point ops target-arm: A64: Add integer ops from SIMD 3-same group target-arm: A64: Add logic ops from SIMD 3 same group target-arm: A64: Add top level decode for SIMD 3-same group target-arm: A64: Add SIMD scalar 3 same add, sub and compare ops target-arm: A64: Add SIMD three-different ABDL instructions target-arm: A64: Add SIMD three-different multiply accumulate insns target-arm: Add AArch32 SIMD VCVTA, VCVTN, VCVTP and VCVTM target-arm: Add AArch32 FP VCVTA, VCVTN, VCVTP and VCVTM target-arm: Add AArch32 SIMD VRINTA, VRINTN, VRINTP, VRINTM, VRINTZ target-arm: Add set_neon_rmode helper target-arm: Add support for AArch32 SIMD VRINTX target-arm: Add support for AArch32 FP VRINTX target-arm: Add support for AArch32 FP VRINTZ target-arm: Add support for AArch32 FP VRINTR target-arm: Add AArch32 FP VRINTA, VRINTN, VRINTP and VRINTM target-arm: Move arm_rmode_to_sf to a shared location. ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-01Merge remote-tracking branch ↵Peter Maydell4-17/+77
'remotes/awilliam/tags/vfio-pci-for-qemu-20140128.0' into staging vfio-pci updates include: - Destroy MemoryRegions on device teardown - Print warnings around PCI option ROM failures - Skip bogus mappings from 64bit BAR sizing - Act on DMA mapping failures - Fix alignment to avoid MSI-X table mapping - Fix debug macro typo # gpg: Signature made Tue 28 Jan 2014 15:27:47 GMT using RSA key ID 3BB08B22 # gpg: Can't check signature: public key not found * remotes/awilliam/tags/vfio-pci-for-qemu-20140128.0: vfio: correct debug macro typo vfio: fix mapping of MSIX bar kvm: initialize qemu_host_page_size vfio-pci: Fail initfn on DMA mapping errors vfio: Filter out bogus mappings vfio: Do not reattempt a failed rom read vfio: warn if host device rom can't be read vfio: Destroy memory regions Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-01Merge remote-tracking branch 'remotes/sstabellini/xen-140130' into stagingPeter Maydell1-2/+4
* remotes/sstabellini/xen-140130: address_space_translate: do not cross page boundaries Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-01tests/.gitignore: Ignore tests/check-qom-interfaceFam Zheng1-0/+1
Signed-off-by: Fam Zheng <famz@redhat.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2014-02-01hw/ppc: Remove unused definesStefan Weil1-2/+0
Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2014-02-01readline: Add missing GCC_FMT_ATTRStefan Weil3-3/+6
This fixes a compiler warning with -Werror=missing-format-attribute and allows improved compiler checks for variable argument lists. Signed-off-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2014-02-01tcg/s390: Remove sigill_handlerRichard Henderson1-19/+0
Commit c9baa30f42a87f61627391698f63fa4d1566d9d8 failed to delete all of the relevant code, leading to Werrors about unused symbols. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2014-02-01i386: Add missing include file for QEMU_PACKEDStefan Weil1-2/+1
Instead of packing BiosLinkerLoaderEntry, an unused global variable called QEMU_PACKED was created (detected by smatch static code analysis). Including qemu-common.h gets the right definition and also includes some standard include files which now can be removed here. Cc: qemu-stable@nongnu.org Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2014-02-01osdep: drop unused #include "trace.h"Stefan Hajnoczi1-1/+0
osdep.c does not use trace_*() so we can just drop the include. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Benoit Canet <benoit@irqsave.net> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2014-02-01qemu 1.7.0 does not build on NetBSDMartin Husemann1-1/+4
Do not rely on int8_t (and friends) not being preprocessor symbols (or symbols expanding to themselves). On NetBSD (for example) the glue(u, SDATA_TYPE) results in u__int8_t, which is undefined. There is no way to stop cpp expanding inner macros, so just add the few lines explicitly and get rid of the magic. Signed-off-by: Martin Husemann <martin@NetBSD.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2014-01-31qemu-iotests: only run 071 on qcow2Stefan Hajnoczi1-1/+1
The 071 test is designed for IMGFMT=qcow2 because it uses the l2_load blkdebug event. Its output filtering also assumes that IMGFMT is not raw since 071.out contains "format=raw" but IMGFMT=raw would filter the output to "format=IMGFMT". Perhaps the test case can be rewritten to be more generic, but for now let's document that it was only supposed to work with qcow2. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Benoit Canet <benoit@irqsave.net>
2014-01-31dataplane: Comment fixMarkus Armbruster1-1/+1
Signed-off-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2014-01-31block/vhdx: Error checking fixesMarkus Armbruster2-6/+6
Errors are inadvertently ignored in a few places. Has always been broken. Spotted by Coverity. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Jeff Cody <jcody@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2014-01-31qemu-iotests: Drop assert_no_active_commit in case 040Fam Zheng1-16/+12
It is exactly assert_no_active_block_jobs in iotests.py Signed-off-by: Fam Zheng <famz@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2014-01-31block/vmdk: add basic .bdrv_check supportPeter Lieven1-0/+48
this adds a basic vmdk corruption check. it should detect severe table corruptions and file truncation. Signed-off-by: Peter Lieven <pl@kamp.de> Reviewed-by: Fam Zheng <famz@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2014-01-31block: remove qcow2 .bdrv_make_empty implementationJeff Cody1-21/+0
The QCOW2 .bdrv_make_empty implementation always returns 0 for success, but does not actually do anything. The proper way to not support an optional driver function stub is to just not implement it, so let's remove the stub. Signed-off-by: Jeff Cody <jcody@redhat.com> Reviewed-by: Benoit Canet <benoit@irqsave.net> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2014-01-31block: remove QED .bdrv_make_empty implementationJeff Cody1-6/+0
The QED .bdrv_make_empty() implementation does nothing but return -ENOTSUP, which causes problems in bdrv_commit(). Since the function stub exists for QED, it is called, which then always returns an error. The proper way to not support an optional driver function stub is to just not implement it, so let's remove the stub. Signed-off-by: Jeff Cody <jcody@redhat.com> Reviewed-by: Benoit Canet <benoit@irqsave.net> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2014-01-31Describe flaws in qcow/qcow2 encryption in the docsDaniel P. Berrange2-6/+40
The qemu-img.texi / qemu-doc.texi files currently describe the qcow2/qcow2 encryption thus "Encryption uses the AES format which is very secure (128 bit keys). Use a long password (16 characters) to get maximum protection." While AES is indeed a strong encryption system, the way that QCow/QCow2 use it results in a poor/weak encryption system. Due to the use of predictable IVs, based on the sector number extended to 128 bits, it is vulnerable to chosen plaintext attacks which can reveal the existence of encrypted data. The direct use of the user passphrase as the encryption key also leads to an inability to change the passphrase of an image. If passphrase is ever compromised the image data will all be vulnerable, since it cannot be re-encrypted. The admin has to clone the image files with a new passphrase and then use a program like shred to secure erase all the old files. Recommend against any use of QCow/QCow2 encryption, directing users to dm-crypt / LUKS which can meet modern cryptography best practices. [Changed "Qcow" to "qcow" for consistency. --Stefan] Signed-off-by: Daniel P. Berrange <berrange@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2014-01-31arm_gic: Fix GICD_ICPENDR and GICD_ISPENDR writesChristoffer Dall1-1/+5
Fix two bugs that would allow changing the state of SGIs through the ICPENDR and ISPENDRs. Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-01-31arm_gic: Introduce define for GIC_NR_SGISChristoffer Dall2-6/+12
Instead of hardcoding 16 various places in the code, use a define to make it more clear what is going on. Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-01-31target-arm: A64: Add SIMD shift by immediateAlex Bennée1-2/+373
This implements a subset of the AdvSIMD shift operations (namely all the none saturating or narrowing ones). The actual shift generation code itself is common for both the scalar and vector cases but wrapped with either vector element iteration or the fp reg access. The rounding operations need to take special care to correctly reflect the result of adding rounding bits on high bits as the intermediates do not truncate. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-01-31target-arm: A64: Add simple SIMD 3-same floating point opsPeter Maydell1-2/+188
Implement a simple subset of the SIMD 3-same floating point operations. This includes a common helper function used for both scalar and vector ops; FABD is the only currently implemented shared op. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-01-31target-arm: A64: Add integer ops from SIMD 3-same groupPeter Maydell1-1/+164
Add some of the integer operations in the SIMD 3-same group: specifically, the comparisons, addition and subtraction. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-01-31target-arm: A64: Add logic ops from SIMD 3 same groupPeter Maydell1-1/+72
Add support for the logical operations (ORR, AND, BIC, ORN, EOR, BSL, BIT and BIF) from the SIMD 3 register same group (C3.6.16). Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-01-31target-arm: A64: Add top level decode for SIMD 3-same groupPeter Maydell1-1/+44
Add top level decode for the A64 SIMD three regs same group (C3.6.16), splitting it into the pairwise, logical, float and integer subgroups. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-01-31target-arm: A64: Add SIMD scalar 3 same add, sub and compare opsPeter Maydell1-1/+130
Implement the add, sub and compare ops from the SIMD "scalar three same" group. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-01-31target-arm: A64: Add SIMD three-different ABDL instructionsPeter Maydell1-2/+33
Implement the absolute-difference instructions in the SIMD three-different group: SABAL, SABAL2, UABAL, UABAL2, SABDL, SABDL2, UABDL, UABDL2. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-01-31target-arm: A64: Add SIMD three-different multiply accumulate insnsPeter Maydell1-1/+232
Add support for the multiply-accumulate instructions from the SIMD three-different instructions group (C3.6.15): * skeleton decode of unallocated encodings and split of the group into its three sub-parts * framework for handling the 64x64->128 widening subpart * implementation of the multiply-accumulate instructions SMLAL, SMLAL2, UMLAL, UMLAL2, SMLSL, SMLSL2, UMLSL, UMLSL2, UMULL, UMULL2, SMULL, SMULL2 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-01-31target-arm: Add AArch32 SIMD VCVTA, VCVTN, VCVTP and VCVTMWill Newton1-1/+52
Add support for the AArch32 Advanced SIMD VCVTA, VCVTN, VCVTP and VCVTM instructions. Signed-off-by: Will Newton <will.newton@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-01-31target-arm: Add AArch32 FP VCVTA, VCVTN, VCVTP and VCVTMWill Newton1-0/+61
Add support for the AArch32 floating-point VCVTA, VCVTN, VCVTP and VCVTM instructions. Signed-off-by: Will Newton <will.newton@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-01-31target-arm: Add AArch32 SIMD VRINTA, VRINTN, VRINTP, VRINTM, VRINTZWill Newton1-1/+39
Add support for the AArch32 Advanced SIMD VRINTA, VRINTN, VRINTP VRINTM and VRINTZ instructions. Signed-off-by: Will Newton <will.newton@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-01-31target-arm: Add set_neon_rmode helperWill Newton2-0/+18
This helper sets the rounding mode in the standard_fp_status word to allow NEON instructions to modify the rounding mode whilst using the standard FPSCR values for everything else. Signed-off-by: Will Newton <will.newton@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-01-31target-arm: Add support for AArch32 SIMD VRINTXWill Newton1-1/+10
Add support for the AArch32 Advanced SIMD VRINTX instruction. Signed-off-by: Will Newton <will.newton@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-01-31target-arm: Add support for AArch32 FP VRINTXWill Newton1-0/+11
Add support for the AArch32 floating-point VRINTX instruction. Signed-off-by: Will Newton <will.newton@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-01-31target-arm: Add support for AArch32 FP VRINTZWill Newton1-0/+16
Add support for the AArch32 floating-point VRINTZ instruction. Signed-off-by: Will Newton <will.newton@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-01-31target-arm: Add support for AArch32 FP VRINTRWill Newton1-0/+11
Add support for the AArch32 floating-point VRINTR instruction. Signed-off-by: Will Newton <will.newton@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-01-31target-arm: Add AArch32 FP VRINTA, VRINTN, VRINTP and VRINTMWill Newton1-0/+54
Add support for AArch32 ARMv8 FP VRINTA, VRINTN, VRINTP and VRINTM instructions. Signed-off-by: Will Newton <will.newton@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-01-31target-arm: Move arm_rmode_to_sf to a shared location.Will Newton3-28/+30
This function will be needed for AArch32 ARMv8 support, so move it to helper.c where it can be used by both targets. Also moves the code out of line, but as it is quite a large function I don't believe this should be a significant performance impact. Signed-off-by: Will Newton <will.newton@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-01-31display: avoid multi-statement macroPaolo Bonzini4-29/+59
For blizzard, pl110 and tc6393xb this is harmless, but for pxa2xx Coverity noticed that it is used inside an "if" statement. Fix it because it's the file with the highest number of defects in the whole QEMU tree! Use "do...while (0)", or just remove the semicolon if there's a single statement in the macro. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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