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2012-12-14pseries: Update SLOF for NVRAM supportDavid Gibson3-1/+1
Now that we have implemented PAPR compatible NVRAM interfaces in qemu, this updates the SLOF firmware to actually initialize and use the NVRAM as a PAPR guest firmware is expected to do. This SLOF update also includes an ugly but useful workaround for a bug in the SLES11 installer which caused it to fail under KVM. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-12-14pseries: Implement PAPR NVRAMDavid Gibson5-1/+236
The PAPR specification requires a certain amount of NVRAM, accessed via RTAS, which we don't currently implement in qemu. This patch addresses this deficiency, implementing the NVRAM as a VIO device, with some glue to instantiate it automatically based on a machine option. The machine option specifies a drive id, which is used to back the NVRAM, making it persistent. If nothing is specified, the driver instead simply allocates space for the NVRAM, which will not be persistent Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-12-14pseries: Split xics irq configuration from state informationDavid Gibson1-12/+8
Currently the XICS irq controller code has a per-irq state structure which amongst other things includes whether the interrupt is level or message triggered - this is configured by the platform code, and is not directly visible to the guest. This leads to a slightly awkward construct at reset time where we need to reset everything in the state structure _except_ the lsi/msi flag, which needs to retain the information given at platform init time. More importantly this flag will make matching the qemu state to the KVM state for the upcoming in-kernel XICS implementation more awkward. This patch, therefore, removes this flag from the per-irq state structure, instead adding a parallel array giving the lsi/msi configuration per irq. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-12-14pseries: Add tracepoints to the XICS interrupt controllerDavid Gibson2-3/+33
This patch adds tracing / debugging calls to the XICS interrupt controller implementation used on the pseries machine. Signed-off-by: Ben Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-12-14pseries: Allow RTAS tokens without a qemu handlerBen Herrenschmidt1-1/+1
Kernel-based RTAS calls will not have a qemu handler, but will still be registered in qemu in order to be assigned a token number and appear in the device-tree. Let's test for the name being NULL rather than the handler when deciding to skip an entry while building the device-tree Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-12-14pseries: Return the token when we register an RTAS callMichael Ellerman2-3/+3
The kernel will soon be able to service some RTAS calls. However the choice of tokens will still be up to userspace. To support this have spapr_rtas_register() return the token that is allocated for an RTAS call, that allows the calling code to tell the kernel what the token value is. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-12-14pseries: Use #define for XICS base irq numberBen Herrenschmidt3-2/+3
Currently the lowest "real" irq number for the XICS irq controller (as opposed to numbers reserved for IPIs and other special purposes) is hard coded as 16 in two places - in xics_system_init() and in spapr.c. As well as being generally bad practice, we're going to need to change this number soon to fit in with the in-kernel XICS implementation. This patch adds a #define for this number to avoid future breakage. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Ben Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-12-14pseries: Fix incorrect initialization of interrupt controllerDavid Gibson1-1/+1
Currently in the reset code for the XICS interrupt controller, we initialize the pending_priority field to 0 (most favored, by XICS convention). This is incorrect, since there is no pending interrupt, it should be set to least favored - 0xff. At the moment our XICS implementation doesn't get hurt by this edge case, but it does confuse the upcoming kernel XICS implementation. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-12-10Merge remote-tracking branch 'afaerber/qom-cpu' into stagingAnthony Liguori16-132/+149
* afaerber/qom-cpu: target-i386: Postpone cpuid_level update to realize time target-i386: Use define for cpuid vendor string size target-i386: Separate feature string parsing from CPU model lookup target-i386/cpu.c: Coding style fixes qdev: qdev_create(): use error_report() instead of hw_error() sysemu.h: Include qemu-types.h instead of qemu-common.h Create qemu-types.h for struct typedefs qlist.h: Do not include qemu-common.h qga/channel-posix.c: Include headers it needs qapi/qmp-registry.c: Include headers it needs ui/vnc-palette.c: Include headers it needs user: Rename qemu-types.h to qemu-user-types.h user: Move *-user/qemu-types.h to main directory Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-12-10Merge remote-tracking branch 'stefanha/trivial-patches' into stagingAnthony Liguori19-48/+32
* stefanha/trivial-patches: pc_sysfw: Plug memory leak on pc_fw_add_pflash_drv() error path qemu-options: Fix space at EOL Fix spelling in comments and documentation Clean up pci_drive_hot_add()'s use of BlockInterfaceType arm: a9mpcore: remove un-used ptimer_iomem field target-sparc: Remove t0, t1 from CPUSPARCState target-m68k: Remove t1 from CPUM68KState target-alpha: Remove t0, t1 from CPUAlphaState s390x: Spelling fixes (endianess -> endianness, occured -> occurred) Fix comments (adress -> address, layed -> laid, wierd -> weird) Fix spelling (prefered -> preferred) configure: Remove stray debug output sd: Send debug printfery to stderr not stdout Conflicts: configure Resolve spelling conflict in configure. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-12-10Merge remote-tracking branch 'kraxel/acpi.1' into stagingAnthony Liguori11-415/+317
* kraxel/acpi.1: acpi: drop debug port q35: update lpc pci config space according to configured devices apci: switch piix4 pci hotplug to memory api acpi: remove acpi_gpe_blk apci: switch piix4 gpe to memory api acpi: fix piix4 smbus mapping acpi: switch smbus to memory api acpi: cleanup ich9 memory region apci: switch ich9 smi to memory api apci: switch ich9 gpe to memory api acpi: cleanup vt82c686 memory region acpi: cleanup piix4 memory region apci: switch evt to memory api apci: switch cnt to memory api apci: switch timer to memory api apci: switch vt82c686 to memory api apci: switch ich9 to memory api apci: switch piix4 to memory api Conflicts: hw/lpc_ich9.c Resolved merge conflict due to apm_init adding an argument. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-12-10Merge remote-tracking branch 'aneesh/for-upstream' into stagingAnthony Liguori1-29/+64
* aneesh/for-upstream: virtfs-proxy-helper: use setresuid and setresgid Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-12-10Merge remote-tracking branch 'kraxel/usb.74' into stagingAnthony Liguori13-9/+168
* kraxel/usb.74: usb-tablet: Allow connecting to ehci ehci: Lower timer freq when the periodic schedule is idle usb: Allow overriding of usb_desc at the device level usb: Don't allow USB_RET_ASYNC for interrupt packets usb: Call wakeup when data becomes available for all devices with int eps add pc-1.4 Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-12-08configure: Default to 'cc', not 'gcc'Peter Maydell1-2/+11
Default to 'cc' as our compiler, rather than 'gcc'. We used to have to insist on gcc when we still kept the CPU env in a fixed global register, but this is no longer necessary and we will now compile OK on clang as well as gcc. Using 'cc' should generally result in us using the most standard and maintained system compiler for the platform. (For instance on newer MacOS X 'gcc' exists but is an elderly compiler provided mostly for legacy reasons, and 'cc' (which is clang) is definitely the better choice.) On Linux there will generally be no user-visible change since cc will be gcc. This changeover necessitates a slight reworking of how we set the 'cc' variable, because GNU cross toolchains generally provide a '${cross_prefix}gcc' but not a '${cross_prefix}cc'. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-12-08linux-user: Merge pread/pwrite into pread64/pwrite64Peter Maydell6-32/+8
The Linux syscalls underlying pread() and pwrite() take a 64 bit offset on all architectures, even if some of them name the syscall "pread/pwrite" rather than "pread64/pwrite64" for historical reasons. So move the four QEMU target architectures (arm, i386, sparc, unicore32) which were defining TARGET_NR_pread/pwrite to define TARGET_NR_pread64/pwrite64 instead, and drop the TARGET_NR_pread/pwrite implementation code completely. (Based on examination of the kernel sources for the four architectures this patch affects.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-12-08target-xtensa: use movcond where possibleMax Filippov1-50/+42
Use movcond for all sorts of conditional moves, ABS, CLAMPS, MIN/MAX opcodes. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-12-08target-xtensa: add s32c1i unit testsMax Filippov2-0/+40
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-12-08target-xtensa: add SR accessibility unit testsMax Filippov3-1/+92
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-12-08target-xtensa: implement MISC SRMax Filippov3-0/+6
The Miscellaneous Special Registers Option provides zero to four scratch registers within the processor readable and writable by RSR, WSR, and XSR. These registers are privileged. They may be useful for some application-specific exception and interrupt processing tasks in the kernel. The MISC registers are undefined after reset. See ISA, 4.7.3 for details. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-12-08target-xtensa: better control rsr/wsr/xsr access to SRsMax Filippov1-19/+30
There are read-only (DEBUGCAUSE, PRID) and write-only (INTCLEAR) SRs, and INTERRUPT/INTSET SR allows rsr/wsr, but not xsr. Raise illeagal opcode exception on illegal access to these SRs. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-12-08target-xtensa: restrict available SRs by enabled optionsMax Filippov3-105/+130
Beginning with the RA-2004.1 release, SR access instructions (rsr, wsr, xsr) are associated with their corresponding SR and raise illegal opcode exception in case the register is not configured for the core. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-12-08target-xtensa: implement CACHEATTR SRMax Filippov5-1/+25
In XEA1, the Options for Memory Protection and Translation and the corresponding TLB management instructions are not available. Instead, functionality similar to the Region Protection Option is available through the cache attribute register. See ISA, A.2.14 for details. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-12-08target-xtensa: implement ATOMCTL SRMax Filippov7-14/+131
ATOMCTL SR controls s32c1i opcode behavior depending on targeted memory type. See ISA, 4.3.12.4 for details. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-12-08Merge branch 'master' of git.qemu-project.org:/pub/git/qemuBlue Swirl6-15/+55
* 'master' of git.qemu-project.org:/pub/git/qemu: target-mips: Fix incorrect shift for SHILO and SHILOV target-mips: Fix incorrect code and test for INSV xilinx_uartlite: Accept input after rx FIFO pop xilinx_uartlite: suppress "cannot receive message" xilinx_axienet: Implement R_IS behaviour
2012-12-08finally kill cpudef config section supportEduardo Habkost1-49/+0
The external CPU models were removed on QEMU 1.2, and the support for the "cpudef" config sections was documented as deprecated, but the actual removal of the config section was pending. Now that QEMU 1.3 was released, we can finally kill the support for cpudef config sections, and support only the built-in CPU models from target-i386/cpu.c. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-12-08Merge branch 'memory-ioport' of git://github.com/afaerber/qemu-cpuBlue Swirl13-78/+178
* 'memory-ioport' of git://github.com/afaerber/qemu-cpu: hw/dma.c: Replace register_ioport_* hw/pc.c: Replace register_ioport_* serial: Replace register_ioport_* hw/cirrus_vga.c: Replace register_ioport_* hw/apm.c: Replace register_ioport_* isa: Add isa_address_space_io()
2012-12-08HACKING: List areas where we may rely on impdef C behaviourPeter Maydell1-0/+20
Add a section to HACKING saying which version of the C spec we use and describing the bits of implementation defined C compiler behaviour which C code in QEMU is allowed to rely on. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-12-08pixman: require 0.18.4 or newerGerd Hoffmann1-2/+2
When older versions are found the internal pixman version is prefered. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-12-08TCG: Remove unused global gen_opc_ arrays.Evgeny Voevodin2-8/+0
Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-12-08TCG: Use gen_opc_instr_start from context instead of global variable.Evgeny Voevodin16-46/+47
Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-12-08TCG: Use gen_opc_icount from context instead of global variable.Evgeny Voevodin16-16/+16
Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-12-08TCG: Use gen_opc_pc from context instead of global variable.Evgeny Voevodin15-33/+34
Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-12-08tcg/tcg.h: Duplicate global TCG gen_opc_ arrays into TCGContext.Evgeny Voevodin1-0/+3
Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-12-08curses: Remove OpenBSD workaroundBrad Smith1-4/+0
I removed the same sort of workaround for OpenBSD within the configure script with commit 4dcc3f5876fa638d5c35bd47be3b717ea74cc2e7 but didn't bother to grep further to come across this same chunk of code in the curses code itself. So the following diff removes the same workaround chunk within the curses code. Signed-off-by: Brad Smith <brad@comstyle.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-12-08exec: Advise huge pages for the TCG code gen bufferRichard Henderson1-0/+2
After allocating 32MB or more contiguous memory, huge pages would seem to be ideal. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-12-07target-i386: Postpone cpuid_level update to realize timeIgor Mammedov1-3/+5
Delay capping cpuid_level to 7 to realize time so property setters for cpuid_7_0_ebx_features and "level" could be used in any order/time between x86_cpu_initfn() and x86_cpu_realize(). Signed-off-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-12-07pc_sysfw: Plug memory leak on pc_fw_add_pflash_drv() error pathMarkus Armbruster1-1/+3
Harmless, because we the error inevitably leads to another, fatal one in pc_system_flash_init(): PC system firmware (pflash) not available. Fix it anyway. Signed-off-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2012-12-07qemu-options: Fix space at EOLMichal Privoznik1-1/+1
There's no need to add a space at the end of line. Moreover, it can make problems in some projects that store the help output into a file (and run couple of tests based on that) and have space at EOL forbidden. Signed-off-by: Michal Privoznik <mprivozn@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2012-12-07Fix spelling in comments and documentationStefan Weil2-4/+4
These spelling bugs were found by codespell: supressing -> suppressing transfered -> transferred Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2012-12-07Clean up pci_drive_hot_add()'s use of BlockInterfaceTypeMarkus Armbruster3-13/+8
pci_drive_hot_add() parameter type has the wrong type: int instead of BlockInterfaceType. It's actually redundant, so we can just drop it. Signed-off-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2012-12-07arm: a9mpcore: remove un-used ptimer_iomem fieldPeter Crosthwaite1-1/+0
I'm guessing this is a hangover from a previous coreification of the mptimer sub-module. This field is completely unused - removed. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2012-12-07target-sparc: Remove t0, t1 from CPUSPARCStateRichard Henderson1-1/+0
These fields are no longer used. Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2012-12-07target-m68k: Remove t1 from CPUM68KStateRichard Henderson1-3/+0
This field is no longer used. Cc: Paul Brook <paul@codesourcery.com> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2012-12-07target-alpha: Remove t0, t1 from CPUAlphaStateRichard Henderson1-7/+0
These fields are no longer (or were never?) used. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2012-12-07s390x: Spelling fixes (endianess -> endianness, occured -> occurred)Stefan Weil2-4/+4
Replace also "write into" by "write to". Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2012-12-07Fix comments (adress -> address, layed -> laid, wierd -> weird)Stefan Weil3-5/+5
Remove also a duplicated 'the'. Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2012-12-07Fix spelling (prefered -> preferred)Stefan Weil2-4/+5
Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2012-12-07configure: Remove stray debug outputPeter Maydell1-2/+0
Rather than printing a message saying we're silently falling back to gthread coroutines when running on MacOS, actually do it silently. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2012-12-07sd: Send debug printfery to stderr not stdoutPeter Crosthwaite1-2/+2
Some debug printfs for SD are coming up in stdout. Redirected them to stderr instead. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2012-12-06target-i386: Use define for cpuid vendor string sizeIgor Mammedov2-3/+5
Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
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