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2012-10-31target-mips: fix FPU exceptionsAurelien Jarno1-13/+19
For each FPU instruction that can trigger an FPU exception, to call call update_fcr31() after. Remove the manual NaN assignment in case of float to float operation, as softfloat is already taking care of that. However for float to int operation, the value has to be changed to the MIPS one. In the cvtpw_ps case, the two registers have to be handled separately to guarantee a correct final value in both registers. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31target-mips: keep softfloat exception set to 0 between instructionsAurelien Jarno1-63/+10
Instead of clearing the softfloat exception flags before each floating point instruction, reset them to 0 in update_fcr31() when an exception is detected. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31target-mips: use the softfloat floatXX_muladd functionsAurelien Jarno3-105/+64
Use the new softfloat floatXX_muladd() functions to implement the madd, msub, nmadd and nmsub instructions. At the same time replace the name of the helpers by the name of the instruction, as the only reason for the previous names was to keep the macros simple. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31softfloat: implement fused multiply-add NaN propagation for MIPSAurelien Jarno1-0/+27
Add a pickNaNMulAdd function for MIPS, implementing NaN propagation rules for MIPS fused multiply-add instructions. Cc: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31target-mips: do not save CPU state when using retranslationAurelien Jarno1-20/+0
When the CPU state after a possible retranslation is going to be handled through code retranslation, we don't need to save the CPU state before. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31target-mips: correctly restore btarget upon exceptionAurelien Jarno1-0/+11
When the CPU state is restored through retranslation after an exception, btarget should also be restored. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31tcg: don't remove op if output needs to be synced to memoryAurelien Jarno1-4/+4
Commit 9c43b68de628a1e2cba556adfb71c17028eb802e do not correctly check for dead outputs when they need to be synced to memory in case of half-dead operations. Fix that by applying the same pattern than for the default case. Tested-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31target-alpha: Use TCG_CALL_NO_WGRichard Henderson1-10/+10
Mark helper functions that raise exceptions, but otherwise do not change TCG register state, with TCG_CALL_NO_WG. Signed-off-by: Richard Henderson <rth@twiddle.net>
2012-10-31chardev: Use timer instead of bottom-half to postpone open eventJan Kiszka3-12/+13
As the block layer may decide to flush bottom-halfs while the machine is still initializing (e.g. to read geometry data from the disk), our postponed open event may be processed before the last frontend registered with a muxed chardev. Until the semantics of BHs have been clarified, use an expired timer to achieve the same effect (suggested by Paolo Bonzini). This requires to perform the alarm timer initialization earlier as otherwise timer subsystem can be used before being ready. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2012-10-31target-mips: remove #if defined(TARGET_MIPS64) in opcode enumsAurelien Jarno1-36/+0
All switch() decoding instruction have a default entry, so it is possible to have unused enum entries. Remove conditional definitions of MIPS64 opcode enums, as it only makes the code less readable. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31target-mips: Change TODO fileJia Liu1-2/+1
Change DSP r1 & DSP r2 into microMIPS DSP encodings in TODO file. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31target-mips: Add ASE DSP testcasesJia Liu487-0/+19151
Add MIPS ASE DSP testcases. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31target-mips: Add ASE DSP processorsJia Liu1-0/+52
Add 74kf and mips64dspr2-generic-cpu model for test. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31target-mips: Add ASE DSP accumulator instructionsJia Liu3-0/+995
Add MIPS ASE DSP Accumulator and DSPControl Access instructions. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31target-mips: Add ASE DSP compare-pick instructionsJia Liu3-0/+635
Add MIPS ASE DSP Compare-Pick instructions. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31target-mips: Add ASE DSP bit/manipulation instructionsJia Liu3-0/+311
Add MIPS ASE DSP Bit/Manipulation instructions. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31target-mips: Add ASE DSP multiply instructionsJia Liu3-0/+1499
Add MIPS ASE DSP Multiply instructions. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31target-mips: Add ASE DSP GPR-based shift instructionsJia Liu3-0/+618
Add MIPS ASE DSP GPR-Based Shift instructions. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31target-mips: Add ASE DSP arithmetic instructionsJia Liu3-3/+1812
Add MIPS ASE DSP Arithmetic instructions. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31target-mips: Add ASE DSP load instructionsJia Liu1-0/+88
Add MIPS ASE DSP Load instructions. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31target-mips: Add ASE DSP branch instructionsJia Liu1-0/+36
Add MIPS ASE DSP Branch instructions. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31Use correct acc value to index cpu_HI/cpu_LO rather than using a fix numberJia Liu1-27/+95
Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31target-mips: Add ASE DSP resources access checkJia Liu4-2/+53
Add MIPS ASE DSP resources access check. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31target-mips: Add ASE DSP internal functionsJia Liu2-1/+1064
Add internal functions using by MIPS ASE DSP instructions. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-30tap-win32: stubs to fix win32 buildMichael S. Tsirkin1-0/+10
Add missing stubs to win32 to fix link failure. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reported-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-30tests/tcg: fix unused result warningsCatalin Patulea2-7/+22
With i386-linux-user target on x86_64 host, this does not introduce any new test failures. Signed-off-by: Catalin Patulea <catalinp@google.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-30configure: use -Wwombat to test whether gcc recognizes -Wno-wombatPeter Maydell1-1/+5
gcc will silently accept unrecognized -Wno-wombat warning suppression options (it only mentions them if it has to print a compiler warning for some other reason). Since we already run a check for whether gcc recognizes the warning options we use, we can easily make this use the positive sense of the option when checking for support for the suppression option. This doesn't have any effect except that it avoids gcc emitting extra messages about unrecognized command line options when it is printing other warning messages. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Igor Mitsyanko <i.mitsyanko@samsung.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-30target-sparc: Revert setting cpu_dst to gen_dest_gprRichard Henderson1-1/+1
There is some read-after-write error within the OP=2 insns which prevents setting cpu_dst to the real output register. Until this is found and fixed, always write to a temporary first. Cc: Blue Swirl <blauwirbel@gmail.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net> Tested-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-30Merge branch 'qspi.2' of git://developer.petalogix.com/public/qemuBlue Swirl3-50/+340
* 'qspi.2' of git://developer.petalogix.com/public/qemu: xilinx_zynq: added QSPI controller xilinx_spips: Generalised to model QSPI m25p80: Support for Quad SPI
2012-10-30Merge branch 's390-for-upstream' of git://repo.or.cz/qemu/agrafAurelien Jarno12-84/+1315
* 's390-for-upstream' of git://repo.or.cz/qemu/agraf: s390: sclp ascii console support s390: sclp signal quiesce support s390: sclp event support s390: sclp base support s390: use sync regs for register transfer s390/kvm_stat: correct sys_perf_event_open syscall number s390x: fix -initrd in virtio machine
2012-10-30tcg/mips: use MUL instead of MULT on MIPS32 and aboveAurelien Jarno1-0/+7
MIPS32 and later instruction sets have a multiplication instruction directly operating on GPRs. It only produces a 32-bit result but it is exactly what is needed by QEMU. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-29memory: fix rendering of a region obscured by anotherAvi Kivity1-6/+6
The memory core drops regions that are hidden by another region (for example, during BAR sizing), but it doesn't do so correctly if the lower address of the existing range is below the lower address of the new range. Example (qemu-system-mips -M malta -kernel vmlinux-2.6.32-5-4kc-malta -append "console=ttyS0" -nographic -vga cirrus): Existing range: 10000000-107fffff New range: 100a0000-100bffff Correct behaviour: drop new range Incorrect behaviour: add new range Fix by taking this case into account (previously we only considered equal lower boundaries). Tested-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-10-29Merge remote-tracking branch 'mst/tags/for_anthony' into stagingAnthony Liguori15-146/+266
virtio,pci infrastructure This includes infrastructure patches that don't do much by themselves but should help vfio and q35 make progress. Also included is rework of virtio-net to use iovec APIs for vector access - helpful to make it more secure and in preparation for a new feature that will allow arbitrary s/g layout for guests. Also included is a pci bridge bugfix by Avi. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> * mst/tags/for_anthony: (25 commits) pci: avoid destroying bridge address space windows in a transaction virtio-net: enable mrg buf header in tap on linux virtio-net: test peer header support at init time virtio-net: minor code simplification virtio-net: simplify rx code virtio-net: switch tx to safe iov functions virtio-net: first s/g is always at start of buf virtio-net: refactor receive_hdr virtio-net: use safe iov operations for rx virtio-net: avoid sg copy iov: add iov_cpy virtio-net: track host/guest header length pcie: Convert PCIExpressHost to use the QOM. pcie: pass pcie window size to pcie_host_mmcfg_update() pci: Add class 0xc05 as 'SMBus' pci: introduce pci_swizzle_map_irq_fn() for standardized interrupt pin swizzle pci_ids: add intel 82801BA pci-to-pci bridge id pci: pci capability must be in PCI space pci: make each capability DWORD aligned qemu: enable PV EOI for qemu 1.3 ... Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-10-29s390: sclp ascii console supportHeinz Graalfs2-1/+307
This code adds console support by implementing SCLP's ASCII Console Data event. This is the same console as LPARs ASCII console or z/VMs sysascii. The console can be specified manually with something like -chardev stdio,id=charconsole0 -device sclpconsole,chardev=charconsole0,id=console0 Newer kernels will autodetect that console and prefer that over virtio console. When data is received from the character layer it creates a service interrupt to trigger a Read Event Data command from the guest that will pick up the received character byte-stream. When characters are echo'ed by the linux guest a Write Event Data occurs which is forwarded by the Event Facility to the console that supports a corresponding mask value. Console resizing is not supported. The character layer byte-stream is buffered using a fixed size iov buffer. Signed-off-by: Heinz Graalfs <graalfs@linux.vnet.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Jens Freimann <jfrei@linux.vnet.ibm.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-29s390: sclp signal quiesce supportHeinz Graalfs3-0/+131
This implements the sclp signal quiesce event via the SCLP Event Facility. This allows to gracefully shutdown a guest by using system_powerdown notifiers. It creates a service interrupt that will trigger a Read Event Data command from the guest. This code will then add an event that is interpreted by linux guests as ctrl-alt-del. Signed-off-by: Heinz Graalfs <graalfs@linux.vnet.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Jens Freimann <jfrei@linux.vnet.ibm.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-29s390: sclp event supportHeinz Graalfs6-2/+579
Several SCLP features are considered to be events. Those events don't provide SCLP commands on their own, instead they are all based on Read Event Data, Write Event Data, Write Event Mask and the service interrupt. Follow-on patches will provide SCLP's Signal Quiesce (via system_powerdown) and the ASCII console. Further down the road the sclp line mode console and configuration change events (e.g. cpu hotplug) can be implemented. Signed-off-by: Heinz Graalfs <graalfs@linux.vnet.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Jens Freimann <jfrei@linux.vnet.ibm.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-29s390: sclp base supportHeinz Graalfs6-60/+198
This adds a more generic infrastructure for handling Service-Call requests on s390. Currently we only support a small subset of Read SCP Info directly in target-s390x. This patch provides the base infrastructure for supporting more commands and moves Read SCP Info. In the future we could add additional commands for hotplug, call home and event handling. Signed-off-by: Heinz Graalfs <graalfs@linux.vnet.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Jens Freimann <jfrei@linux.vnet.ibm.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-29s390: use sync regs for register transferChristian Borntraeger1-20/+92
Newer kernels provide the guest registers in kvm_run. Lets use those if available (i.e. the capability is set). This avoids ioctls on cpu_synchronize_state making intercepts faster. In addition, we have now the prefix register, the access registers the control registers up to date. This helps in certain cases, e.g. for resolving kernel module addresses with gdb on a guest. On return, we update the registers according to the level statement, i.e. we put all registers for KVM_PUT_FULL_STATE and _RESET_STATE. Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Jens Freimann <jfrei@linux.vnet.ibm.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-29s390/kvm_stat: correct sys_perf_event_open syscall numberHeinz Graalfs1-2/+9
Correct sys_perf_event_open syscall number for s390 architecture - the hardcoded syscall number 298 is for x86 but should be different for other architectures. In case we figure out via /proc/cpuinfo that we are running on s390 the appropriate syscall number is used from map syscall_numbers; other architectures can extend this. Signed-off-by: Heinz Graalfs <graalfs@linux.vnet.ibm.com> Signed-off-by: Jens Freimann <jfrei@linux.vnet.ibm.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-29s390x: fix -initrd in virtio machineAlexander Graf1-2/+2
When using -initrd in the virtio machine, we need to indicate the initrd start and size inside the kernel image. These parameters need to be stored in native endianness. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Richard Henderson <rth@twiddle.net> Acked-by: Christian Borntraeger <borntraeger@de.ibm.com>
2012-10-29pci: avoid destroying bridge address space windows in a transactionAvi Kivity2-30/+44
Calling memory_region_destroy() in a transaction is illegal (and aborts), as until the transaction is committed, the region remains live. Fix by moving destruction until after the transaction commits. This requires having an extra set of regions, so the new and old regions can coexist. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-10-29virtio-net: enable mrg buf header in tap on linuxMichael S. Tsirkin2-21/+18
Modern linux supports arbitrary header size, which makes it possible to pass mrg buf header to tap directly without iovec mangling. Use this capability when it is there. This removes the need to deal with it in vhost-net as we do now. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-10-29virtio-net: test peer header support at init timeMichael S. Tsirkin1-9/+14
There's no reason to query header support at random times: at load or feature query. Driver also might not query functions. Cleaner to do it at device init. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-10-29virtio-net: minor code simplificationMichael S. Tsirkin1-3/+1
During packet filtering, we can now use host hdr len to offset incoming buffer unconditionally. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-10-29virtio-net: simplify rx codeMichael S. Tsirkin1-7/+2
Remove code duplication using guest header length that we track. Drop specific layout requirement for rx buffers: things work using generic iovec functions in any case. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-10-29virtio-net: switch tx to safe iov functionsMichael S. Tsirkin1-12/+19
Avoid mangling iovec manually: use safe iov_* functions. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-10-29virtio-net: first s/g is always at start of bufMichael S. Tsirkin1-2/+3
We know offset is 0, assert that. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-10-29virtio-net: refactor receive_hdrMichael S. Tsirkin1-11/+7
Now that we know host hdr length, we don't need to duplicate the logic in receive_hdr: caller can figure out the offset itself. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-10-29virtio-net: use safe iov operations for rxMichael S. Tsirkin1-11/+14
Avoid magling iov manually: use safe iov operations for processing packets incoming to guest. This also removes the requirement for virtio header to fit the first s/g entry exactly. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-10-29virtio-net: avoid sg copyMichael S. Tsirkin1-25/+23
Avoid tweaking iovec during receive. This removes the need to copy the vector. Note: we currently have an evil cast in work_around_broken_dhclient and unfortunately this patch does not fix it - just pushes the evil cast to another place. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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