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2013-10-14hw/vfio: set interrupts using pci irq wrappersMarcel Apfelbaum1-5/+6
pci_set_irq and the other pci irq wrappers use PCI_INTERRUPT_PIN config register to compute device INTx pin to assert/deassert. save INTX pin into the config register before calling pci_set_irq Signed-off-by: Marcel Apfelbaum <marcel.a@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-10-14hw/vmxnet3: set interrupts using pci irq wrappersMarcel Apfelbaum1-2/+11
pci_set_irq uses PCI_INTERRUPT_PIN config register to compute device INTx pin to assert/deassert. An assert is used to ensure that intx received from the quest OS corresponds to PCI_INTERRUPT_PIN. Signed-off-by: Marcel Apfelbaum <marcel.a@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-10-14hw/pci-bridge: set PCI_INTERRUPT_PIN register before shpc initMarcel Apfelbaum1-1/+1
The PCI_INTERRUPT_PIN will be used by shpc init, so was moved before the call to shpc_init. Signed-off-by: Marcel Apfelbaum <marcel.a@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-10-14hw/pci: add pci wrappers for allocating and asserting irqsMarcel Apfelbaum2-4/+45
Interrupt pin is selected and saved into PCI_INTERRUPT_PIN register during device initialization. Devices should not call directly qemu_set_irq and specify the INTx pin on each call. Added pci_* wrappers to replace qemu_set_irq, qemu_irq_raise, qemu_irq_lower and qemu_irq_pulse, setting the irq based on PCI_INTERRUPT_PIN. Added pci_allocate_irq wrapper to be used by devices that still need PCIDevice infrastructure to assert irqs. Renamed a static method which was named already pci_set_irq. Signed-off-by: Marcel Apfelbaum <marcel.a@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-10-14hw/core: Add interface to allocate and free a single IRQMarcel Apfelbaum2-0/+23
qemu_allocate_irq returns a single qemu_irq. The interface allows to specify an interrupt number. qemu_free_irq frees it. Signed-off-by: Marcel Apfelbaum <marcel.a@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-10-14hw/pci: partially handle pci master abortMarcel Apfelbaum2-0/+27
A MemoryRegion with negative priority was created and it spans over all the pci address space. It "intercepts" the accesses to unassigned pci address space and will follow the pci spec: 1. returns -1 on read 2. does nothing on write Note: setting the RECEIVED MASTER ABORT bit in the STATUS register of the device that initiated the transaction will be implemented in another series Signed-off-by: Marcel Apfelbaum <marcel.a@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-10-14docs/memory: Explictly state that MemoryRegion priority is signedMarcel Apfelbaum1-0/+4
When memory regions overlap, priority can be used to specify which of them takes priority. By making the priority values signed rather than unsigned, we make it more convenient to implement a situation where one "background" region should appear only where no other region exists: rather than having to explicitly specify a high priority for all the other regions, we can let them take the default (zero) priority and specify a negative priority for the background region. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Marcel Apfelbaum <marcel.a@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-10-14memory: Change MemoryRegion priorities from unsigned to signedMarcel Apfelbaum4-7/+7
When memory regions overlap, priority can be used to specify which of them takes priority. By making the priority values signed rather than unsigned, we make it more convenient to implement a situation where one "background" region should appear only where no other region exists: rather than having to explicitly specify a high priority for all the other regions, we can let them take the default (zero) priority and specify a negative priority for the background region. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Marcel Apfelbaum <marcel.a@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-09-28smbios: Factor out smbios_maybe_add_str()Markus Armbruster1-36/+25
Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-09-28smbios: Make multiple -smbios type= accumulate sanelyMarkus Armbruster5-65/+94
Currently, -smbios type=T,NAME=VAL,... adds one field (T,NAME) with value VAL to fw_cfg for each unique NAME. If NAME occurs multiple times, the last one's VAL is used (before the QemuOpts conversion, the first one was used). Multiple -smbios can add multiple fields with the same (T, NAME). SeaBIOS reads all of them from fw_cfg, but uses only the first field (T, NAME). The others are ignored. "First one wins, subsequent ones get ignored silently" isn't nice. We commonly let the last option win. Useful, because it lets you -readconfig first, then selectively override with command line options. Clean up -smbios to work the common way. Accumulate the settings, with later ones overwriting earlier ones. Put the result into fw_cfg (no more useless duplicates). Bonus cleanup: qemu_uuid_parse() no longer sets SMBIOS system uuid by side effect. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-09-28smbios: Improve diagnostics for conflicting entriesMarkus Armbruster1-26/+17
We allow either tables or fields for the same type. Makes sense, because SeaBIOS uses fields only when no tables are present. We do this by searching the SMBIOS blob for a previously added table or field. Error messages look like this: qemu-system-x86_64: -smbios type=1,serial=42: SMBIOS type 1 table already defined, cannot add field User needs to know that "table" is defined by -smbios file=..., and "field" by -smbios type=... Instead of searching the blob, record additions of interest, and check that. Simpler, and makes better error messages possible: qemu-system-x86_64: -smbios file=smbios_type_1.bin: Can't mix file= and type= for same type qemu-system-x86_64: -smbios type=1,serial=42,serial=99: This is the conflicting setting Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-09-28smbios: Convert to QemuOptsMarkus Armbruster5-43/+179
So that it can be set in config file for -readconfig. This tightens parsing of -smbios, and makes it more consistent with other options: unknown parameters are rejected, numbers with trailing junk are rejected, when a parameter is given multiple times, last rather than first wins, ... MST: drop one chunk to fix build errors Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-09-28smbios: Normalize smbios_entry_add()'s error handling to exit(1)Markus Armbruster3-9/+7
It exits on all error conditions but one, where it returns -1. Normalize, and return void. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-09-22virtio-net: fix up HMP NIC info string on resetMichael S. Tsirkin1-0/+1
When mac is updated on reset, info string has stale data. Fix it up. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-09-15pci: remove explicit check to 64K ioport sizeHervé Poussineau1-2/+4
This check is useless, as bigger addresses will be ignored when added to 'io' MemoryRegion, which has a size of 64K. However, some architectures don't use the 'io' MemoryRegion, like the alpha and versatile platforms. They create a PCI I/O region bigger than 64K, so let them handle PCI I/O BARs in the higher range. MST: reinstated work-around for BAR sizing. Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-09-15piix4: disable io on resetMichael S. Tsirkin1-0/+1
io base register at 0x40 is cleared on reset, but io is not disabled until some other event happens to call pm_io_space_update. Invoke pm_io_space_update directly to make this consistent. Cc: qemu-stable@nongnu.org Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-09-15piix: use 64 bit window programmed by guestMichael S. Tsirkin1-4/+10
Detect the 64 bit window programmed by firmware and configure properties accordingly. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-09-15q35: use 64 bit window programmed by guestMichael S. Tsirkin1-4/+10
Detect the 64 bit window programmed by firmware and configure properties accordingly. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-09-15pci: add helper to retrieve the 64-bit rangeMichael S. Tsirkin2-0/+51
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-09-15range: add min/max operations on rangesMichael S. Tsirkin1-0/+18
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-09-15range: add Range to typedefsMichael S. Tsirkin2-1/+2
will help simplify header dependencies. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-09-15q35: make pci window address/size match guest cfgMichael S. Tsirkin1-0/+10
For Q35, MMCFG address and size are guest configurable. Update w32 property to make it behave accordingly. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-09-11Merge remote-tracking branch 'pmaydell/tags/pull-target-arm-20130910' into ↵Anthony Liguori27-267/+1988
staging ARM queue: * aarch64 preparation patchset (excluding the defconfigs, so this doesn't actually enable the new targets yet) * minor bugfixes and cleanups * disable "-cpu any" in system emulation mode * fix ARMv7M stack alignment on reset # gpg: Signature made Tue 10 Sep 2013 01:46:11 PM CDT using RSA key ID 14360CDE # gpg: Can't check signature: public key not found # By Alexander Graf (13) and others # Via Peter Maydell * pmaydell/tags/pull-target-arm-20130910: (28 commits) configure: Add handling code for AArch64 targets linux-user: Add AArch64 support linux-user: Allow targets to specify a minimum uname release linux-user: Add AArch64 termbits.h definitions linux-user: Implement cpu_set_tls() and cpu_clone_regs() for AArch64 linux-user: Make sure NWFPE code is 32 bit ARM only linux-user: Add signal handling for AArch64 linux-user: Fix up AArch64 syscall handlers linux-user: Add syscall number definitions for AArch64 linux-user: Add cpu loop for AArch64 linux-user: Don't treat AArch64 cpu names specially target-arm: Add AArch64 gdbstub support target-arm: Add AArch64 translation stub target-arm: Prepare translation for AArch64 code target-arm: Disable 32 bit CPUs in 64 bit linux-user builds target-arm: Add new AArch64CPUInfo base class and subclasses target-arm: Pass DisasContext* to gen_set_pc_im() target-arm: Fix target_ulong/uint32_t confusions target-arm: Export cpu_env target-arm: Extract the disas struct to a header file ... Message-id: 1378839142-7726-1-git-send-email-peter.maydell@linaro.org Signed-off-by: Anthony Liguori <anthony@codemonkey.ws>
2013-09-11Merge remote-tracking branch 'luiz/queue/qmp' into stagingAnthony Liguori1-1/+4
# By Cole Robinson # Via Luiz Capitulino * luiz/queue/qmp: qapi-types.py: Fix enum struct sizes on i686 Message-id: 1378822364-13887-1-git-send-email-lcapitulino@redhat.com Signed-off-by: Anthony Liguori <anthony@codemonkey.ws>
2013-09-11Merge remote-tracking branch 'spice/spice.v73' into stagingAnthony Liguori4-22/+28
# By Gerd Hoffmann (2) and Christophe Fergeau (1) # Via Gerd Hoffmann * spice/spice.v73: qxl: fix local renderer qxl: trace io port name spice-core: Use g_strdup_printf instead of snprintf Message-id: 1378807572-27902-1-git-send-email-kraxel@redhat.com Signed-off-by: Anthony Liguori <anthony@codemonkey.ws>
2013-09-11Merge remote-tracking branch 'kraxel/usb.89' into stagingAnthony Liguori10-89/+95
# By Gerd Hoffmann (2) and Miroslav Rezanina (2) # Via Gerd Hoffmann * kraxel/usb.89: ehci: save device pointer in EHCIState Remove dev-bluetooth.c dependency from vl.c Preparation for usb-bt-dongle conditional build usb: sanity check setup_index+setup_len in post_load Message-id: 1378806073-25197-1-git-send-email-kraxel@redhat.com Signed-off-by: Anthony Liguori <anthony@codemonkey.ws>
2013-09-11Merge remote-tracking branch 'mdroth/qga-pull-2013-9-9' into stagingAnthony Liguori28-30/+2257
# By Tomoki Sekiyama (10) and Paul Burton (1) # Via Michael Roth * mdroth/qga-pull-2013-9-9: QMP/qemu-ga-client: Make timeout longer for guest-fsfreeze-freeze command qemu-ga: Install Windows VSS provider on `qemu-ga -s install' qemu-ga: Call Windows VSS requester in fsfreeze command handler qemu-ga: Add Windows VSS provider and requester as DLL error: Add error_set_win32 and error_setg_win32 qemu-ga: Add configure options to specify path to Windows/VSS SDK Add a script to extract VSS SDK headers on POSIX system checkpatch.pl: Check .cpp files Add c++ keywords to QAPI helper script configure: Support configuring C++ compiler mips_malta: support up to 2GiB RAM Message-id: 1378755701-2051-1-git-send-email-mdroth@linux.vnet.ibm.com Signed-off-by: Anthony Liguori <anthony@codemonkey.ws>
2013-09-11Merge remote-tracking branch 'sstabellini/xen-2013-09-09' into stagingAnthony Liguori5-8/+12
# By Anthony PERARD # Via Stefano Stabellini * sstabellini/xen-2013-09-09: pc_q35: Initialize Xen. pc: Initializing ram_memory under Xen. Message-id: alpine.DEB.2.02.1309091718030.6397@kaball.uk.xensource.com Signed-off-by: Anthony Liguori <anthony@codemonkey.ws>
2013-09-11Merge remote-tracking branch 'stefanha/block' into stagingAnthony Liguori57-1089/+3407
# By Paolo Bonzini (21) and others # Via Stefan Hajnoczi * stefanha/block: (42 commits) qemu-iotests: Fixed test case 026 qemu-iotests: Whitespace cleanup dataplane: Fix startup race. block: look for zero blocks in bs->file block: add default get_block_status implementation for protocols raw-posix: report unwritten extents as zero raw-posix: return get_block_status data and flags docs, qapi: document qemu-img map qemu-img: add a "map" subcommand block: return BDRV_BLOCK_ZERO past end of backing file block: use bdrv_has_zero_init to return BDRV_BLOCK_ZERO block: return get_block_status data and flags for formats block: define get_block_status return value block: introduce bdrv_get_block_status API block: make bdrv_has_zero_init return false for copy-on-write-images qemu-img: always probe the input image for allocated sectors block: expect errors from bdrv_co_is_allocated block: remove bdrv_is_allocated_above/bdrv_co_is_allocated_above distinction block: do not use ->total_sectors in bdrv_co_is_allocated block: make bdrv_co_is_allocated static ... Message-id: 1378481953-23099-1-git-send-email-stefanha@redhat.com Signed-off-by: Anthony Liguori <anthony@codemonkey.ws>
2013-09-11Merge remote-tracking branch 'stefanha/net' into stagingAnthony Liguori10-29/+174
# By Brad Smith (2) and others # Via Stefan Hajnoczi * stefanha/net: ne2000: mark I/O as LITTLE_ENDIAN vmxnet3: Eliminate __packed redefined warning e1000: add interrupt mitigation support net: Rename send_queue to incoming_queue tap: Use numbered tap/tun devices on all *BSD OS's Message-id: 1378481624-20964-1-git-send-email-stefanha@redhat.com Signed-off-by: Anthony Liguori <anthony@codemonkey.ws>
2013-09-10configure: Add handling code for AArch64 targetsAlexander Graf1-1/+6
Add the necessary code to configure to handle AArch64 as a target CPU (we already have some code for supporting it as host). Note that this doesn't enable the AArch64 targets yet. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: John Rigby <john.rigby@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1378235544-22290-23-git-send-email-peter.maydell@linaro.org Message-id: 1368505980-17151-12-git-send-email-john.rigby@linaro.org [PMM: * don't need to set TARGET_ABI_DIR to aarch64 as that is the default * don't build nwfpe -- this is 32 bit legacy only * rewrite commit message * add aarch64 to the list of "fdt required" targets ] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-09-10linux-user: Add AArch64 supportAlexander Graf3-2/+38
This patch adds support for AArch64 in all the small corners of linux-user (primarily in image loading and startup code). Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: John Rigby <john.rigby@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1378235544-22290-22-git-send-email-peter.maydell@linaro.org Message-id: 1368505980-17151-11-git-send-email-john.rigby@linaro.org [PMM: * removed some unnecessary #defines from syscall.h * catch attempts to use a 32 bit only cpu with aarch64-linux-user * termios stuff moved into its own patch * we specify our minimum uname version here now ] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-09-10linux-user: Allow targets to specify a minimum uname releasePeter Maydell3-14/+51
For newer target architectures, glibc can be picky about the kernel version: for example, it will not run on an aarch64 system unless the kernel reports itself as at least 3.8.0. Accommodate this by enhancing the existing support for faking the kernel version so that each target can optionally specify a minimum version: if the user doesn't force a specific fake version then we will override with the minimum required version only if the real host kernel version is insufficient. Use this facility to let aarch64 report a minimum of 3.8.0. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1378235544-22290-21-git-send-email-peter.maydell@linaro.org
2013-09-10linux-user: Add AArch64 termbits.h definitionsAlexander Graf1-0/+220
Add the AArch64 termbits.h with all the target's termios related constants and structures. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: John Rigby <john.rigby@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1378235544-22290-20-git-send-email-peter.maydell@linaro.org [PMM: split out from another patch] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-09-10linux-user: Implement cpu_set_tls() and cpu_clone_regs() for AArch64Alexander Graf1-0/+35
Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: John Rigby <john.rigby@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1378235544-22290-19-git-send-email-peter.maydell@linaro.org [PMM: pulled out from another patch; don't use is_a64() here; moved to linux-user from target-arm] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-09-10linux-user: Make sure NWFPE code is 32 bit ARM onlyPeter Maydell1-1/+3
On ARM, linux-user emulation includes NWFPE support for emulating the ancient FPA floating point coprocessor. This has long since been superseded by VFP and is only required for legacy binaries. The AArch64 linux-user target doesn't compile in NWFPE support, so make sure the relevant code is protected by suitable ifdefs. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1378235544-22290-18-git-send-email-peter.maydell@linaro.org
2013-09-10linux-user: Add signal handling for AArch64Andreas Schwab2-0/+289
This patch adds signal handling for AArch64. The code is based on the respective source in the Linux kernel. Signed-off-by: Andreas Schwab <schwab@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: John Rigby <john.rigby@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1378235544-22290-17-git-send-email-peter.maydell@linaro.org Message-id: 1368505980-17151-10-git-send-email-john.rigby@linaro.org [PMM: fixed style nits: tabs, long lines; pulled target_signal.h in from a later patch; it fits better here] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-09-10linux-user: Fix up AArch64 syscall handlersAlexander Graf2-4/+29
Some syscall handlers have special code for ARM enabled that we don't need on AArch64. Exclude AArch64 in those cases. In other places we can share struct definitions with other targets or have to provide our own. With this patch applied, most syscall definitions in linux-user should be sound for AArch64. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: John Rigby <john.rigby@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1378235544-22290-16-git-send-email-peter.maydell@linaro.org Message-id: 1368505980-17151-9-git-send-email-john.rigby@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-09-10linux-user: Add syscall number definitions for AArch64Alexander Graf1-0/+323
The AArch64 syscall definitions are all publicly available in the Linux kernel. Let's add them to our linux-user emulation target, so that we can easily handle AArch64 syscalls. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: John Rigby <john.rigby@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1378235544-22290-15-git-send-email-peter.maydell@linaro.org Message-id: 1368505980-17151-8-git-send-email-john.rigby@linaro.org [PMM: changes relating to cpu_loop() removed as they are superseded by an earlier patch] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-09-10linux-user: Add cpu loop for AArch64Peter Maydell1-0/+82
Add the main linux-user cpu loop for AArch64. Since AArch64 has a different system call interface, doesn't need to worry about FPA emulation and may in the future keep the prefetch/data abort information in different system registers, it's simplest just to use a completely separate loop from the 32 bit ARM target, rather than peppering it with ifdefs. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1378235544-22290-14-git-send-email-peter.maydell@linaro.org
2013-09-10linux-user: Don't treat AArch64 cpu names speciallyAlexander Graf1-1/+2
32-bit ARM has a lot of different names for different types of CPUs it supports. On AArch64, we don't have this, so we really don't want to execute the 32-bit logic. Stub it out for AArch64 linux-user guests. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: John Rigby <john.rigby@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1378235544-22290-13-git-send-email-peter.maydell@linaro.org Message-id: 1368505980-17151-7-git-send-email-john.rigby@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-09-10target-arm: Add AArch64 gdbstub supportAlexander Graf5-1/+126
We want to be able to debug AArch64 guests. So let's add the respective gdb stub functions and xml descriptions that allow us to do so. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: John Rigby <john.rigby@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1378235544-22290-12-git-send-email-peter.maydell@linaro.org Message-id: 1368505980-17151-6-git-send-email-john.rigby@linaro.org [PMM: dropped unused fp regs XML for now; moved 64 bit only functions to new gdbstub64.c; these are hooked up in AArch64CPU, not via ifdefs in ARMCPU] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-09-10target-arm: Add AArch64 translation stubAlexander Graf6-4/+178
We should translate AArch64 mode separately from AArch32 mode. In AArch64 mode, registers look vastly different, instruction encoding is completely different, basically the system turns into a different machine. So let's do a simple if() in translate.c to decide whether we can handle the current code in the legacy AArch32 code or in the new AArch64 code. So far, the translation always complains about unallocated instructions. There is no emulator functionality in this patch! Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: John Rigby <john.rigby@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1378235544-22290-11-git-send-email-peter.maydell@linaro.org Message-id: 1368505980-17151-5-git-send-email-john.rigby@linaro.org [PMM: * provide no-op versions of a64 functions ifndef TARGET_AARCH64; this lets us avoid #ifdefs in translate.c * insert the missing call to disas_a64_insn() * stash the insn in the DisasContext rather than reloading it in real_unallocated_encoding() ] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-09-10target-arm: Prepare translation for AArch64 codeAlexander Graf5-38/+151
This patch adds all the prerequisites for AArch64 support that didn't fit into split up patches. It extends important bits in the core cpu headers to also take AArch64 mode into account. Add new ARM_TBFLAG_AARCH64_STATE translation buffer flag indicate an ARMv8 cpu running in aarch64 mode vs aarch32 mode. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: John Rigby <john.rigby@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1378235544-22290-10-git-send-email-peter.maydell@linaro.org Message-id: 1368505980-17151-4-git-send-email-john.rigby@linaro.org [PMM: * rearranged tbflags so AArch64? is bit 31 and if it is set then 30..0 are freely available for whatever makes most sense for that mode * added version bump since we change VFP migration state * added a comment about how VFP/Neon register state works * physical address space is 48 bits, not 64 * added ARM_FEATURE_AARCH64 flag to identify 64-bit capable CPUs ] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-09-10target-arm: Disable 32 bit CPUs in 64 bit linux-user buildsPeter Maydell1-2/+7
If we're building aarch64-linux-user then the 32 bit CPUs are all unwanted, because they can't possibly execute the 64 bit binaries we will be running; disable them. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1378235544-22290-9-git-send-email-peter.maydell@linaro.org
2013-09-10target-arm: Add new AArch64CPUInfo base class and subclassesPeter Maydell3-0/+124
Create a new AArch64CPU class; all 64-bit capable ARM CPUs are subclasses of this. (Currently we only support one, the "any" CPU used by linux-user.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1378235544-22290-8-git-send-email-peter.maydell@linaro.org
2013-09-10target-arm: Pass DisasContext* to gen_set_pc_im()Peter Maydell1-13/+13
We want gen_set_pc_im() to work for both AArch64 and AArch32, but to do this we'll need the DisasContext* so we can tell which mode we're in, so pass it in as a parameter. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1378235544-22290-7-git-send-email-peter.maydell@linaro.org
2013-09-10target-arm: Fix target_ulong/uint32_t confusionsAlexander Graf2-6/+7
Correct a few places that were using uint32_t or a 32 bit only format string to handle something that should be a target_ulong. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: John Rigby <john.rigby@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1378235544-22290-6-git-send-email-peter.maydell@linaro.org [PMM: split out to separate patch; added gen_goto_tb() and gen_set_pc_im() dest params to list of things to change.] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-09-10target-arm: Export cpu_envAlexander Graf2-1/+3
The cpu_env tcg variable will be used by both the AArch32 and AArch64 handling code. Unstaticify it, so that both sides can make use of it. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: John Rigby <john.rigby@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1378235544-22290-5-git-send-email-peter.maydell@linaro.org Message-id: 1368505980-17151-3-git-send-email-john.rigby@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-09-10target-arm: Extract the disas struct to a header fileAlexander Graf2-23/+28
We will need to share the disassembly status struct between AArch32 and AArch64 modes. So put it into a header file that both sides can use. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: John Rigby <john.rigby@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1378235544-22290-4-git-send-email-peter.maydell@linaro.org Message-id: 1368505980-17151-2-git-send-email-john.rigby@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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