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2012-09-21tcg-sparc: Preserve branch destinations during retranslationRichard Henderson1-8/+11
Signed-off-by: Richard Henderson <rth@twiddle.net>
2012-09-21tcg-sparc: Fix and enable direct TB chaining.Richard Henderson2-6/+24
Signed-off-by: Richard Henderson <rth@twiddle.net>
2012-09-21tcg-sparc: Add %g/%o registers to alloc_orderRichard Henderson1-0/+13
Signed-off-by: Richard Henderson <rth@twiddle.net>
2012-09-21tcg-sparc: Use defines for temporaries.Richard Henderson1-56/+59
And change from %i4/%i5 to %g1/%o7 to remove a v8plus fixme. Signed-off-by: Richard Henderson <rth@twiddle.net>
2012-09-21tcg-sparc: Mask shift immediates to avoid illegal insns.Richard Henderson1-6/+12
The xtensa-test image generates a sra_i32 with count 0x40. Whether this is accident of tcg constant propagation or originating directly from the instruction stream is immaterial. Signed-off-by: Richard Henderson <rth@twiddle.net>
2012-09-21tcg-sparc: Clean up cruft stemming from attempts to use global registers.Richard Henderson3-59/+26
Don't use -ffixed-gN. Don't link statically. Don't save/restore AREG0 around calls. Don't allocate space on the stack for AREG0 save. Signed-off-by: Richard Henderson <rth@twiddle.net>
2012-09-21tcg-sparc: Change AREG0 in generated code to %i0.Richard Henderson2-8/+3
We can now move the TCG variable from %g[56] to a call-preserved windowed register. Signed-off-by: Richard Henderson <rth@twiddle.net>
2012-09-21tcg-sparc: Support GUEST_BASE.Richard Henderson3-3/+27
Signed-off-by: Richard Henderson <rth@twiddle.net>
2012-09-21tcg-sparc: Fix qemu_ld/st to handle 32-bit host.Richard Henderson1-429/+348
At the same time, split out the tlb load logic to a new function. Fixes the cases of two data registers and two address registers. Fixes the signature of, and adds missing, qemu_ld/st opcodes. Signed-off-by: Richard Henderson <rth@twiddle.net>
2012-09-21tcg-sparc: Assume v9 cpu always, i.e. force v8plus in 32-bit mode.Richard Henderson7-63/+23
Current code doesn't actually work in 32-bit mode at all. Since no one really noticed, drop the complication of v7 and v8 cpus. Eliminate the --sparc_cpu configure option and standardize macro testing on TCG_TARGET_REG_BITS / HOST_LONG_BITS Signed-off-by: Richard Henderson <rth@twiddle.net>
2012-09-21tcg-sparc: Don't MAP_FIXED on top of the programRichard Henderson1-4/+2
The address we pick in sparc64.ld is also 0x60000000, so doing a fixed map on top of that is guaranteed to blow up. Choosing 0x40000000 is exactly right for the max of code_gen_buffer_size set below. No need to ever use MAP_FIXED. While getting our desired address helps optimize the generated code, we won't fail if we don't get it. Signed-off-by: Richard Henderson <rth@twiddle.net>
2012-09-21tcg-sparc: Fix ADDX opcode.Richard Henderson1-1/+1
Signed-off-by: Richard Henderson <rth@twiddle.net>
2012-09-21tcg-sparc: Hack in qemu_ld/st64 for 32-bit.Richard Henderson1-0/+3
Not actually implemented, but at least we avoid the tcg assert at startup. Signed-off-by: Richard Henderson <rth@twiddle.net>
2012-09-21linux-user: Use memcpy in get_user/put_user.Richard Henderson1-32/+15
When host and target have differing alignment rules, using a cast and direct memory operation can result in SIGBUS. Use memcpy instead, which the compiler will happily optimize when alignment is satisfied. Signed-off-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2012-09-21Merge branch 'usb.65' of git://git.kraxel.org/qemuAurelien Jarno6-138/+625
* 'usb.65' of git://git.kraxel.org/qemu: uhci: Don't queue up packets after one with the SPD flag set usb-redir: Revert usb-redir part of commit 93bfef4c usb-redir: Add chardev open / close debug logging usb-redir: Add support for migration usb-redir: Store max_packet_size in endp_data usb-redir: Add an already_in_flight packet-id queue usb-redir: Change cancelled packet code into a generic packet-id queue ehci: Walk async schedule before and after migration ehci: Don't set seen to 0 when removing unseen queue-heads configure: usbredir fixes ehci: Don't process too much frames in 1 timer tick (v2) ehci: Fix interrupts stopping when Interrupt Threshold Control is 8 ehci: switch to new-style memory ops usb-host: allow emulated (non-async) control requests without USBPacket
2012-09-21tcg-hppa: Fix broken load/store helpersRichard Henderson1-62/+74
The CONFIG_TCG_PASS_AREG0 code for calling ld/st helpers was not respecting the ABI requirement for 64-bit values being aligned in registers. Mirror the ARM port in use of helper functions to marshal arguments into the correct registers. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-21tcg-hppa: Fix brcond2 and setcond2Richard Henderson1-9/+42
Neither of these functions were performing double-word compares properly. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-21tcg: Fix !USE_DIRECT_JUMPRichard Henderson1-1/+1
Commit 6375e09e changed the type of TranslationBlock.tb_next, but failed to change the type of TCGContext.tb_next. Signed-off-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-21gdbstub/sh4: fix build with USE_SOFTFLOAT_STRUCT_TYPESAurelien Jarno1-54/+90
We have to use different type to access float values when USE_SOFTFLOAT_STRUCT_TYPES is defined. Rework SH4 version of cpu_gdb_{read,write}_register() using a single case, and fixing the coding style. Use ldll_p() and stfl_p() to access float values. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-21tcg: Optimize two-address commutative operationsRichard Henderson1-1/+14
While swapping constants to the second operand, swap sources matching destinations to the first operand. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-21tcg: Optimize movcond for constant comparisonsRichard Henderson1-0/+40
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-21tcg-i386: Implement movcondRichard Henderson2-1/+35
Signed-off-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-21target-alpha: Use movcondRichard Henderson1-54/+48
For proper cmov insns, as well as the non-goto-tb case of conditional branch. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-21tcg: Introduce movcondRichard Henderson15-6/+70
Implemented with setcond if the target does not provide the optional opcode. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-21target-sh4: remove useless codeAurelien Jarno1-4/+0
Almost dead code. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-21target-sh4: cleanup DisasContextAurelien Jarno1-30/+26
We should avoid accessing env at translation stage, except of course for static values like the supported features. Remove variables copied from env in DisasContext and use the TB flags instead. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-21target-sh4: rework exceptions handlingAurelien Jarno3-30/+32
Since commit fd4bab102 PC is restored in case of exception through code retranslation. While it is clearly the thing to do in case it is not not known if an helper is going to trigger an exception or not (e.g. for load/store, FPU, etc.), it just make things slower when the exception is already known at translation time. Partially revert this commit and save PC in the TCG code. Set bstate to BS_BRANCH to not generate TCG exit code. Micro-optimize the sleep helper. Make all the exception helpers to call raise_exception and mark it as noreturn. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-21target-sh4: remove gen_clr_t() and gen_set_t()Aurelien Jarno1-13/+3
gen_clr_t() and gen_set_t() have very few callers and can be remplaced by a single line. Remove them. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-21target-sh4: optimize swap.wAurelien Jarno1-11/+1
It's possible swap the two 16-bit words of a 32-bit register using a rotation. If the TCG target doesn't implement rotation, the replacement code is similar to the previously implemented code. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-21target-sh4: optimize xtrctAurelien Jarno1-1/+0
The register being 32 bit long, after a shift to the right by 16 bits, the upper 16 bit are already cleared. There is no need to call ext16u to clear them. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-21target-sh4: implement addv and subv using TCGAurelien Jarno3-62/+34
addv and subv helpers implementation is directly copied from the SH4 manual and looks quite complex. It is however possible to explain it without branches, and is therefore possible to implement it with TCG. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-21target-sh4: implement addc and subc using TCGAurelien Jarno3-36/+36
Now that setcond is available, the addc and subc can easily be implemented using TCG. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-21target-sh4: use float32_muladd() to implement fmacAurelien Jarno1-2/+1
There is no need to add a SH4 specific pickNaNMulAdd() to softfloat as SH4 is always returning a default NaN. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-21target-sh4: mark a few helpers const and pureAurelien Jarno1-3/+3
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-21target-xtensa: don't emit extra tcg_gen_goto_tbMax Filippov1-1/+3
Unconditional gen_check_loop_end at the end of disas_xtensa_insn can emit tcg_gen_goto_tb with slot id already used in the TB (e.g. when TB ends at LEND with a branch). Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Cc: qemu-stable <qemu-stable@nongnu.org> Signed-off-by: malc <av1474@comtv.ru>
2012-09-21target-xtensa: fix extui shift amountMax Filippov1-3/+21
extui opcode only uses lowermost op1 bit for sa4. Reported-by: malc <av1474@comtv.ru> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Cc: qemu-stable <qemu-stable@nongnu.org> Signed-off-by: malc <av1474@comtv.ru>
2012-09-19tcg/optimize: fix end of basic block detectionAurelien Jarno1-13/+9
Commit e31b0a7c050711884ad570fe73df806520953618 fixed copy propagation on 32-bit host by restricting the copy between different types. This was the wrong fix. The real problem is that the all temps states should be reset at the end of a basic block. This was done by adding such operations in the switch, but brcond2 was forgotten (that's why the crash was only observed on 32-bit hosts). Fix that by looking at the TCG_OPF_BB_END instead. We need to keep the case for op_set_label as temps might be modified through another path. Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-19target-mips: Implement Loongson Multimedia InstructionsRichard Henderson4-4/+1180
Implements all of the COP2 instructions except for the S<cond> family of comparisons. The documentation is unclear for those. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-19target-mips: Always evaluate debugging macro argumentsRichard Henderson1-14/+17
this will prevent some of the compilation errors with debugging enabled from creeping back in. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-19target-mips: Fix MIPS_DEBUG.Richard Henderson1-36/+38
The macro uses the DisasContext. Pass it around as needed. Signed-off-by: Richard Henderson <rth@twiddle.net> Acked-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-19target-mips: Set opn in gen_ldst_multiple.Richard Henderson1-0/+6
Used by MIPS_DEBUG, when enabled. Signed-off-by: Richard Henderson <rth@twiddle.net> Acked-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-19hw/pflash_cfi0[12]: Use host-utils.h ctz32()Peter Maydell2-72/+2
Drop the private reimplementation of ctz32() from pflash_cfi0[12] in favour of using the standard version from host-utils.h. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-19pflash_cfi01: fix vendor specific extended queryAurelien Jarno1-1/+3
pflash_cfi01 announces a version number of 1.1, which implies "Protection Register Information" and "Burst Read information" sections, which are not provided. Decrease the version number to 1.0 so that only the "Protection Register Information" section is needed. Set the number of protection fields (0x3f) to 0x01, as 0x00 means 256 protections field, which makes the CFI table bigger than the current implementation, causing some kernels to fail to read it. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-19revert "TCG: fix copy propagation"Aurelien Jarno2-14/+6
Given the copy propagation breakage on 32-bit hosts has been fixed commit e31b0a7c050711884ad570fe73df806520953618 can be reverted. Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-19tcg: mark set_label with TCG_OPF_BB_END flagAurelien Jarno2-6/+1
set_label is effectively the end of a basic block, as no optimization can be made accross it. It was treated as such in the liveness analysis code, but as a special case. Mark it with TCG_OPF_BB_END flag so that this information can be used by other parts of the TCG code, and remove the special case in the liveness analysis code. Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-19tcg/i386: allow constants in load/store opsAurelien Jarno1-13/+37
On x86, it is possible to move a constant value to memory. Add code to handle a constant argument to load/store ops. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-19xilinx_timer: Fix a compile error if debug enabledChris Wulff1-1/+2
There was a missing include of qemu-log and a variable name in a printf was out of date. Signed-off-by: Chris Wulff <crwulff@gmail.com> Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
2012-09-19xilinx: fix names of ethernet and dma links.Peter A. G. Crosthwaite1-2/+4
These names were incorrect. Fixed to match to actual link names Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
2012-09-19xilinx.h: Error check when setting linksPeter A. G. Crosthwaite1-2/+8
Assert that the ethernet and dma controller are sucessfully linked to their peers. Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
2012-09-19xilinx_timer: Fixed "frequency" prop namePeter A. G. Crosthwaite2-2/+3
The "frequency" qdev prop matches the "clock-frequency" property in Xilinx EDK. Renamed "frequency" -> "clock-frequency" accordingly. Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
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