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AgeCommit message (Expand)AuthorFilesLines
2018-05-07vl: allow 'maxmem' without 'slot'David Hildenbrand1-15/+4
2018-05-07spapr: rename "hotplug memory" terminology to "device memory"David Hildenbrand2-15/+15
2018-05-07pc: rename "hotplug memory" terminology to "device memory"David Hildenbrand3-15/+14
2018-05-07machine: rename MemoryHotplugState to DeviceMemoryStateDavid Hildenbrand3-10/+9
2018-05-07pc-dimm: move actual plug/unplug of a memory region to MemoryDeviceDavid Hildenbrand3-3/+23
2018-05-07pc-dimm: factor out capacity and slot checks into MemoryDeviceDavid Hildenbrand3-61/+51
2018-05-07pc-dimm: factor out address search into MemoryDevice codeDavid Hildenbrand4-112/+91
2018-05-07pc-dimm: pass in the machine and to the MemoryHotplugStateDavid Hildenbrand4-11/+11
2018-05-07pc-dimm: no need to pass the memory regionDavid Hildenbrand4-23/+16
2018-05-07machine: make MemoryHotplugState accessible via the machineDavid Hildenbrand9-50/+60
2018-05-07pc-dimm: factor out MemoryDevice interfaceDavid Hildenbrand12-66/+242
2018-05-07qxl: fix local renderer crashGerd Hoffmann1-1/+2
2018-05-07usb-host: skip open on pending postload bhGerd Hoffmann1-0/+7
2018-05-07usb-mtp: Unconditionally check for the readonly bitBandan Das1-4/+5
2018-05-07usb-mtp: Add some NULL checks for issues pointed out by coverityBandan Das1-3/+3
2018-05-06RISC-V: Mark ROM read-only after copying in codeMichael Clark4-82/+101
2018-05-06RISC-V: No traps on writes to misa,minstret,mcycleMichael Clark1-12/+13
2018-05-06RISC-V: Make mtvec/stvec ignore vectored trapsMichael Clark1-6/+8
2018-05-06RISC-V: Add mcycle/minstret support for -icount autoMichael Clark2-2/+28
2018-05-06RISC-V: Use [ms]counteren CSRs when priv ISA >= v1.10Michael Clark2-18/+50
2018-05-06RISC-V: Allow S-mode mxr access when priv ISA >= v1.10Michael Clark1-2/+5
2018-05-06RISC-V: Clear mtval/stval on exceptions without infoMichael Clark1-0/+8
2018-05-06RISC-V: Hardwire satp to 0 for no-mmu caseMichael Clark1-2/+5
2018-05-06RISC-V: Update E and I extension orderMichael Clark2-1/+2
2018-05-06RISC-V: Remove erroneous comment from translate.cMichael Clark1-1/+0
2018-05-06RISC-V: Remove EM_RISCV ELF_MACHINE indirectionMichael Clark5-5/+4
2018-05-06RISC-V: Make virt header comment title consistentMichael Clark1-1/+1
2018-05-06RISC-V: Make some header guards more specificMichael Clark2-4/+4
2018-05-06RISC-V: Fix missing break statement in disassemblerMichael Clark1-1/+2
2018-05-06RISC-V: Include instruction hex in disassemblyMichael Clark1-19/+20
2018-05-06RISC-V: Remove unused class definitionsMichael Clark9-123/+0
2018-05-06RISC-V: Remove identity_translate from load_elfMichael Clark4-24/+4
2018-05-06RISC-V: Use ROM base address and size from memmapMichael Clark2-4/+2
2018-05-06RISC-V: Make virt board description match spikeMichael Clark1-1/+1
2018-05-06RISC-V: Replace hardcoded constants with enum valuesMichael Clark8-12/+31
2018-05-04Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20180504-...Peter Maydell25-67/+2868
2018-05-04hw/arm/virt: Introduce the iommu optionEric Auger1-0/+36
2018-05-04hw/arm/virt-acpi-build: Add smmuv3 node in IORT tablePrem Mallappa2-7/+63
2018-05-04hw/arm/virt: Add SMMUv3 to the virt boardPrem Mallappa2-1/+73
2018-05-04target/arm/kvm: Translate the MSI doorbell in kvm_arch_fixup_msi_routeEric Auger2-1/+40
2018-05-04hw/arm/smmuv3: Abort on vfio or vhost caseEric Auger1-0/+11
2018-05-04hw/arm/smmuv3: Implement translate callbackEric Auger3-0/+527
2018-05-04hw/arm/smmuv3: Event queue recording helperEric Auger3-6/+247
2018-05-04hw/arm/smmuv3: Implement MMIO write operationsEric Auger3-10/+174
2018-05-04hw/arm/smmuv3: Queue helpersEric Auger3-0/+304
2018-05-04hw/arm/smmuv3: Wired IRQ and GERROR helpersEric Auger3-0/+81
2018-05-04hw/arm/smmuv3: SkeletonPrem Mallappa5-1/+599
2018-05-04hw/arm/smmu-common: VMSAv8-64 page table walkEric Auger4-1/+343
2018-05-04hw/arm/smmu-common: IOMMU memory region and address space setupEric Auger3-0/+80
2018-05-04hw/arm/smmu-common: smmu base device and datatypesEric Auger4-0/+206
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