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2015-06-17s390/ioinst: fix endianness in ioinst_schib_validAlexander Graf1-3/+3
The ioinst_schib_valid gets a SCHIB in guest endianness, we should byteswap the fields we access. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Alexander Graf <agraf@suse.de>
2015-06-17s390/ioinst: fix IO_INT_WORD_ISC macroAurelien Jarno1-1/+1
The I/O-Interruption Subclass field corresponds to bits 2 to 5 (BE notation) of the Interruption-Identification Word. The value should be shift by 27 instead of 24. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2015-06-17Merge remote-tracking branch 'remotes/kvaneesh/tags/for-upstream-signed' ↵Peter Maydell1-1/+7
into staging VirtFS update: * Fix for virtfs-proxy-helper crash * Gracefully handle the error condition on input validation in virtfs-proxy-helper # gpg: Signature made Tue Jun 16 16:21:28 2015 BST using RSA key ID 04C4E23A # gpg: Good signature from "Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>" # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 4846 9DE7 1860 360F A6E9 968C DE41 A4FE 04C4 E23A * remotes/kvaneesh/tags/for-upstream-signed: virtfs-proxy-helper: fail gracefully if socket path is too long virtfs-proxy-helper: add missing long option terminator Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-16virtfs-proxy-helper: fail gracefully if socket path is too longStefan Hajnoczi1-1/+6
Replace the assertion check with graceful failure when the socket path is too long. Programs should not crash on invalid input. Print an error message and exit properly. Cc: Shannon Zhao <zhaoshenglong@huawei.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
2015-06-16virtfs-proxy-helper: add missing long option terminatorStefan Hajnoczi1-0/+1
The getopt_long(3) long options array must have a zeroed terminator. This patch solves a segmentation fault when an unknown command-line option is encountered: $ fsdev/virtfs-proxy-helper --help Segmentation fault (core dumped) Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
2015-06-16Merge remote-tracking branch 'remotes/kraxel/tags/pull-vga-20150615-1' into ↵Peter Maydell16-9/+301
staging virtio-gpu: pci support bits and virtio-vga. # gpg: Signature made Mon Jun 15 13:55:19 2015 BST using RSA key ID D3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" * remotes/kraxel/tags/pull-vga-20150615-1: virtio-vga: add vgabios configuration virtio-vga: add '-vga virtio' support virtio-vga: add virtio gpu device with vga compatibility virtio-gpu-pci: add virtio pci support virtio-gpu: fix error message Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-16Merge remote-tracking branch 'remotes/riku/tags/pull-linux-user-20150616' ↵Peter Maydell5-33/+102
into staging linux-user patches for 2.4 softfreeze second spin with ioctl patch refreshed # gpg: Signature made Tue Jun 16 08:03:14 2015 BST using RSA key ID DE3C9BC0 # gpg: Good signature from "Riku Voipio <riku.voipio@iki.fi>" # gpg: aka "Riku Voipio <riku.voipio@linaro.org>" * remotes/riku/tags/pull-linux-user-20150616: linux-user: ioctl() command type is int linux-user: fix the breakpoint inheritance in spawned threads linux-user: use __get_user and __put_user in cmsg conversions linux-user: Fix length handling in host_to_target_cmsg linux-user: Use abi_ulong for TARGET_ELF_PAGESTART linux-user: Allocate thunk size dynamically Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-16linux-user: ioctl() command type is intLaurent Vivier1-8/+8
When executing a 64bit target chroot on 64bit host, the ioctl() command can mismatch. It seems the previous commit doesn't solve the problem in my case: 9c6bf9c7 linux-user: Fix ioctl cmd type mismatch on 64-bit targets For example, a ppc64 chroot on an x86_64 host: bash-4.3# ls Unsupported ioctl: cmd=0x80087467 Unsupported ioctl: cmd=0x802c7415 The origin of the problem is in syscall.c:do_ioctl(). static abi_long do_ioctl(int fd, abi_long cmd, abi_long arg) In this case (ppc64) abi_long is long (on the x86_64), and cmd = 0x0000000080087467 then if (ie->target_cmd == cmd) target_cmd is int, so target_cmd = 0x80087467 and to compare an int with a long, the sign is extended to 64bit, so the comparison is: if (0xffffffff80087467 == 0x0000000080087467) which doesn't match whereas it should. This patch uses int in the case of the target command type instead of abi_long. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2015-06-16linux-user: fix the breakpoint inheritance in spawned threadsThierry Bultel1-2/+2
When a thread is spawned, cpu_copy re-initializes the bp & wp lists of current thread, instead of the ones of the new thread. The effect is that breakpoints are no longer hit. Signed-off-by: Thierry Bultel <thierry.bultel@basystemes.fr> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2015-06-16linux-user: use __get_user and __put_user in cmsg conversionsPeter Maydell1-9/+11
The target payloads in cmsg conversions may not have the alignment required by the host. Using the get_user and put_user functions is the easiest way to handle this and also do the byte-swapping we require. (Note that prior to this commit target_to_host_cmsg was incorrectly using __put_user() rather than __get_user() for the SCM_CREDENTIALS conversion, which meant it wasn't getting the benefit of the misalignment handling.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2015-06-16linux-user: Fix length handling in host_to_target_cmsgPeter Maydell1-8/+61
The previous code for handling payload length when converting cmsg structures from host to target had a number of problems: * we required the msg->msg_controllen to declare the buffer to have enough space for final trailing padding (we were checking against CMSG_SPACE), whereas the kernel does not require this, and common userspace code assumes this. (In particular, glibc's "try to talk to nscd" code that it will run on startup will receive a cmsg with a 4 byte payload and only allocate 4 bytes for it, which was causing us to do the wrong thing on architectures that need 8-alignment.) * we weren't correctly handling the fact that the SO_TIMESTAMP payload may be larger for the target than the host * we weren't marking the messages with MSG_CTRUNC when we did need to truncate a message that wasn't truncated by the host, but were instead logging a QEMU message; since truncation is always the result of a guest giving us an insufficiently sized buffer, we should report it to the guest as the kernel does and don't log anything Rewrite the parts of the function that deal with length to fix these issues, and add a comment in target_to_host_cmsg to explain why the overflow logging it does is a QEMU bug, not a guest issue. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2015-06-15Merge remote-tracking branch ↵Peter Maydell22-294/+572
'remotes/pmaydell/tags/pull-target-arm-20150615' into staging target-arm queue: * Handle "extended small page" descriptors correctly * Use extended address bits from supersection short descriptors * Update interrupt status for all cores in gic_update * Fix off-by-one in exynos4210_fimd bit-swap code * Remove stray unused 'pending_exception' field * Add Cortex-A53 KVM support * Fix reset value of REVIDR * Add AArch32 MIDR aliases for ARMv8 cores * MAINTAINERS update for ARM ACPI code * Trust the kernel's value of MPIDR if we're using KVM * Various pxa2xx device updates to avoid old APIs * Mark pxa2xx copro registers as ARM_CP_IO so -icount works * Correctly UNDEF Thumb2 DSP insns on Cortex-M3 * Initial work towards implementing PMSAv7 * Fix a reset order bug introduced recently * Correct "preferred return address" for cpreg access exceptions * Add ACPI SPCR table for the virt board # gpg: Signature made Mon Jun 15 18:19:34 2015 BST using RSA key ID 14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" * remotes/pmaydell/tags/pull-target-arm-20150615: (28 commits) hw/arm/virt-acpi-build: Add SPCR table ACPI: Add definitions for the SPCR table target-arm: Correct "preferred return address" for cpreg access exceptions hw/arm/boot: fix rom_reset notifier registration order arm: helper: rename get_phys_addr_mpu arm: Add has-mpu property arm: Implement uniprocessor with MP config arm: Refactor get_phys_addr FSR return mechanism arm: helper: Factor out CP regs common to [pv]msa arm: Don't add v7mp registers in MPU systems arm: Do not define TLBTR in PMSA systems target-arm: Add the THUMB_DSP feature hw/sd/pxa2xx_mmci: Stop using old_mmio in MemoryRegionOps hw/arm/pxa2xx: Convert pxa2xx-ssp to VMState hw/arm/pxa2xx: Add reset method for pxa2xx_ssp hw/arm/pxa2xx: Convert pxa2xx-fir to QOM and VMState hw/arm/pxa2xx: Mark coprocessor registers as ARM_CP_IO target-arm: Use the kernel's idea of MPIDR if we're using KVM MAINTAINERS: Add myself as ARM ACPI Subsystem maintainer target-arm: add AArch32 MIDR aliases in ARMv8 ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-15hw/arm/virt-acpi-build: Add SPCR tableAndrew Jones1-1/+42
Signed-off-by: Andrew Jones <drjones@redhat.com> Tested-by: Shannon Zhao <shannon.zhao@linaro.org> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Message-id: 1433929959-29530-3-git-send-email-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-15ACPI: Add definitions for the SPCR tableAndrew Jones1-0/+32
SPCR is the Serial Port Console Redirection Table. See the document linked from http://uefi.org/acpi. For serial port types, "Interface Type", see the documentation for the Debug Port Table 2 (DBG2). Signed-off-by: Andrew Jones <drjones@redhat.com> Tested-by: Shannon Zhao <shannon.zhao@linaro.org> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Message-id: 1433929959-29530-2-git-send-email-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-15target-arm: Correct "preferred return address" for cpreg access exceptionsPeter Maydell1-1/+1
The architecture defines that when taking an exception trying to access a coprocessor register, the "preferred return address" for the exception is the address of the instruction that caused the exception. Correct an off-by-4 error which meant we were returning the address after the instruction for traps which happened because of a failure of a runtime access-check function on an AArch32 register. (Traps caused by translate-time checkable permissions failures had the correct address, as did traps on AArch64 registers.) This fixes https://bugs.launchpad.net/qemu/+bug/1463338 Reported-by: Robert Buhren <robert@robertbuhren.de> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1433861440-30133-1-git-send-email-peter.maydell@linaro.org
2015-06-15hw/arm/boot: fix rom_reset notifier registration orderEric Auger1-9/+11
commit ac9d32e39664e060cd1b538ff190980d57ad69e4 had the consequence to register the do_cpu_reset after the rom_reset one. Hence they get executed in the wrong order. This commit restores the registration of do_cpu_reset in arm_load_kernel. Signed-off-by: Eric Auger <eric.auger@linaro.org> Reported-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Tested-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1434111582-9325-1-git-send-email-eric.auger@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-15arm: helper: rename get_phys_addr_mpuPeter Crosthwaite1-5/+5
This get_phys_addr is really for pmsav5. Rename it accordingly. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: bf4b019aa87d682a45998105ef8e4d4e97a5e117.1434066412.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-15arm: Add has-mpu propertyPeter Crosthwaite2-0/+16
For processors that support MPUs, add a property to de-feature it. This is similar to the implementation of the EL3 feature. The processor definition in init sets ARM_FEATURE_MPU if it can support an MPU. post_init exposes the property, defaulting to true. If cleared by the instantiator, ARM_FEATURE_MPU is then removed at realize time. This is to support R profile processors that may or may-not have an MPU configured. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 632918cc48786e868ea18aa6bd12f70597994cad.1434066412.git.peter.crosthwaite@xilinx.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-15arm: Implement uniprocessor with MP configPeter Crosthwaite2-2/+7
Add a boolean for indicating uniprocessors with MP extensions. This drives the U bit in MPIDR. Prepares support for Cortex-R5. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: a70a80583df265e0174f01fa1fc92b33ea6d1db5.1434066412.git.peter.crosthwaite@xilinx.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-15arm: Refactor get_phys_addr FSR return mechanismPeter Crosthwaite3-64/+78
Currently, the return code for get_phys_addr is overloaded for both success/fail and FSR value return. This doesn't handle the case where there is an error with a 0 FSR. This case exists in PMSAv7. So rework get_phys_addr and friends to return a success/failure boolean return code and populate the FSR via a caller provided uint32_t pointer. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: a209e3d8ae00cda55260c970891f520210e26bad.1434066412.git.peter.crosthwaite@xilinx.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-15arm: helper: Factor out CP regs common to [pv]msaPeter Crosthwaite1-9/+14
V6+ PMSA and VMSA share some common registers that are currently in the VMSA definition block. Split them out into a new def that can be shared to PMSA. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 284db78a43c63c9bfbb60de539672c361bcb6af8.1434066412.git.peter.crosthwaite@xilinx.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-15arm: Don't add v7mp registers in MPU systemsPeter Crosthwaite1-1/+2
These registers are VMSA specific so they should be conditional on VMSA (i.e. !MPU). Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 7bb8843e45f2635c6b7a583c5bb5da51ed4442a0.1434066412.git.peter.crosthwaite@xilinx.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-15arm: Do not define TLBTR in PMSA systemsPeter Crosthwaite1-3/+10
If doing a PMSA (MPU) system do not define the VMSA specific TLBTR CP. The def is done separately from VMSA registers group as it is affected by both the OMAP/STRONGARM RW errata and the MIDR backgrounding. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: b03fea3840207edf633f5c9189400c3dd6a28d14.1434066412.git.peter.crosthwaite@xilinx.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-15target-arm: Add the THUMB_DSP featureAurelio C. Remonda3-10/+107
Create an ARM_FEATURE_THUMB_DSP controlling the Thumb encodings of the 85 DSP instructions (these are all Thumb2). This is enabled for all non-M-profile CPUs with Thumb2 support, as the instructions are mandatory for R and A profiles. On M profile they are optional and not present in the Cortex-M3 (though they are in the M4). The effect of this commit is that we will now treat the DSP encodings as illegal instructions on M3, when previously we incorrectly implemented them. Signed-off-by: Aurelio C. Remonda <aurelioremonda@gmail.com> Message-id: 1434311355-26554-1-git-send-email-aurelioremonda@gmail.com [PMM: added clz/crc32/crc32c and default case to the early-decode switch; minor format/spacing fixups; reworded commit message a bit] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-15hw/sd/pxa2xx_mmci: Stop using old_mmio in MemoryRegionOpsPeter Maydell1-60/+8
Update the pxa2xx_mmci device to stop using the old_mmio read and write callbacks in its MemoryRegionOps. This actually simplifies the code because the separate byte/halfword/word access functions were all calling into a single function to do the work anyway. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1434117989-7367-6-git-send-email-peter.maydell@linaro.org
2015-06-15hw/arm/pxa2xx: Convert pxa2xx-ssp to VMStatePeter Maydell1-57/+34
The pxa2xx-ssp device is already a QOM device but is still using the old-style register_savevm(); convert to VMState. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1434117989-7367-5-git-send-email-peter.maydell@linaro.org
2015-06-15hw/arm/pxa2xx: Add reset method for pxa2xx_sspPeter Maydell1-0/+18
The pxa2xx_ssp device was missing a reset method; add one. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Crosthwaite <peter..crosthwaite@xilinx.com> Message-id: 1434117989-7367-4-git-send-email-peter.maydell@linaro.org
2015-06-15hw/arm/pxa2xx: Convert pxa2xx-fir to QOM and VMStatePeter Maydell1-55/+86
Convert the pxa2xx-fir device to QOM, including using a VMState for its migration info. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1434117989-7367-3-git-send-email-peter.maydell@linaro.org
2015-06-15hw/arm/pxa2xx: Mark coprocessor registers as ARM_CP_IOPeter Maydell2-5/+5
The pxa2xx custom coprocessor registers in cp6 and cp14 do device accesses, so mark the non-constant regs as ARM_CP_IO so that icount works correctly and doesn't abort. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1434117989-7367-2-git-send-email-peter.maydell@linaro.org
2015-06-15target-arm: Use the kernel's idea of MPIDR if we're using KVMPavel Fedin7-9/+64
When we're using KVM, the kernel's internal idea of the MPIDR affinity fields must match the values we tell it for the guest vcpu cluster configuration in the device tree. Since at the moment the kernel doesn't support letting userspace tell it the correct affinity fields to use, we must read the kernel's view and reflect that back in the device tree. Signed-off-by: Shlomo Pongratz <shlomo.pongratz@huawei.com> Signed-off-by: Pavel Fedin <p.fedin@samsung.com> Message-id: 02f601d0a1e6$90c7d630$b2578290$@samsung.com [PMM: Use a local #define rather than a global variable for the TCG ARM_CPUS_PER_CLUSTER setting. Tweak a comment. Update the commit message.] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-15MAINTAINERS: Add myself as ARM ACPI Subsystem maintainerShannon Zhao1-0/+7
Add Shannon Zhao as the maintainer for the ARM ACPI Subsystem. Signed-off-by: Shannon Zhao <zhaoshenglong@huawei.com> Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> Reviewed-by: Claudio Fontana <claudio.fontana@huawei.com> Acked-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1433248318-6076-1-git-send-email-shannon.zhao@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-15target-arm: add AArch32 MIDR aliases in ARMv8Sergey Fedorov1-3/+7
According to ARMv8 ARM, there are additional aliases to MIDR system register in AArch32 state. So add them to the list. Signed-off-by: Sergey Fedorov <serge.fdrv@gmail.com> Message-id: 1433321048-23793-3-git-send-email-serge.fdrv@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-15target-arm: Fix REVIDR reset valueSergey Fedorov3-3/+5
According to ARM Cortex-A53/A57 TRM, REVIDR reset value should be zero. So let REVIDR reset value be specified by CPU model and correct it for Cortex-A53/A57. Signed-off-by: Sergey Fedorov <serge.fdrv@gmail.com> Message-id: 1433321048-23793-2-git-send-email-serge.fdrv@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-15hw/arm/virt: Add cortex-a53 cpu support in machine virtShannon Zhao1-0/+5
Add cortex-a53 cpu support in machine virt, so it can be used for TCG and KVM. Signed-off-by: Shannon Zhao <zhaoshenglong@huawei.com> Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1433207452-4512-3-git-send-email-shannon.zhao@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-15target-arm/kvm64: Add cortex-a53 cpu supportShannon Zhao2-0/+5
Since commit e353102(target-arm: cpu64: Add support for Cortex-A53) has added Cortex-A53 cpu support for target-arm, this patch just enables it for kvm-arm. Here adding XGENE_POTENZA just makes the enum continuous. Signed-off-by: Shannon Zhao <zhaoshenglong@huawei.com> Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> Message-id: 1433207452-4512-2-git-send-email-shannon.zhao@linaro.org [PMM: Don't add the CPU types to cpus_to_try[]; this array only lists old CPUs which were supported in pre-PREFERRED_TARGET kernels] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-15target-arm/cpu.h: remove pending_exceptionAlex Bennée1-1/+0
This isn't used by any of the code. In fact it looks like it was never used as it came in with ARMv7 support. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 1434020015-8868-1-git-send-email-alex.bennee@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-15hw/display/exynos4210_fimd: Fix bit-swapping codePeter Maydell1-1/+1
fimd_swap_data() includes code to reverse the bits in a 64-bit integer, but an off-by-one error meant that it would try to shift off the top of the integer. Correct the bug (spotted by Coverity). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1432912615-23107-1-git-send-email-peter.maydell@linaro.org
2015-06-15arm_gic: gic_update should always update all coresJohan Karlsson1-1/+1
This patch fixes so that gic_update always updates all the cores with new pending irq states. If the function returns early it is possible to get interrupts that has already been acknowledged. Signed-off-by: Johan Karlsson <johan.karlsson@enea.com> [PMM: rebased to apply to current master] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-15target-arm: use extended address bits from supersection short descriptorSergey Fedorov1-0/+2
Since ARMv7 with LPAE support, a supersection short translation table descriptor has had extended base address fields which hold bits 39:32 of translated address. These fields are IMPDEF in ARMv6 and ARMv7 without LPAE support. Signed-off-by: Sergey Fedorov <serge.fdrv@gmail.com> Message-id: 1433235718-30485-1-git-send-email-serge.fdrv@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-15target-arm: Handle "extended small page" descriptors correctlyPeter Maydell1-4/+9
The old ARMv5-style page table format includes a kind of second level descriptor named the "extended small page" format, whose primary purpose is to allow specification of the TEX memory attribute bits on a 4K page. This exists on ARMv6 and also (as an implementation extension) on XScale CPUs; it's UNPREDICTABLE on v5. We were mishandling this in two ways: (1) we weren't implementing it for v6 (probably never noticed because Linux will use the new-style v6 page table format there) (2) we were not correctly setting the page_size, which is 4K, not 1K The latter bug went unnoticed for years because the only thing which the page_size affects is which TLB entries get flushed when the guest does a TLB invalidate on an address in the page, and prior to commit 2f0d8631b7 we were doing a full TLB flush very frequently due to Linux's habit of writing the SCTLR pointlessly a lot. (We can assume that after commit 2f0d8631b7 the bug went unnoticed for a year because nobody's actually using the Zaurus/XScale emulation...) Report the correct page size for these descriptors, and permit them on ARMv6 CPUs. This fixes a problem where a kernel image for Zaurus can boot the kernel OK but gets random segfaults when it tries to run userspace programs. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1432844085-16441-1-git-send-email-peter.maydell@linaro.org
2015-06-15Merge remote-tracking branch 'remotes/kraxel/tags/pull-audio-20150615-1' ↵Peter Maydell22-2562/+382
into staging audio: remove obsolete backends (esd, fmod, winwave). audio: stop using global variables, small fixes. audio: remove some obsolte and unused code. # gpg: Signature made Mon Jun 15 13:24:44 2015 BST using RSA key ID D3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" * remotes/kraxel/tags/pull-audio-20150615-1: ossaudio: use trace events instead of debug config flag alsaaudio: use trace events instead of verbose dsoundaudio: remove primary buffer dsoundaudio: remove *_retries kludges audio: remove plive audio: remove LOG_TO_MONITOR along with default_mon MAINTAINERS: remove malc from audio sdlaudio: do not allow multiple instances coreaudio: do not use global variables where possible dsoundaudio: do not use global variables paaudio: fix possible resource leak wavaudio: do not use global variables ossaudio: do not use global variables alsaaudio: do not use global variables paaudio: do not use global variables audio: expose drv_opaque to init_out and init_in only enable dsound in case the header file is present audio: remove winwave audio driver audio: remove fmod backend audio: remove esd backend Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-15Merge remote-tracking branch 'remotes/borntraeger/tags/s390x-20150615' into ↵Peter Maydell13-11/+262
staging s390x/kvm/watchdog 1. Implement a diag288 based watchdog 2. Fix virtio-ccw BIOS for gcc >= 4.9 # gpg: Signature made Mon Jun 15 12:36:25 2015 BST using RSA key ID B5A61C7C # gpg: Good signature from "Christian Borntraeger (IBM) <borntraeger@de.ibm.com>" * remotes/borntraeger/tags/s390x-20150615: s390/bios: build with -fdelete-null-pointer-checks watchdog: Add new Virtual Watchdog action INJECT-NMI nmi: Implement inject_nmi() for non-monitor context use s390x/watchdog: diag288 migration support s390x/kvm: diag288 instruction interception and handling s390x/watchdog: introduce diag288 watchdog device watchdog: change option wording to allow for more watchdogs Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-15s390/bios: build with -fdelete-null-pointer-checksAurelien Jarno1-1/+1
Starting with version 4.9, GCC assumes it can't safely dereference null pointers, and uses this for some optimizations. On s390, the lowcore memory is located at address 0, so this assumption is wrong and breaks the s390-ccw firmware. Pass -fdelete-null-pointer-checks to avoid that. Cc: Cornelia Huck <cornelia.huck@de.ibm.com> Cc: Christian Borntraeger <borntraeger@de.ibm.com> Cc: Alexander Graf <agraf@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <1434363843-14576-1-git-send-email-aurelien@aurel32.net> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2015-06-15ossaudio: use trace events instead of debug config flagKővágó, Zoltán2-21/+8
Signed-off-by: Kővágó, Zoltán <DirtY.iCE.hu@gmail.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2015-06-15alsaaudio: use trace events instead of verboseKővágó, Zoltán2-46/+26
Signed-off-by: Kővágó, Zoltán <DirtY.iCE.hu@gmail.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2015-06-15dsoundaudio: remove primary bufferKővágó, Zoltán1-104/+0
Enabling this option just creates a playback buffer with the specified settings, and then ignores it. It's probably some outdated hack to set audio formats on windows. (The first created stream dictates all other streams settings, at least on some Windows versions). Setting DAC_FIXED_SETTINGS should have the same effect as setting (the now removed) primary buffer. Signed-off-by: Kővágó, Zoltán <DirtY.iCE.hu@gmail.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2015-06-15dsoundaudio: remove *_retries kludgesKővágó, Zoltán2-83/+20
According to MSDN this may happen when the window is not in the foreground, but the default is 1 since a long time (which means no retries), so it should be ok. I've found no problems during testing it on Windows 7 and wine, so this was probably only the case with some old Windows versions. Signed-off-by: Kővágó, Zoltán <DirtY.iCE.hu@gmail.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2015-06-15audio: remove pliveKővágó, Zoltán2-53/+0
It was useless even 3 years ago, so it can probably safely go away: https://lists.nongnu.org/archive/html/qemu-devel/2012-03/msg02427.html Signed-off-by: Kővágó, Zoltán <DirtY.iCE.hu@gmail.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2015-06-15audio: remove LOG_TO_MONITOR along with default_monKővágó, Zoltán3-25/+3
Setting QEMU_AUDIO_LOG_TO_MONITOR=1 can crash qemu (if qemu tries to log to the monitor before it's being initialized), and also nothing else in qemu logs to the monitor. This log to monitor feature was the last thing that used the default_mon variable, so I removed it too (as using it can cause problems). Signed-off-by: Kővágó, Zoltán <DirtY.iCE.hu@gmail.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2015-06-15MAINTAINERS: remove malc from audioGerd Hoffmann1-1/+0
email bounces, with a appearently permanent error: "av1474@comtv.ru mail receiving disabled, rejecting" Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Gonglei <arei.gonglei@huawei.com>
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