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2018-01-29target/ppc/spapr_caps: Add new tristate cap safe_cacheSuraj Jitindar Singh3-11/+32
Add new tristate cap cap-cfpc to represent the cache flush on privilege change capability. Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-01-29target/ppc/spapr_caps: Add support for tristate spapr_capabilitiesSuraj Jitindar Singh2-0/+70
spapr_caps are used to represent the level of support for various capabilities related to the spapr machine type. Currently there is only support for boolean capabilities. Add support for tristate capabilities by implementing their get/set functions. These capabilities can have the values 0, 1 or 2 corresponding to broken, workaround and fixed. Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-01-29target/ppc/kvm: Add cap_ppc_safe_[cache/bounds_check/indirect_branch]Suraj Jitindar Singh3-0/+88
Add three new kvm capabilities used to represent the level of host support for three corresponding workarounds. Host support for each of the capabilities is queried through the new ioctl KVM_PPC_GET_CPU_CHAR which returns four uint64 quantities. The first two, character and behaviour, represent the available characteristics of the cpu and the behaviour of the cpu respectively. The second two, c_mask and b_mask, represent the mask of known bits for the character and beheviour dwords respectively. Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> [dwg: Correct some compile errors due to name change in final kernel patch version] Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-01-29spapr_pci: fix MSI/MSIX selectionGreg Kurz1-19/+42
In various place we don't correctly check if the device supports MSI or MSI-X. This can cause devices to be advertised with MSI support, even if they only support MSI-X (like virtio-pci-* devices for example): ethernet@0 { ibm,req#msi = <0x1>; <--- wrong! . ibm,loc-code = "qemu_virtio-net-pci:0000:00:00.0"; . ibm,req#msi-x = <0x3>; }; Worse, this can also cause the "ibm,change-msi" RTAS call to corrupt the PCI status and cause migration to fail: qemu-system-ppc64: get_pci_config_device: Bad config data: i=0x6 read: 0 device: 10 cmask: 10 wmask: 0 w1cmask:0 ^^ PCI_STATUS_CAP_LIST bit which is assumed to be constant This patch changes spapr_populate_pci_child_dt() to properly check for MSI support using msi_present(): this ensures that PCIDevice::msi_cap was set by msi_init() and that msi_nr_vectors_allocated() will look at the right place in the config space. Checking PCIDevice::msix_entries_nr is enough for MSI-X but let's add a call to msix_present() there as well for consistency. It also changes rtas_ibm_change_msi() to select the appropriate MSI type in Function 1 instead of always selecting plain MSI. This new behaviour is compliant with LoPAPR 1.1, as described in "Table 71. ibm,change-msi Argument Call Buffer": Function 1: If Number Outputs is equal to 3, request to set to a new number of MSIs (including set to 0). If the “ibm,change-msix-capable” property exists and Number Outputs is equal to 4, request is to set to a new number of MSI or MSI-X (platform choice) interrupts (including set to 0). Since MSI is the the platform default (LoPAPR 6.2.3 MSI Option), let's check for MSI support first. And finally, it checks the input parameters are valid, as described in LoPAPR 1.1 "R1–7.3.10.5.1–3": For the MSI option: The platform must return a Status of -3 (Parameter error) from ibm,change-msi, with no change in interrupt assignments if the PCI configuration address does not support MSI and Function 3 was requested (that is, the “ibm,req#msi” property must exist for the PCI configuration address in order to use Function 3), or does not support MSI-X and Function 4 is requested (that is, the “ibm,req#msi-x” property must exist for the PCI configuration address in order to use Function 4), or if neither MSIs nor MSI-Xs are supported and Function 1 is requested. This ensures that the ret_intr_type variable contains a valid MSI type for this device, and that spapr_msi_setmsg() won't corrupt the PCI status. Signed-off-by: Greg Kurz <groug@kaod.org> Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-01-27input: add missing newline from trace-eventsMark Cave-Ayland1-0/+1
This was accidentally omitted from 77cb0f5aaf "Split adb.c into adb.c, adb-mouse.c and adb-kbd.c". Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-01-27uninorth: convert to trace-eventsMark Cave-Ayland2-19/+11
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-01-27grackle: convert to trace-eventsMark Cave-Ayland2-11/+5
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-01-27ppc: Deprecate qemu-system-ppcembthuth@redhat.com4-0/+37
qemu-system-ppcemb has been once split of qemu-system-ppc to support CPU page sizes < 4096 for some of the embedded 4xx PowerPC CPUs. However, there was hardly any OS available in the wild that really used such small page sizes (Linux uses 4096 on PPC), so there is no known recent use case for this separate build anymore. It's rather cumbersome to maintain a separate set of config switches for this, and it's wasting compile and test time of all the developers who have to build all QEMU targets to verify that their changes did not break anything. Except for the small CPU page sizes, qemu-system-ppc can be used as a full replacement for qemu-system-ppcemb since it contains all the embedded 4xx PPC boards and CPUs, too. Thus let's start the deprecation process for qemu-system-ppcemb to see whether somebody still needs the small page sizes or whether we could finally remove this unloved separate build. Signed-off-by: Thomas Huth <thuth@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-01-27ppc/pnv: fix PnvChip redefinition in <hw/ppc/pnv_xscom.h>Cédric Le Goater1-2/+0
This redefinition generates warnings on some clang compilers and older gcc4.4. ...include/hw/ppc/pnv_xscom.h:24:24: warning: redefinition of typedef 'PnvChip' is a C11 feature [-Wtypedef-redefinition] typedef struct PnvChip PnvChip; ^ ...include/hw/ppc/pnv.h:65:3: note: previous definition is here } PnvChip; ^ 1 warning generated. CC ppc64-softmmu/hw/ppc/pnv_xscom.o Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-01-26Merge remote-tracking branch 'remotes/ericb/tags/pull-nbd-2018-01-26' into ↵Peter Maydell14-31/+401
staging nbd patches for 2018-01-26 - Vladimir Sementsov-Ogievskiy - nbd export qmp interface - Eric Blake - hmp: Add nbd_server_remove to mirror QMP command - Edgar Kaziakhmedov - nbd: implement bdrv_get_info callback # gpg: Signature made Fri 26 Jan 2018 16:02:34 GMT # gpg: using RSA key 0xA7A16B4A2527436A # gpg: Good signature from "Eric Blake <eblake@redhat.com>" # gpg: aka "Eric Blake (Free Software Programmer) <ebb9@byu.net>" # gpg: aka "[jpeg image of size 6874]" # Primary key fingerprint: 71C2 CC22 B1C4 6029 27D2 F3AA A7A1 6B4A 2527 436A * remotes/ericb/tags/pull-nbd-2018-01-26: nbd: implement bdrv_get_info callback hmp: Add nbd_server_remove to mirror QMP command iotest 205: new test for qmp nbd-server-remove iotests: implement QemuIoInteractive class iotest 147: add cases to test new @name parameter of nbd-server-add qapi: add nbd-server-remove hmp: Add name parameter to nbd_server_add qapi: add name parameter to nbd-server-add Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-01-26nbd: implement bdrv_get_info callbackEdgar Kaziakhmedov1-0/+11
Since mirror job supports efficient zero out target mechanism (see in mirror_dirty_init()), implement bdrv_get_info to make it work over NBD. Such improvement will allow using the largest chunk possible and will decrease the number of NBD_CMD_WRITE_ZEROES requests on the wire. Signed-off-by: Edgar Kaziakhmedov <edgar.kaziakhmedov@virtuozzo.com> Message-Id: <20180118115158.17219-1-edgar.kaziakhmedov@virtuozzo.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Eric Blake <eblake@redhat.com>
2018-01-26hmp: Add nbd_server_remove to mirror QMP commandEric Blake3-3/+29
Since everything else about the nbd-server-* QMP commands is accessible from HMP, we might as well make removing an export available as well. For now, I went with a bool flag rather than a mode string for choosing between safe (default) and hard modes. Signed-off-by: Eric Blake <eblake@redhat.com> Message-Id: <20180125144557.25502-1-eblake@redhat.com> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Signed-off-by: Eric Blake <eblake@redhat.com>
2018-01-26iotest 205: new test for qmp nbd-server-removeVladimir Sementsov-Ogievskiy3-0/+162
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Message-Id: <20180119135719.24745-6-vsementsov@virtuozzo.com> [eblake: adjust to next available test number] Signed-off-by: Eric Blake <eblake@redhat.com>
2018-01-26iotests: implement QemuIoInteractive classVladimir Sementsov-Ogievskiy1-0/+38
Implement QemuIoInteractive to test nbd-server-remove command when there are active connections. Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Message-Id: <20180119135719.24745-5-vsementsov@virtuozzo.com> Signed-off-by: Eric Blake <eblake@redhat.com>
2018-01-26iotest 147: add cases to test new @name parameter of nbd-server-addVladimir Sementsov-Ogievskiy2-15/+57
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Reviewed-by: Eric Blake <eblake@redhat.com> Message-Id: <20180119135719.24745-4-vsementsov@virtuozzo.com> Signed-off-by: Eric Blake <eblake@redhat.com>
2018-01-26qapi: add nbd-server-removeVladimir Sementsov-Ogievskiy4-0/+79
Add command for removing an export. It is needed for cases when we don't want to keep the export after the operation on it was completed. The other example is a temporary node, created with blockdev-add. If we want to delete it we should firstly remove any corresponding NBD export. Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Message-Id: <20180119135719.24745-3-vsementsov@virtuozzo.com> [eblake: drop dead nb_clients code] Signed-off-by: Eric Blake <eblake@redhat.com>
2018-01-26hmp: Add name parameter to nbd_server_addEric Blake2-5/+7
Extend the flexibility of the previous QMP patch to also work in HMP. Signed-off-by: Eric Blake <eblake@redhat.com> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Message-Id: <20180109192802.17167-1-eblake@redhat.com>
2018-01-26qapi: add name parameter to nbd-server-addVladimir Sementsov-Ogievskiy3-9/+19
Allow user to specify name for new export, to not reuse internal node name and to not show it to clients. This also allows creating several exports per device. Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Reviewed-by: Eric Blake <eblake@redhat.com> Message-Id: <20180119135719.24745-2-vsementsov@virtuozzo.com> Signed-off-by: Eric Blake <eblake@redhat.com>
2018-01-26Merge remote-tracking branch ↵Peter Maydell15-3/+1275
'remotes/edgar/tags/edgar/xilinx-next-2018-01-26.for-upstream' into staging Xilinx queue # gpg: Signature made Fri 26 Jan 2018 10:17:01 GMT # gpg: using RSA key 0x29C596780F6BCA83 # gpg: Good signature from "Edgar E. Iglesias (Xilinx key) <edgar.iglesias@xilinx.com>" # gpg: aka "Edgar E. Iglesias <edgar.iglesias@gmail.com>" # Primary key fingerprint: AC44 FEDC 14F7 F1EB EDBF 4151 29C5 9678 0F6B CA83 * remotes/edgar/tags/edgar/xilinx-next-2018-01-26.for-upstream: xlnx-zynqmp: Connect the IPI device to the ZynqMP SoC xlnx-zynqmp-pmu: Connect the IPI device to the PMU xlnx-zynqmp-ipi: Initial version of the Xilinx IPI device xlnx-zynqmp-pmu: Connect the PMU interrupt controller xlnx-pmu-iomod-intc: Add the PMU Interrupt controller aarch64-softmmu.mak: Use an ARM specific config xlnx-zynqmp-pmu: Add the CPU and memory xlnx-zynqmp-pmu: Initial commit of the ZynqMP PMU microblaze: boot.c: Don't try to find NULL file Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-01-26Merge remote-tracking branch ↵Peter Maydell15-370/+74
'remotes/kraxel/tags/usb-20180126-v3-pull-request' into staging usb: -usbdevice cleanups, storage fix, QOMify ccid. # gpg: Signature made Fri 26 Jan 2018 08:04:49 GMT # gpg: using RSA key 0x4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/usb-20180126-v3-pull-request: usb-ccid: convert CCIDCardClass::exitfn() -> unrealize() usb-ccid: inline ccid_card_initfn() in ccid_card_realize() hw/usb/ccid: Make ccid_card_init() take an error parameter usb-storage: Fix share-rw option parsing usb: Remove legacy -usbdevice options (host, serial, disk and net) Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-01-26Merge remote-tracking branch 'remotes/mcayland/tags/qemu-openbios-signed' ↵Peter Maydell4-0/+0
into staging Update OpenBIOS images # gpg: Signature made Fri 26 Jan 2018 07:59:45 GMT # gpg: using RSA key 0x5BC2C56FAE0F321F # gpg: Good signature from "Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>" # Primary key fingerprint: CC62 1AB9 8E82 200D 915C C9C4 5BC2 C56F AE0F 321F * remotes/mcayland/tags/qemu-openbios-signed: Update OpenBIOS images to b5c93acd14 built from submodule. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-01-26xlnx-zynqmp: Connect the IPI device to the ZynqMP SoCAlistair Francis2-0/+16
Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2018-01-26xlnx-zynqmp-pmu: Connect the IPI device to the PMUAlistair Francis1-0/+31
Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2018-01-26xlnx-zynqmp-ipi: Initial version of the Xilinx IPI deviceAlistair Francis3-0/+435
This is the initial version of the Inter Processor Interrupt device. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2018-01-26xlnx-zynqmp-pmu: Connect the PMU interrupt controllerAlistair Francis1-0/+24
Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2018-01-26xlnx-pmu-iomod-intc: Add the PMU Interrupt controllerAlistair Francis4-0/+614
Add the PMU IO Module Interrupt controller device. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2018-01-26aarch64-softmmu.mak: Use an ARM specific configAlistair Francis4-2/+4
In preperation for having an ARM and MicroBlaze ZynqMP machine let's split out the current ARM specific config options. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Acked-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2018-01-26xlnx-zynqmp-pmu: Add the CPU and memoryAlistair Francis1-2/+68
Connect the MicroBlaze CPU and the ROM and RAM memory regions. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2018-01-26xlnx-zynqmp-pmu: Initial commit of the ZynqMP PMUAlistair Francis2-0/+84
The Xilinx ZynqMP SoC has two main processing systems in it. The ARM processing system (which is already modeled in QEMU) and the MicroBlaze Power Management Unit (PMU). This is the inital work for adding support for the PMU. The PMU susbsystem runs along side the ARM system on hardware, but due to architecture limitations in QEMU the two instances are seperate for the time being. Let's follow the same setup we do with the ARM system, where there is an SoC device and a ZCU102 board. Although the PMU is less board specific we are still going to follow the same split as maybe in future we can connect the PMU device to the ARM ZCU102 board. As the machine will be fairly small let's keep them both together in one file. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2018-01-26microblaze: boot.c: Don't try to find NULL fileAlistair Francis1-1/+1
Previously if no device tree was passed to microblaze_load_kernel() then qemu_find_file() would try to find a NULL pointer. To avoid this put a check around qemu_find_file(). Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reported-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2018-01-26Merge remote-tracking branch ↵Peter Maydell63-203/+1167
'remotes/vivier/tags/m68k-for-2.12-pull-request' into staging # gpg: Signature made Thu 25 Jan 2018 15:15:03 GMT # gpg: using RSA key 0xF30C38BD3F2FBE3C # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" # gpg: aka "Laurent Vivier <laurent@vivier.eu>" # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier/tags/m68k-for-2.12-pull-request: target/m68k: add HMP command "info tlb" target/m68k: add pflush/ptest target/m68k: add moves target/m68k: add index parameter to gen_load()/gen_store() and Co. target/m68k: add Transparent Translation target/m68k: add MC68040 MMU accel/tcg: add size paremeter in tlb_fill() target/m68k: fix TCG variable double free Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-01-26Update OpenBIOS images to b5c93acd14 built from submodule.Mark Cave-Ayland4-0/+0
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2018-01-26usb-ccid: convert CCIDCardClass::exitfn() -> unrealize()Philippe Mathieu-Daudé4-17/+17
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180125171432.13554-4-f4bug@amsat.org Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2018-01-26usb-ccid: inline ccid_card_initfn() in ccid_card_realize()Philippe Mathieu-Daudé1-18/+7
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180125171432.13554-3-f4bug@amsat.org Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2018-01-26hw/usb/ccid: Make ccid_card_init() take an error parameterMao Zhongyi4-45/+50
Replace init() of CCIDCardClass with realize, then convert ccid_card_init(), ccid_card_initfn() and it's callbacks to take an Error** in ordor to report the error more clearly. Signed-off-by: Mao Zhongyi <maozy.fnst@cn.fujitsu.com> Signed-off-by: Cao jin <caoj.fnst@cn.fujitsu.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180125171432.13554-2-f4bug@amsat.org [PMD: fixed s->card assignation in ccid_card_realize()] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2018-01-26usb-storage: Fix share-rw option parsingFam Zheng3-2/+11
Because usb-storage creates an internal scsi device, we should propagate options. We already do so for bootindex etc, but failed to take care of share-rw. Fix it in an apparent way: add a new parameter to scsi_bus_legacy_add_drive and pass in s->conf.share_rw. Cc: qemu-stable@nongnu.org Signed-off-by: Fam Zheng <famz@redhat.com> Reviewed-by: Darren Kenny <darren.kenny@oracle.com> Message-id: 20180117005222.4781-1-famz@redhat.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2018-01-26usb: Remove legacy -usbdevice options (host, serial, disk and net)Thomas Huth9-300/+1
The option have been marked as deprecated since QEMU 2.10, and so far nobody complained that the host, serial, disk and net options are urgently required anymore. So let's now get rid at least of this legacy pile, to simplify the usb code quite a bit. This patch removes the usbdevices host, serial, disk and net. These devices use their own complicated parameter parsing mechanisms, so they are just ugly to maintain, without real benefit for the users (the users can use the corresponding "-device" parameters instead which have the same complexity as the "-usbdevice" devices here). Note that the other rather simple -usbdevice options (mouse, tablet, etc.) are not removed yet (the code is really simple here, so it does not hurt much to keep it), as well as the two devices "braille" and "bt" which are easier to use with -usbdevice than with -device. Signed-off-by: Thomas Huth <thuth@redhat.com> Message-id: 1515519171-20315-1-git-send-email-thuth@redhat.com [kraxel] delete some usb_host_device_open() leftovers. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2018-01-25Merge remote-tracking branch 'remotes/kraxel/tags/ui-20180125-pull-request' ↵Peter Maydell19-641/+389
into staging ui: convert to keycodedb, fix sign extension sdl: cleanups, deprecate sdl 1.2 # gpg: Signature made Thu 25 Jan 2018 14:31:47 GMT # gpg: using RSA key 0x4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/ui-20180125-pull-request: sdl: reorganize -no-frame support sdl: use ctrl-alt-g as grab hotkey ui: deprecate use of SDL 1.2 in favour of 2.0 series ui: ignore hardware keycode 255 on win32 ui: add fix for GTK Pause key handling on Win32 ui: convert GTK and SDL1 frontends to keycodemapdb ui: convert the SDL2 frontend to keycodemapdb ui: avoid sign extension using client width/height Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-01-25Merge remote-tracking branch ↵Peter Maydell23-525/+607
'remotes/pmaydell/tags/pull-target-arm-20180125' into staging target-arm queue: * target/arm: Fix address truncation in 64-bit pagetable walks * i.MX: Fix FEC/ENET receive functions * target/arm: preparatory refactoring for SVE emulation * hw/intc/arm_gic: Prevent the GIC from signaling an IRQ when it's "active and pending" * hw/intc/arm_gic: Fix C_RPR value on idle priority * hw/intc/arm_gic: Fix group priority computation for group 1 IRQs * hw/intc/arm_gic: Fix the NS view of C_BPR when C_CTRL.CBPR is 1 * hw/arm/virt: Check that the CPU realize method succeeded * sdhci: fix a NULL pointer dereference due to uninitialized AddressSpace object * xilinx_spips: Correct usage of an uninitialized local variable * pl110: Implement vertical compare/next base interrupts # gpg: Signature made Thu 25 Jan 2018 12:59:25 GMT # gpg: using RSA key 0x3C2525ED14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" # gpg: aka "Peter Maydell <pmaydell@gmail.com>" # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20180125: (21 commits) pl110: Implement vertical compare/next base interrupts xilinx_spips: Correct usage of an uninitialized local variable sdhci: fix a NULL pointer dereference due to uninitialized AddresSpace object hw/arm/virt: Check that the CPU realize method succeeded hw/intc/arm_gic: Fix the NS view of C_BPR when C_CTRL.CBPR is 1 hw/intc/arm_gic: Fix group priority computation for group 1 IRQs hw/intc/arm_gic: Fix C_RPR value on idle priority hw/intc/arm_gic: Prevent the GIC from signaling an IRQ when it's "active and pending" target/arm: Simplify fp_exception_el for user-only target/arm: Hoist store to flags output in cpu_get_tb_cpu_state target/arm: Move cpu_get_tb_cpu_state out of line target/arm: Add ARM_FEATURE_SVE vmstate: Add VMSTATE_UINT64_SUB_ARRAY target/arm: Add aa{32, 64}_vfp_{dreg, qreg} helpers target/arm: Change the type of vfp.regs target/arm: Use pointers in neon tbl helper target/arm: Use pointers in neon zip/uzp helpers target/arm: Use pointers in crypto helpers target/arm: Mark disas_set_insn_syndrome inline i.MX: Fix FEC/ENET receive funtions ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-01-25Merge remote-tracking branch 'remotes/mcayland/tags/qemu-sparc-signed' into ↵Peter Maydell13-267/+416
staging qemu-sparc update # gpg: Signature made Thu 25 Jan 2018 13:44:58 GMT # gpg: using RSA key 0x5BC2C56FAE0F321F # gpg: Good signature from "Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>" # Primary key fingerprint: CC62 1AB9 8E82 200D 915C C9C4 5BC2 C56F AE0F 321F * remotes/mcayland/tags/qemu-sparc-signed: sun4u: implement power device sparc64: convert hw/sparc64/sparc64.c from DPRINTF macros to trace events sabre: convert from SABRE_DPRINTF macro to trace-events apb: rename apb.c to sabre.c sun4u: rename apb variables and constants apb: rename QOM type from TYPE_APB to TYPE_SABRE apb: QOMify sabre PCI host bridge apb: change pbm_pci_host prefix functions to use sabre_pci prefix apb: rename APB functions to use sabre prefix simba: rename PBMPCIBridge and QOM types to reflect simba naming apb: split simba PCI bridge into hw/pci-bridge/simba.c sparc/leon3 irqmp: fix IRQ software ack Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-01-25Merge remote-tracking branch 'remotes/kraxel/tags/vga-20180125-pull-request' ↵Peter Maydell1-0/+3
into staging vga: fix for CVE-2018-5683 # gpg: Signature made Thu 25 Jan 2018 09:33:23 GMT # gpg: using RSA key 0x4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/vga-20180125-pull-request: vga: check the validation of memory addr when draw text Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-01-25target/m68k: add HMP command "info tlb"Laurent Vivier4-1/+236
Dump MMU state and address mappings. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180118193846.24953-8-laurent@vivier.eu>
2018-01-25target/m68k: add pflush/ptestLaurent Vivier6-0/+113
Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180118193846.24953-7-laurent@vivier.eu>
2018-01-25target/m68k: add movesLaurent Vivier5-7/+98
and introduce SFC and DFC control registers. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180118193846.24953-6-laurent@vivier.eu>
2018-01-25target/m68k: add index parameter to gen_load()/gen_store() and Co.Laurent Vivier1-59/+66
The instruction "moves" can select source and destination address space (user or kernel). This patch modifies all the load/store functions to be able to provide the address space the caller wants to use instead of using the current one. All the callers are modified to provide the default address space to these functions. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180118193846.24953-5-laurent@vivier.eu>
2018-01-25target/m68k: add Transparent TranslationLaurent Vivier4-0/+104
Add ittr0, ittr1, dttr0, dttr1 and manage Transparent Translations Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180118193846.24953-4-laurent@vivier.eu>
2018-01-25target/m68k: add MC68040 MMULaurent Vivier6-16/+423
Only add MC68040 MMU page table processing and related registers (Special Status Word, Translation Control Register, User Root Pointer and Supervisor Root Pointer). Transparent Translation Registers, DFC/SFC and pflush/ptest will be added later. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180118193846.24953-3-laurent@vivier.eu>
2018-01-25accel/tcg: add size paremeter in tlb_fill()Laurent Vivier58-121/+129
The MC68040 MMU provides the size of the access that triggers the page fault. This size is set in the Special Status Word which is written in the stack frame of the access fault exception. So we need the size in m68k_cpu_unassigned_access() and m68k_cpu_handle_mmu_fault(). To be able to do that, this patch modifies the prototype of handle_mmu_fault handler, tlb_fill() and probe_write(). do_unassigned_access() already includes a size parameter. This patch also updates handle_mmu_fault handlers and tlb_fill() of all targets (only parameter, no code change). Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180118193846.24953-2-laurent@vivier.eu>
2018-01-25target/m68k: fix TCG variable double freeLaurent Vivier1-1/+0
t64 is also unconditionally freed after the switch () { ... } Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Thomas Huth <huth@tuxfamily.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180119114444.7590-1-laurent@vivier.eu>
2018-01-25sdl: reorganize -no-frame supportGerd Hoffmann5-17/+9
Drop no_frame flag from sdl_display_init argument list, use a global variable instead. This is temporary until -no-frame support is dropped altogether when we remove sdl1 support. Remove any traces of noframe from sdl2 code. It is just dead code as sdl2 doesn't support the SDL_NOFRAME window flag any more. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20180115154855.30850-3-kraxel@redhat.com