summaryrefslogtreecommitdiff
AgeCommit message (Collapse)AuthorFilesLines
2017-10-24tcg: Introduce tcgv_{i32,i64,ptr}_{arg,temp}Richard Henderson6-90/+122
Transform TCGv_* to an "argument" or a temporary. For now, an argument is simply the temporary index. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2017-10-24tcg: Push tcg_ctx into tcg_gen_callNRichard Henderson3-10/+9
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2017-10-24tcg: Push tcg_ctx into generator functionsRichard Henderson2-78/+69
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2017-10-24tcg: Use per-temp state data in optimizeRichard Henderson2-182/+246
While we're touching many of the lines anyway, adjust the naming of the functions to better distinguish when "TCGArg" vs "TCGTemp" should be used. Reviewed-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-10-24tcg: Remove unused TCG_CALL_DUMMY_TCGVRichard Henderson1-1/+0
Reviewed-by: Emilio G. Cota <cota@braap.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-10-24tcg: Change temp_allocate_frame arg to TCGTempRichard Henderson1-5/+3
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-10-24tcg: Avoid loops against variable boundsRichard Henderson1-17/+10
Copy s->nb_globals or s->nb_temps to a local variable for the purposes of iteration. This should allow the compiler to use low-overhead looping constructs on some hosts. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Emilio G. Cota <cota@braap.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-10-24tcg: Use per-temp state data in livenessRichard Henderson2-109/+122
This avoids having to allocate external memory for each temporary. Reviewed-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-10-24tcg: Introduce temp_arg, export temp_idxRichard Henderson2-13/+18
At the same time, drop the TCGContext argument and use tcg_ctx instead. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-10-24tcg: Return NULL temp for TCG_CALL_DUMMY_ARGRichard Henderson1-1/+1
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-10-24tcg: Add temp_global bit to TCGTempRichard Henderson3-14/+24
This avoids needing to test the index of a temp against nb_globals. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-10-24tcg: Introduce arg_tempRichard Henderson3-28/+32
Reviewed-by: Emilio G. Cota <cota@braap.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-10-24tcg: Propagate TCGOp down to allocatorsRichard Henderson1-38/+37
Reviewed-by: Emilio G. Cota <cota@braap.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-10-24tcg: Propagate args to op->args in tcg.cRichard Henderson1-63/+58
Reviewed-by: Emilio G. Cota <cota@braap.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-10-24tcg: Propagate args to op->args in optimizerRichard Henderson1-203/+227
Reviewed-by: Emilio G. Cota <cota@braap.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-10-24tcg: Merge opcode arguments into TCGOpRichard Henderson4-142/+98
Rather than have a separate buffer of 10*max_ops entries, give each opcode 10 entries. The result is actually a bit smaller and should have slightly more cache locality. Reviewed-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-10-24Merge remote-tracking branch 'remotes/kraxel/tags/usb-20171023-pull-request' ↵Peter Maydell1-22/+1
into staging usb: ccid fix. # gpg: Signature made Mon 23 Oct 2017 09:45:00 BST # gpg: using RSA key 0x4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/usb-20171023-pull-request: usb-ccid: remove needless migration state code Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-10-24Merge remote-tracking branch ↵Peter Maydell3-4/+6
'remotes/kraxel/tags/fixes-20171023-pull-request' into staging fixes for the fallout of the recent ui and keymap merges. # gpg: Signature made Mon 23 Oct 2017 09:02:24 BST # gpg: using RSA key 0x4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/fixes-20171023-pull-request: scripts: don't throw away stderr when checking out git submodules ui: add qemu-keymap and shader to .gitignore configure: disable qemu-keymap for linux-user qemu Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-10-24Merge remote-tracking branch 'remotes/shorne/tags/openrisc-20171021-smp-pr' ↵Peter Maydell9-46/+302
into staging OpenRISC SMP patchset 20171021 # gpg: Signature made Fri 20 Oct 2017 22:51:16 BST # gpg: using RSA key 0xC3B31C2D5E6627E4 # gpg: Good signature from "Stafford Horne <shorne@gmail.com>" # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: D9C4 7354 AEF8 6C10 3A25 EFF1 C3B3 1C2D 5E66 27E4 * remotes/shorne/tags/openrisc-20171021-smp-pr: openrisc: Only kick cpu on timeout, not on update openrisc: Initial SMP support openrisc/cputimer: Perparation for Multicore target/openrisc: Make coreid and numcores variable openrisc/ompic: Add OpenRISC Multicore PIC (OMPIC) Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-10-23usb-ccid: remove needless migration state codeMarc-André Lureau1-22/+1
This code appears to be unused since its introduction. We need to keep the state_vmstate field byte in VMState for compatibility reasons. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-id: 20171013125533.9153-1-marcandre.lureau@redhat.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2017-10-23scripts: don't throw away stderr when checking out git submodulesDaniel P. Berrange1-1/+1
The stderr from git is important if git fails to checkout modules due to network problems, or other unexpected errors. Signed-off-by: Daniel P. Berrange <berrange@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20171020130748.22983-1-berrange@redhat.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2017-10-23ui: add qemu-keymap and shader to .gitignoreGerd Hoffmann1-0/+2
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Message-id: 20171020070914.7785-1-kraxel@redhat.com
2017-10-23configure: disable qemu-keymap for linux-user qemuLaurent Vivier1-3/+3
We don't need qemu-keymap when we build only linux-user qemu. When we compile in static mode, the libxkbcommon is detected by configure if the shared one is available, but cannot be linked if the static version is not available. As we don't need it for qemu-linux-user, and we generally need a static link to use it in a chroot, disable qemu-keymap in this case. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Message-id: 20171019191606.14129-1-laurent@vivier.eu Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2017-10-21openrisc: Only kick cpu on timeout, not on updateStafford Horne1-1/+1
Previously we were kicking the cpu on every update. This caused problems noticeable in SMP configurations where one CPU got pinned continuously servicing timer exceptions. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Stafford Horne <shorne@gmail.com>
2017-10-21openrisc: Initial SMP supportStafford Horne1-23/+65
Wire in ompic and add basic support for SMP. The OpenRISC is special in that interrupts for devices are routed to each core's PIC. This is achieved using the qemu_irq_split utility, but this currently limits OpenRISC to 2 cores. This models the reference architecture described in the OpenRISC spec 1.2 proposal. https://github.com/stffrdhrn/doc/raw/arch-1.2-proposal/openrisc-arch-1.2-rev0.pdf The changes to the intialization of the sim include: CPU Reset o Reset each cpu to the bootstrap PC rather than only a single cpu as done before. o During Kernel loading the bootstrap PC is saved in a static global. Network Initialization o Connect the interrupt to each CPU o Use more simple sysbus_mmio_map() rather than memory_region_add_subregion() Sim Initialization o Initialize the pic and tick timer per cpu o Wire in the OMPIC if SMP is enabled o Wire the serial irq to each CPU using qemu_irq_split() Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Stafford Horne <shorne@gmail.com>
2017-10-21openrisc/cputimer: Perparation for MulticoreStafford Horne5-20/+52
In order to support multicore system we move some of the previously static state variables into the state of each core. On the other hand in order to allow timers to be synced between each code the ttcr (tick timer count register) is moved out of the core. This is not as per real hardware spec which has a separate timer counter per core, but it seems the most simple way to keep each clock in sync. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Stafford Horne <shorne@gmail.com>
2017-10-21target/openrisc: Make coreid and numcores variableStafford Horne1-2/+3
Previously coreid and numcores were hard coded as 0 and 1 respectively as OpenRISC QEMU did not have multicore support. Multicore support is now being added so these registers need to have configured values. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Stafford Horne <shorne@gmail.com>
2017-10-21openrisc/ompic: Add OpenRISC Multicore PIC (OMPIC)Stafford Horne3-0/+181
Add OpenRISC Multicore PIC which handles inter processor interrupts (IPI) between cores. In OpenRISC all device interrupts are routed to each core enabling this device to be simple. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Stafford Horne <shorne@gmail.com>
2017-10-20Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into ↵Peter Maydell1-7/+8
staging # gpg: Signature made Fri 20 Oct 2017 13:02:25 BST # gpg: using RSA key 0x9CA4ABB381AB73C8 # gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>" # gpg: aka "Stefan Hajnoczi <stefanha@gmail.com>" # Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35 775A 9CA4 ABB3 81AB 73C8 * remotes/stefanha/tags/block-pull-request: oslib-posix: Fix compiler warning and some data types Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-10-20Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20171020' into stagingPeter Maydell54-1168/+1581
The last big chunk of s390x changes: - (experimental) smp support under tcg - provide the virtio-input devices for virtio-ccw - improve error handling in the css code - enable some simple virtio tests for s390x - low-address protection in tcg - some more cleanups and fixes # gpg: Signature made Fri 20 Oct 2017 12:49:22 BST # gpg: using RSA key 0xDECF6B93C6F02FAF # gpg: Good signature from "Cornelia Huck <conny@cornelia-huck.de>" # gpg: aka "Cornelia Huck <huckc@linux.vnet.ibm.com>" # gpg: aka "Cornelia Huck <cornelia.huck@de.ibm.com>" # gpg: aka "Cornelia Huck <cohuck@kernel.org>" # gpg: aka "Cornelia Huck <cohuck@redhat.com>" # Primary key fingerprint: C3D0 D66D C362 4FF6 A8C0 18CE DECF 6B93 C6F0 2FAF * remotes/cohuck/tags/s390x-20171020: (46 commits) s390x/tcg: low-address protection support accel/tcg: allow to invalidate a write TLB entry immediately tests: Enable the very simple virtio tests on s390x, too libqtest: Add qtest_[v]startf() s390x: refactor error handling for MSCH handler s390x: refactor error handling for HSCH handler s390x: refactor error handling for CSCH handler s390x: refactor error handling for XSCH handler s390x: improve error handling for SSCH and RSCH s390x/css: IO instr handler ending control s390x: move s390x_new_cpu() into board code s390x: fix cpu object referrence leak in s390x_new_cpu() s390x/event-facility: variable-length event masks s390x/MAINTAINERS: add mailing list virtio-ccw: Add the virtio-input devices for CCW bus target/s390x: special handling when starting a CPU with WAIT PSW s390x/tcg: refactor stfl(e) to use s390_get_feat_block() s390x/tcg: unlock NMI s390x/cpumodel: allow to enable SENSE RUNNING STATUS for qemu s390x/tcg: switch to new SIGP handling code ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-10-20Merge remote-tracking branch 'remotes/famz/tags/docker-pull-request' into ↵Peter Maydell2-6/+8
staging # gpg: Signature made Fri 20 Oct 2017 07:30:45 BST # gpg: using RSA key 0xCA35624C6A9171C6 # gpg: Good signature from "Fam Zheng <famz@redhat.com>" # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: 5003 7CB7 9706 0F76 F021 AD56 CA35 624C 6A91 71C6 * remotes/famz/tags/docker-pull-request: docker: Fix PATH for ccache docker: fix out-of-tree 'make docker-test-build@debian-powerpc-cross' docker: allow running from srcdir != builddir build docker: cleanup temp directory after test docker: Don't allocate tty unless DEBUG=1 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-10-20s390x/tcg: low-address protection supportDavid Hildenbrand3-45/+62
This is a neat way to implement low address protection, whereby only the first 512 bytes of the first two pages (each 4096 bytes) of every address space are protected. Store a tec of 0 for the access exception, this is what is defined by Enhanced Suppression on Protection in case of a low address protection (Bit 61 set to 0, rest undefined). We have to make sure to to pass the access address, not the masked page address into mmu_translate*(). Drop the check from testblock. So we can properly test this via kvm-unit-tests. This will check every access going through one of the MMUs. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20171016202358.3633-3-david@redhat.com> [CH: restored error message for access register mode] Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20accel/tcg: allow to invalidate a write TLB entry immediatelyDavid Hildenbrand3-3/+9
Background: s390x implements Low-Address Protection (LAP). If LAP is enabled, writing to effective addresses (before any translation) 0-511 and 4096-4607 triggers a protection exception. So we have subpage protection on the first two pages of every address space (where the lowcore - the CPU private data resides). By immediately invalidating the write entry but allowing the caller to continue, we force every write access onto these first two pages into the slow path. we will get a tlb fault with the specific accessed addresses and can then evaluate if protection applies or not. We have to make sure to ignore the invalid bit if tlb_fill() succeeds. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20171016202358.3633-2-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20tests: Enable the very simple virtio tests on s390x, tooThomas Huth4-18/+28
These tests can easily be used on s390x, too. We just have to make sure to use the virtio-xxx-ccw devices instead of virtio-xxx-pci. Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <1508336428-20511-3-git-send-email-thuth@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20libqtest: Add qtest_[v]startf()Eric Blake14-138/+128
We have several callers that were formatting the argument strings themselves; consolidate this effort by adding new convenience functions directly in libqtest, and update some call-sites that can benefit from it. Note that the new functions qtest_startf() and qtest_vstartf() behave more like qtest_init() (the caller must assign global_qtest after the fact, rather than getting it implicitly set). This helps us prepare for future patches that get rid of the global variable, by explicitly highlighting which tests still depend on it now. Signed-off-by: Eric Blake <eblake@redhat.com> [thuth: Dropped the hunks that do not apply cleanly to qemu master yet and added the missing g_free(args) in qtest_vstartf()] Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <1508336428-20511-2-git-send-email-thuth@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20s390x: refactor error handling for MSCH handlerHalil Pasic3-33/+10
Simplify the error handling of the MSCH. Let the code detecting the condition tell (in a less ambiguous way) how it's to be handled. No changes in behavior. Signed-off-by: Halil Pasic <pasic@linux.vnet.ibm.com> Message-Id: <20171017140453.51099-8-pasic@linux.vnet.ibm.com> [CH: fix return code for fctl != 0] Reviewed-by: Dong Jia Shi <bjsdjshi@linux.vnet.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20s390x: refactor error handling for HSCH handlerHalil Pasic3-33/+10
Simplify the error handling of the HSCH. Let the code detecting the condition tell (in a less ambiguous way) how it's to be handled. No changes in behavior. Signed-off-by: Halil Pasic <pasic@linux.vnet.ibm.com> Message-Id: <20171017140453.51099-7-pasic@linux.vnet.ibm.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Dong Jia Shi <bjsdjshi@linux.vnet.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20s390x: refactor error handling for CSCH handlerHalil Pasic3-20/+8
Simplify the error handling of the CSCH. Let the code detecting the condition tell (in a less ambiguous way) how it's to be handled. No changes in behavior. Signed-off-by: Halil Pasic <pasic@linux.vnet.ibm.com> Message-Id: <20171017140453.51099-6-pasic@linux.vnet.ibm.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Dong Jia Shi <bjsdjshi@linux.vnet.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20s390x: refactor error handling for XSCH handlerHalil Pasic3-32/+10
Simplify the error handling of the XSCH. Let the code detecting the condition tell (in a less ambiguous way) how it's to be handled. No changes in behavior. Signed-off-by: Halil Pasic <pasic@linux.vnet.ibm.com> Message-Id: <20171017140453.51099-5-pasic@linux.vnet.ibm.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Dong Jia Shi <bjsdjshi@linux.vnet.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20s390x: improve error handling for SSCH and RSCHHalil Pasic6-126/+75
Simplify the error handling of the SSCH and RSCH handler avoiding arbitrary and cryptic error codes being used to tell how the instruction is supposed to end. Let the code detecting the condition tell how it's to be handled in a less ambiguous way. It's best to handle SSCH and RSCH in one go as the emulation of the two shares a lot of code. For passthrough this change isn't pure refactoring, but changes the way kernel reported EFAULT is handled. After clarifying the kernel interface we decided that EFAULT shall be mapped to unit exception. Same goes for unexpected error codes and absence of required ORB flags. Signed-off-by: Halil Pasic <pasic@linux.vnet.ibm.com> Message-Id: <20171017140453.51099-4-pasic@linux.vnet.ibm.com> Tested-by: Dong Jia Shi <bjsdjshi@linux.vnet.ibm.com> [CH: cosmetic changes] Reviewed-by: Dong Jia Shi <bjsdjshi@linux.vnet.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20s390x/css: IO instr handler ending controlHalil Pasic1-0/+16
CSS code needs to tell the IO instruction handlers located in ioinst.c how the emulated instruction should be ended. Currently this is done by returning generic (POSIX) error codes, and mapping them to outcomes like condition codes. This makes bugs easy to create and hard to recognize. As a preparation for moving away from (mis)using generic error codes for flow control let us introduce a type which tells the instruction handler function how to end the instruction, in a more straight-forward and less ambiguous way. Signed-off-by: Halil Pasic <pasic@linux.vnet.ibm.com> Message-Id: <20171017140453.51099-3-pasic@linux.vnet.ibm.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Dong Jia Shi <bjsdjshi@linux.vnet.ibm.com> [CH: cosmetic changes] Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20s390x: move s390x_new_cpu() into board codeIgor Mammedov3-21/+21
s390-virtio-ccw.c is the sole user of s390x_new_cpu(), so move this helper there. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <1508253203-119237-1-git-send-email-imammedo@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20s390x: fix cpu object referrence leak in s390x_new_cpu()Igor Mammedov1-1/+1
object_new() returns cpu with refcnt == 1 and after realize refcnt == 2*. s390x_new_cpu() as an owner of the first refcnt should have released it on exit in both cases (on error and success) to avoid it leaking. Do so for both cases. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <1508247680-98800-2-git-send-email-imammedo@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20s390x/event-facility: variable-length event masksCornelia Huck2-10/+45
The architecture supports masks of variable length for sclp write event mask. We currently only support 4 byte event masks, as that is what Linux uses. Let's extend this to the maximum mask length supported by the architecture and return 0 to the guest for the mask bits we don't support in core. Initial patch by: Cornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by: Jason J. Herne <jjherne@linux.vnet.ibm.com> Message-Id: <1507729193-9747-1-git-send-email-jjherne@linux.vnet.ibm.com> Acked-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20s390x/MAINTAINERS: add mailing listCornelia Huck1-0/+6
There's a new qemu-s390x@nongnu.org mailing list: add it to the s390 sections. Reviewed-by: Thomas Huth <thuth@redhat.com> Acked-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20virtio-ccw: Add the virtio-input devices for CCW busFarhan Ali2-0/+122
Wire up the virtio-input HID devices (keyboard, mouse, tablet) for the CCW bus. The virtio-input is a virtio-1 device, so disable legacy revision 0. Signed-off-by: Farhan Ali <alifm@linux.vnet.ibm.com> Reviewed-by: Halil Pasic <pasic@linux.vnet.ibm.com> Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> Message-Id: <6a8ea4c503ee32c2ca7fa608b5f2f547009be8ee.1507557166.git.alifm@linux.vnet.ibm.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20target/s390x: special handling when starting a CPU with WAIT PSWDavid Hildenbrand2-3/+14
When we try to start a CPU with a WAIT PSW, we have to take care that TCG will actually try to continue executing instructions. We must therefore really only unhalt the CPU if we don't have a WAIT PSW. Also document the special order for restart interrupts, which load a new PSW and change the state to operating. To keep KVM working, simply don't have a look at the WAIT bit when loading the PSW. Otherwise the behavior of a restart interrupt when a CPU stopped would be changed. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-31-david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20s390x/tcg: refactor stfl(e) to use s390_get_feat_block()David Hildenbrand2-39/+29
Refactor it to use s390_get_feat_block(). Directly write into the mapped lowcore with stfl and make sure it is really only compiled if needed. While at it, add an alignment check for STFLE and avoid potential_page_fault() by properly restoring the CPU state. Due to s390_get_feat_block(), we will now also indicate the "Configuration-z-architectural-mode", which is with new SIGP code the right thing to do. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-30-david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20s390x/tcg: unlock NMIDavid Hildenbrand2-8/+1
Nothing hindering us anymore from unlocking the restart code (used for NMI). Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-29-david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20s390x/cpumodel: allow to enable SENSE RUNNING STATUS for qemuDavid Hildenbrand1-0/+1
As we properly implement it, allow to enable it. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-28-david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
generated by cgit v1.2.1 (git 2.18.0) at 2024-07-06 19:50:03 +0000