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2012-03-07cadence_uart: initial version of device modelPeter A. G. Crosthwaite1-0/+1
Implemented cadence UART serial controller Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com> Signed-off-by: John Linn <john.linn@xilinx.com> Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2012-03-05microblaze: factored out common boot codePeter A. G. Crosthwaite1-0/+1
factored out the copy-pasted common boot code from the two microblaze platforms into a dedicated microblaze bootloader (microblaze_boot.o). Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2012-03-03Merge branch 'arm-devs.for-upstream' of ↵Blue Swirl1-0/+1
git://git.linaro.org/people/pmaydell/qemu-arm * 'arm-devs.for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm: hw/arm11mpcore: Fix broken realview_mpcore/arm11mpcore_priv properties arm: add device tree support arm: make sure that number of irqs can be represented in GICD_TYPER. arm: clean up GIC constants
2012-03-02arm: add device tree supportGrant Likely1-0/+1
If compiled with CONFIG_FDT, allow user to specify a device tree file using the -dtb argument. If the machine supports it then the dtb will be loaded into memory and passed to the kernel on boot. Signed-off-by: Jeremy Kerr <jeremy.kerr@canonical.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca> [Peter Maydell: Use machine opt rather than global to pass dtb filename] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-03-01Merge remote-tracking branch 'qemu-kvm/uq/master' into stagingAnthony Liguori1-1/+2
* qemu-kvm/uq/master: pc-bios: update kvmvapic.bin kvmvapic: Use optionrom helpers optionsrom: Reserve space for checksum kvmvapic: Simplify mp/up_set_tpr kvmvapic: Introduce TPR access optimization for Windows guests kvmvapic: Add option ROM target-i386: Add infrastructure for reporting TPR MMIO accesses Allow to use pause_all_vcpus from VCPU context Process pending work while waiting for initial kick-off in TCG mode Remove useless casts from cpu iterators kvm: Set cpu_single_env only once kvm: Synchronize cpu state in kvm_arch_stop_on_emulation_error()
2012-02-24Merge remote-tracking branch 'bonzini/virtio-scsi' into stagingAnthony Liguori1-0/+1
* bonzini/virtio-scsi: scsi-block: always use scsi_generic_ops for cache != none scsi: fix searching for an empty id scsi: fix wrong return for target INQUIRY virtio-scsi: add migration support virtio-scsi: process control queue requests virtio-scsi: add basic SCSI bus operation virtio-scsi: Add basic request processing infrastructure virtio-scsi: Add virtio-scsi stub device scsi-disk: add migration support scsi-generic: add migration support scsi: add SCSIDevice vmstate definitions scsi-disk: enable scatter/gather functionality scsi: add scatter/gather functionality scsi: pass residual amount to command_complete ahci: use new DMA helpers dma-helpers: add accounting wrappers dma-helpers: add dma_buf_read and dma_buf_write dma-helpers: make QEMUSGList target independent
2012-02-22jazz-led: compile it only twiceHervé Poussineau1-1/+0
Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-22hw/pc: move rom init to pc_sysfw.cJordan Justen1-0/+1
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-22virtio-scsi: Add virtio-scsi stub deviceStefan Hajnoczi1-0/+1
Add a useless virtio SCSI HBA device: qemu -device virtio-scsi-pci Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com> Reviewed-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-02-18kvmvapic: Introduce TPR access optimization for Windows guestsJan Kiszka1-1/+2
This enables acceleration for MMIO-based TPR registers accesses of 32-bit Windows guest systems. It is mostly useful with KVM enabled, either on older Intel CPUs (without flexpriority feature, can also be manually disabled for testing) or any current AMD processor. The approach introduced here is derived from the original version of qemu-kvm. It was refactored, documented, and extended by support for user space APIC emulation, both with and without KVM acceleration. The VMState format was kept compatible, so was the ABI to the option ROM that implements the guest-side para-virtualized driver service. This enables seamless migration from qemu-kvm to upstream or, one day, between KVM and TCG mode. The basic concept goes like this: - VAPIC PV interface consisting of I/O port 0x7e and (for KVM in-kernel irqchip) a vmcall hypercall is registered - VAPIC option ROM is loaded into guest - option ROM activates TPR MMIO access reporting via port 0x7e - TPR accesses are trapped and patched in the guest to call into option ROM instead, VAPIC support is enabled - option ROM TPR helpers track state in memory and invoke hypercall to poll for pending IRQs if required Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Avi Kivity <avi@redhat.com>
2012-02-17hw/a15mpcore.c: Add Cortex-A15 private peripheral modelPeter Maydell1-1/+1
Add a model of the Cortex-A15 memory mapped private peripheral space. This is fairly simple because the only memory mapped bit of the A15 is the GIC. Note that we don't currently model a VGIC and therefore don't map the VGIC related bits of the GIC. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-02-17Exynos4210: added display controller implementationMitsyanko Igor1-1/+1
Exynos4210 display controller (FIMD) has 5 hardware windows with alpha and chroma key blending functions. Signed-off-by: Mitsyanko Igor <i.mitsyanko@samsung.com> Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-02-17ARM: exynos4210: MCT support.Evgeny Voevodin1-1/+1
Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-02-17ARM: exynos4210: basic Power Management Unit implementationMaksim Kozlov1-0/+1
Patch adds basic model for Exynos4210 SoC PMU. This model implements PMU registers just as a bulk of memory. Currently, the only reason this device exists is that secondary CPU boot loader uses PMU INFORM5 register as a holding pen. Signed-off-by: Maksim Kozlov <m.kozlov@samsung.com> Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-02-17ARM: exynos4210: PWM support.Evgeny Voevodin1-1/+1
Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-02-17ARM: exynos4210: UART supportMaksim Kozlov1-1/+1
Add basic support of exynos4210 UART Signed-off-by: Maksim Kozlov <m.kozlov@samsung.com> Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-02-17ARM: Samsung exynos4210-based boards emulationEvgeny Voevodin1-1/+2
Add initial support of NURI and SMDKC210 boards Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-02-17ARM: exynos4210: IRQ subsystem support.Evgeny Voevodin1-0/+1
Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-02-09make: Remove duplicate use of GLIB_CFLAGSStefan Weil1-1/+0
Makefile, Makefile.hw, Makefile.target and libcacard/Makefile added GLIB_CFLAGS to QEMU_CFLAGS. Makefile.objs does this, too, and is included by all other Makefiles, so GLIB_CFLAGS were added twice (reported by malc). Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: malc <av1474@comtv.ru>
2012-02-07w32: Build windows and console executablesStefan Weil1-1/+15
System emulation executables with SDL are typically windows executables. Sometimes console executables are more useful, so create both variants if linker option -mwindows was detected. v2: This version uses QEMU_PROGW / QEMU_PROG instead of QEMU_PROG / QEMU_PROGC. Signed-off-by: Stefan Weil <sw@weilnetz.de>
2012-01-27qom: add the base Object class (v2)Anthony Liguori1-0/+2
This class provides the main building block for QEMU Object Model and is extensively documented in the header file. It is largely inspired by GObject. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> --- v1 -> v2 - remove printf() in type registration - fix typo in comment (Paolo) - make Interface private - move object into a new directory and move header into include/qemu/ - don't make object.h depend on qemu-common.h - remove Type and replace it with TypeImpl * (Paolo) - use hash table to store types (Paolo) - aggressively cache parent type (Paolo) - make a type_register and use it with interfaces (Paolo) - fix interface cast comment (Paolo) - add a few more functions required in later series
2012-01-26arm: SoC model for Calxeda HighbankRob Herring1-0/+1
Adds support for Calxeda's Highbank SoC. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-01-26Add xgmac ethernet modelRob Herring1-0/+1
This adds very basic support for the xgmac ethernet core. Missing things include: - statistics counters - WoL support - rx checksum offload - chained descriptors (only linear descriptor ring) - broadcast and multicast handling Signed-off-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-01-25vga: compile cirrus_vga in hwlibBlue Swirl1-1/+0
Remove target dependencies and compile Cirrus VGA in hwlib. Address masking can be removed since memory API handles that now. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-01-23hyperv: fix build on non-KVM hostsBlue Swirl1-1/+1
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-01-23Merge remote-tracking branch 'qemu-kvm/uq/master' into stagingAnthony Liguori1-3/+5
* qemu-kvm/uq/master: kvm: Activate in-kernel irqchip support kvm: x86: Add user space part for in-kernel IOAPIC kvm: x86: Add user space part for in-kernel i8259 kvm: x86: Add user space part for in-kernel APIC kvm: x86: Establish IRQ0 override control kvm: Introduce core services for in-kernel irqchip support memory: Introduce memory_region_init_reservation ioapic: Factor out base class for KVM reuse ioapic: Drop post-load irr initialization i8259: Factor out base class for KVM reuse i8259: Completely privatize PicState apic: Open-code timer save/restore apic: Factor out base class for KVM reuse apic: Introduce apic_report_irq_delivered apic: Inject external NMI events via LINT1 apic: Stop timer on reset kvm: Move kvmclock into hw/kvm folder msi: Generalize msix_supported to msi_supported hyper-v: initialize Hyper-V CPUID leaves. hyper-v: introduce Hyper-V support infrastructure. Conflicts: Makefile.target Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-01-22vga: make Cirrus ISA device optionalBlue Swirl1-9/+4
Reviewed-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-01-21PPC: Bamboo: fold ppc440.c and ppc440_bamboo.c into a single fileAlexander Graf1-1/+1
The separation of ppc440 and ppc440_bamboo makes some sense, since ppc440 is the SoC while ppc440_bamboo is the actual board. But the separation makes things harder for us for no good reason, so let's just fold them in together with each other. Signed-off-by: Alexander Graf <agraf@suse.de>
2012-01-19kvm: x86: Add user space part for in-kernel IOAPICJan Kiszka1-1/+1
This introduces the KVM-accelerated IOAPIC model 'kvm-ioapic' and extends the IRQ routing setup by the 0->2 redirection when needed. The kvm-ioapic model has a property that allows to define its GSI base for injecting interrupts into the kernel model. This will allow to disentangle PIC and IOAPIC pins for chipsets that support more sophisticated IRQ routes than the PIIX3. So far the base is kept at 0, i.e. PIC and IOAPIC share pins 0..15. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2012-01-19kvm: x86: Add user space part for in-kernel i8259Jan Kiszka1-1/+1
Introduce the alternative 'kvm-i8259' device model that exploits KVM in-kernel acceleration. The PIIX3 initialization code is furthermore extended by KVM specific IRQ route setup. GSI injection differs in KVM mode from the user space model. As we can dispatch ISA-range IRQs to both IOAPIC and PIC inside the kernel, we do not need to inject them separately. This is reflected by a KVM-specific GSI handler. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2012-01-19kvm: x86: Add user space part for in-kernel APICJan Kiszka1-1/+1
This introduces the alternative APIC device which makes use of KVM's in-kernel device model. External NMI injection via LINT1 is emulated by checking the current state of the in-kernel APIC, only injecting a NMI into the VCPU if LINT1 is unmasked and configured to DM_NMI. MSI is not yet supported, so we disable this when the in-kernel model is in use. CC: Lai Jiangshan <laijs@cn.fujitsu.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2012-01-19ioapic: Factor out base class for KVM reuseJan Kiszka1-1/+1
Split up the IOAPIC analogously to APIC and i8259. KVM will share the IOAPICCommonState, the vmstate, reset logic and certain init parts with the user space model. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2012-01-19apic: Factor out base class for KVM reuseJan Kiszka1-1/+1
The KVM in-kernel APIC model will reuse parts of the user space model while providing the same frontend view to guest and most management interfaces. Factor out an APIC base class to encapsulate those parts that will be shared by user space and KVM model. This class offers callback hooks for init, base/tpr setting, and the external NMI delivery that will be set via APICCommonInfo structure and implemented specifically in the subclasses. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2012-01-19kvm: Move kvmclock into hw/kvm folderJan Kiszka1-2/+2
More KVM-specific devices will come, so let's start with moving the kvmclock into a dedicated folder. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2012-01-19hyper-v: introduce Hyper-V support infrastructure.Vadim Rozenfeld1-0/+2
[Jan: fix build with CONFIG_USER_ONLY] Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2012-01-10Merge branch 's390-next' of git://repo.or.cz/qemu/agrafAurelien Jarno1-1/+4
* 's390-next' of git://repo.or.cz/qemu/agraf: s390: fix cpu hotplug / cpu activity on interrupts s390x: add TR function for EXECUTE Expose drive_add on all architectures Add generic drive hotplugging Compile device-hotplug on all targets [S390] Add hotplug support
2012-01-04Merge remote-tracking branch 'pmaydell/arm-devs.for-upstream' into stagingAnthony Liguori1-0/+1
* pmaydell/arm-devs.for-upstream: add L2x0/PL310 cache controller device arm: add dummy gic security registers arm: Set frequencies for arm_timer arm: add missing scu registers hw/omap_gpmc: Fix region map/unmap when configuring prefetch engine hw/omap1.c: Drop unused includes hw/omap1.c: Separate dpll_ctl from omap_mpu_state hw/omap1.c: Separate PWT from omap_mpu_state hw/omap1.c: Separate PWL from omap_mpu_state hw/omap1.c: omap_mpuio_init() need not be public hw/pl110.c: Add post-load hook to invalidate display hw/pl181.c: Add save/load support
2012-01-04add L2x0/PL310 cache controller deviceRob Herring1-0/+1
This is just a dummy device for ARM L2 cache controllers, based on the pl310. The cache type parameter can be defined by a property value and has a meaningful default. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com> [Peter Maydell: removed stray blank line at end] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-01-04vmstate, memory: decouple vmstate from memory APIAvi Kivity1-1/+1
Currently creating a memory region automatically registers it for live migration. This differs from other state (which is enumerated in a VMStateDescription structure) and ties the live migration code into the memory core. Decouple the two by introducing a separate API, vmstate_register_ram(), for registering a RAM block for migration. Currently the same implementation is reused, but later it can be moved into a separate list, and registrations can be moved to VMStateDescription blocks. Signed-off-by: Avi Kivity <avi@redhat.com>
2012-01-04Compile device-hotplug on all targetsAlexander Graf1-1/+4
All guest targets could potentially implement hotplugging. With the next patches in this set I will also reflect this in the monitor interface. So let's always compile it in. It shouldn't hurt. Signed-off-by: Alexander Graf <agraf@suse.de>
2011-12-16Makefile.target: Remove unnecessary dependency rulesPeter Maydell1-6/+0
Remove some dependency rules which aren't necessary (the automatically generated .d files cover all these). These were leftovers from dyngen days, when the object files also had a dependency on some generated files. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-12-14Merge remote-tracking branch 'stefanha/trivial-patches-next' into stagingAnthony Liguori1-2/+0
2011-12-12syborg: drop support for Symbian Virtual PlatformStefan Hajnoczi1-3/+0
The Symbian Virtual Platform was an ARM-based development and debugging board. Since Symbian has been disbanded and the code is no longer being used it can now be removed. Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-12-12hw/arm_mptimer.c: Turn ARM MPcore private timers into qdev devicesPeter Maydell1-0/+1
Turn the ARM MPcore private timer/watchdog blocks into separate qdev devices. This will allow us to share them neatly between 11MPCore and A9MPcore. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2011-12-09Makefile.target: Remove out of date commentChen Wei-Ren1-2/+0
Remove the out of date comment, i.e., "# libqemu" since libqemu.a is not available anymore. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Chen Wei-Ren <chenwj@iis.sinica.edu.tw> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-11-02Merge branch 'tci' of git://qemu.weilnetz.de/qemuBlue Swirl1-0/+4
* 'tci' of git://qemu.weilnetz.de/qemu: tcg: Add tcg interpreter to configure / make tcg: Add tci disassembler tcg: Add interpreter for bytecode tcg: Add bytecode generator for tcg interpreter tcg: Make ARRAY_SIZE(tcg_op_defs) globally available tcg: TCG targets may define tcg_qemu_tb_exec
2011-11-01Merge branch 'ppc-next' of git://repo.or.cz/qemu/agrafBlue Swirl1-0/+1
* 'ppc-next' of git://repo.or.cz/qemu/agraf: (24 commits) pseries: Add partial support for PCI ppc: Alter CPU state to mask out TCG unimplemented instructions as appropriate pseries: Allow writes to KVM accelerated TCE table KVM: PPC: Override host vmx/vsx/dfp only when information known ppc: Fix up usermode only builds pseries: Correct vmx/dfp handling in both KVM and TCG cases PPC: Fail configure when libfdt is not available ppc: Avoid decrementer related kvm exits PPC: Disable non-440 CPUs for ppcemb target PPC: Bump qemu-system-ppc to 64-bit physical address space pseries: Under kvm use guest cpu = host cpu by default ppc: Add cpu defs for POWER7 revisions 2.1 and 2.3 ppc: First cut implementation of -cpu host ppc: Remove broken partial PVR matching pseries: Update SLOF firmware image pseries: Add device tree properties for VMX/VSX and DFP under kvm ppc: Generalize the kvmppc_get_clockfreq() function Set an invalid-bits mask for each SPE instructions pseries: Update SLOF firmware image pseries: Use Book3S-HV TCE acceleration capabilities ...
2011-10-31tcg: Add tcg interpreter to configure / makeStefan Weil1-0/+4
Signed-off-by: Stefan Weil <sw@weilnetz.de>
2011-10-31Add AACI audio playback support to the ARM Versatile/PB platformMathieu Sonet1-0/+1
This driver emulates the ARM AACI interface (PL041) connected to a LM4549 codec. It enables audio playback for the Versatile/PB platform. Limitations: - Supports only a playback on one channel (Versatile/Vexpress) - Supports only one TX FIFO in compact-mode or non-compact mode. - Supports playback of 12, 16, 18 and 20 bits samples. - Record is not supported. - The PL041 is hardwired to a LM4549 codec. Versatile/PB test build: linux-2.6.38.5 buildroot-2010.11 alsa-lib-1.0.22 alsa-utils-1.0.22 mpg123-0.66 Qemu host: Ubuntu 10.04 in Vmware/OS X Playback tested successfully with speaker-test/aplay/mpg123. Signed-off-by: Mathieu Sonet <contact@elasticsheep.com> [Peter Maydell: fixed typo in code clearing SL1RXBUSY/SL2RXBUSY bits, as spotted by Andrzej Zaborowski] Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
2011-10-31pseries: Add partial support for PCIDavid Gibson1-0/+1
This patch adds a PCI bus to the pseries machine. This instantiates the qemu generic PCI bus code, advertises a PCI host bridge in the guest's device tree and implements the RTAS methods specified by PAPR to access PCI config space. It also sets up the memory regions we need to provide windows into the PCI memory and IO space, and advertises those to the guest. However, because qemu can't yet emulate an IOMMU, which is mandatory on pseries, PCI devices which use DMA (i.e. most of them) will not work with this code alone. Still, this is enough to support the virtio_pci device (which probably _should_ use emulated PCI DMA, but is specced to use direct hypervisor access to guest physical memory instead). [agraf] remove typedef which could cause compile errors Signed-off-by: Alexey Kardashevskiy <aik@au1.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
generated by cgit v1.2.1 (git 2.18.0) at 2024-06-02 01:39:37 +0000