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path: root/cpu-defs.h
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2008-07-01Move interrupt_request and user_mode_only to common cpu state.pbrook1-1/+4
Save and restore env->interrupt_request and env->halted. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4817 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-29Add instruction counter.pbrook1-6/+28
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4799 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-09Clean up MMIO TLB handling.pbrook1-5/+7
The IO index is now stored in its own field, instead of being wedged into the vaddr field. This eliminates the ROMD and watchpoint host pointer weirdness. The IO index space is expanded by 1 bit, and several additional bits are made available in the TLB vaddr field. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4704 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-07Multithreaded locking fixes.pbrook1-0/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4692 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-29Push common interrupt variables to cpu-defs.h (Glauber Costa)bellard1-0/+4
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4612 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-28moved halted field to CPU_COMMONbellard1-0/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4609 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-27Use correct types to enable > 2G support, based on a patch fromaurel321-3/+0
Anthony Liguori. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4265 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-22Revert "Use correct types to enable > 2G support" (r4238), it isaurel321-0/+3
not yet ready. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4240 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-22Use correct types to enable > 2G support, based on a patch fromaurel321-3/+0
Anthony Liguori. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4238 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-08Use a common constant for temp_buf sizeblueswir11-1/+3
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4176 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-01use the TCG code generatorbellard1-0/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3944 c046a42c-6fe2-441c-8c8c-71466251a162
2008-01-31use simpler REGPARM convention - make CPUTLBEntry size a power of twobellard1-0/+16
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3935 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-09Handle cpu_model in copy_cpu(), by Kirill A. Shutemov.ths1-1/+3
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3778 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-17Break up vl.h.pbrook1-0/+4
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3674 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-28Implement missing MIPS supervisor mode bits.ths1-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3472 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-14Replace is_user variable with mmu_idx in softmmu core,j_mayer1-9/+0
allowing support of more than 2 mmu access modes. Add backward compatibility is_user variable in targets code when needed. Implement per target cpu_mmu_index function, avoiding duplicated code and #ifdef TARGET_xxx in softmmu core functions. Implement per target mmu modes definitions. As an example, add PowerPC hypervisor mode definition and Alpha executive and kernel modes definitions. Optimize PowerPC case, precomputing mmu_idx when MSR register changes and using the same definition in code translation code. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3384 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-19TARGET_FMT_lu may also be useful.j_mayer1-0/+2
Fix compilation warnings. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3190 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-16find -type f | xargs sed -i 's/[\t ]$//g' # on most filesths1-7/+7
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-26Fix writes to pages containing watchpoints for the RAM not at 0x0 cases.balrog1-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3025 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-14Add TARGET_FMT_plx to properly display target_phys_addr_t variables.j_mayer1-0/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2660 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-05Infrastructure to support more than 2 MMU modes.j_mayer1-1/+10
Add example for Alpha and PowerPC hypervisor mode. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2596 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-04TARGET_FMT_ld may also be useful for debugging purposes.j_mayer1-0/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2593 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-16Watchpoint support (previous commit got eaten by Savannah server crash).pbrook1-0/+8
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2479 c046a42c-6fe2-441c-8c8c-71466251a162
2006-11-12Speed up tlb_flush_page (Daniel Jacobowitz).pbrook1-0/+8
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2210 c046a42c-6fe2-441c-8c8c-71466251a162
2006-06-25C99 64 bit printfbellard1-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2018 c046a42c-6fe2-441c-8c8c-71466251a162
2005-11-28PAGE_EXEC support in TLBsbellard1-4/+6
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1676 c046a42c-6fe2-441c-8c8c-71466251a162
2005-11-23better halted state supportbellard1-2/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1652 c046a42c-6fe2-441c-8c8c-71466251a162
2005-11-21SMP supportbellard1-2/+3
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1640 c046a42c-6fe2-441c-8c8c-71466251a162
2005-11-20added CPU_COMMON and CPUState.tb_jmp_cache[]bellard1-0/+29
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1630 c046a42c-6fe2-441c-8c8c-71466251a162
2005-08-21ram_addr_t type for ram offsetsbellard1-0/+3
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1542 c046a42c-6fe2-441c-8c8c-71466251a162
2005-07-02simplified PowerPC exception handling (Jocelyn Mayer)bellard1-3/+3
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1492 c046a42c-6fe2-441c-8c8c-71466251a162
2005-06-05added HOST_LONG_BITS in configurebellard1-6/+0
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1457 c046a42c-6fe2-441c-8c8c-71466251a162
2005-01-0364 bit target supportbellard1-0/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1189 c046a42c-6fe2-441c-8c8c-71466251a162
2004-04-26amd64 port (Jocelyn Mayer)bellard1-9/+17
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@762 c046a42c-6fe2-441c-8c8c-71466251a162
2004-04-25added target_phys_addr_tbellard1-0/+15
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@756 c046a42c-6fe2-441c-8c8c-71466251a162
2004-03-21do not depend on thunk.h - more log itemsbellard1-0/+8
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@675 c046a42c-6fe2-441c-8c8c-71466251a162
2004-02-16use osdep.hbellard1-0/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@626 c046a42c-6fe2-441c-8c8c-71466251a162
2004-01-24correct target_ulong definitionbellard1-0/+16
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@582 c046a42c-6fe2-441c-8c8c-71466251a162
2003-10-27commentsbellard1-2/+9
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@405 c046a42c-6fe2-441c-8c8c-71466251a162
2003-08-10soft mmu supportbellard1-0/+39
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@349 c046a42c-6fe2-441c-8c8c-71466251a162