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2008-07-17Support for address maskingblueswir11-2/+3
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4882 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-08Fix r4641 (invalid token "=<" in a preprocessor expression)blueswir11-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4859 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-03Convert remaining __builtin_expect to likely/unlikely, by Jan Kiszka.ths1-3/+3
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4840 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-30Spelling fixes, spotted by Stuart Brady.ths1-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4809 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-29Add instruction counter.pbrook1-30/+63
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4799 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-27More efficient target register / TC accesses.ths1-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4794 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-09CRIS: Emulate NMIs.edgar_igl1-1/+9
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4719 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-07Multithreaded locking fixes.pbrook1-14/+11
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4692 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-06CRIS: Add the P flag to the tb dependent flags.edgar_igl1-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4685 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-04reworked SVM interrupt handling logic - fixed vmrun EIP saved value - ↵bellard1-44/+45
reworked cr8 handling - added CPUState.hflags2 git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4662 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-02Restore ARM signal handler compilation on glibc < 2.5 (Blue Swirl).balrog1-0/+4
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4641 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-29Remove unused (for now) reg_REGWPTR (original patch by Glauber Costa)blueswir11-13/+0
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4617 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-28SVM reworkbellard1-1/+0
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4605 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-27removed unused codebellard1-7/+0
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4598 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-27CRIS: Re-add the X flag to the tb flags, it allows for better code ↵edgar_igl1-1/+1
generation and is practially always cleared. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4597 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-27Move non-op functions from op_helper.c to helper.c and vice versa.blueswir11-2/+3
Rearrange interrupt handling to match other targets. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4590 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-19Fix Sparc32 compilation broken by r4484blueswir11-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4499 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-18Fix Sparc64 host signal handlingblueswir11-5/+10
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4484 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-17Improved workaround for the annoying glibc global register mangling bugblueswir11-47/+11
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4465 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-15Always process real timers regardless of singlestep mode (Jason Wessel).edgar_igl1-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4462 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-14Fix compilation on Sparc host, implement ld and stblueswir11-5/+0
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4457 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-13CRIS: Improve TLB management and handle delayslots at page boundaries.edgar_igl1-0/+1
* Dont flush the entire qemu tlb when the $pid changes. Instead we go through the guests TLB and choose entries that need to be flushed. * Add env->dslot and handle delayslots at pageboundaries. * Remove some unused code. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4450 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-12use new helper namebellard1-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4448 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-12the double/triple fault handling was not tested in user mode.bellard1-0/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4435 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-10initial global prologue/epilogue implementationbellard1-62/+3
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4407 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-10Fix compiler warnings in common filesblueswir11-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4405 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-09Debugger single step without interrupts (Jason Wessel).edgar_igl1-1/+1
This patch allows the qemu backend debugger to single step an instruction without running the hardware interrupts. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4391 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-07CRIS: Remove X flag from tb flags.edgar_igl1-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4378 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-06Fix signal handler compilation on __arm__.balrog1-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4359 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-04Fix crash due to invalid env->current_tb (Adam Lackorzynski, Paul Brook, me)blueswir11-24/+44
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4317 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-03CRIS: Reduce the number of tb dependent flags.edgar_igl1-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4305 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-02CRIS updates:edgar_igl1-1/+1
* Support both the I and D MMUs and improve the accuracy of the MMU model. * Handle the automatic user/kernel stack pointer switching when leaving or entering user mode. * Move the CCS evaluation into helper funcs. * Make sure user-mode cannot change flags only writeable in kernel mode. * More conversion of the translator into TCG. * Handle exceptions while in a delayslot. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4299 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-13x86: Introduce CPU_INTERRUPT_NMIaurel321-0/+6
(Jan Kiszka) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4205 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-12HPPA (PA-RISC) host supportaurel321-0/+29
(Stuart Brady) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4199 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-11Fix compiler warningsaurel321-0/+4
(Stefan Weil) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4188 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-14* Add a model of the ETRAX interrupt controller.edgar_igl1-5/+0
* Clean up the interrupt handling a bit. * Connect some NOR flash to the test board. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4055 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-01reverted -translation option supportbellard1-62/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3947 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-01use the TCG code generatorbellard1-2/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3944 c046a42c-6fe2-441c-8c8c-71466251a162
2008-01-23Add option to disable TB cache, by Herve Poussineau.ths1-1/+61
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3930 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-11 Partial fix to Sparc32 Linux host global register mangling problemblueswir11-22/+52
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3806 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-11 Fix code generation buffer overflow reported by TeLeManblueswir11-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3805 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-02SH4: system emulator interrupt update, by Magnus Damm.ths1-1/+4
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3762 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-02SH4 delay slot code update, by Magnus Damm.ths1-2/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3761 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-23Fix TB chaining for exceptions.pbrook1-35/+17
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3721 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-11consistent types for cpu_x86_fsave and cpu_x86_frstorbellard1-4/+4
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3621 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-11removed warningbellard1-2/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3617 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-11ARMv7 support.pbrook1-1/+12
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3572 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-08removed obsolete x86 code copy supportbellard1-121/+5
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3551 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-07 CPU specific boot mode (Robert Reif)blueswir11-4/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3542 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-14Replace is_user variable with mmu_idx in softmmu core,j_mayer1-10/+9
allowing support of more than 2 mmu access modes. Add backward compatibility is_user variable in targets code when needed. Implement per target cpu_mmu_index function, avoiding duplicated code and #ifdef TARGET_xxx in softmmu core functions. Implement per target mmu modes definitions. As an example, add PowerPC hypervisor mode definition and Alpha executive and kernel modes definitions. Optimize PowerPC case, precomputing mmu_idx when MSR register changes and using the same definition in code translation code. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3384 c046a42c-6fe2-441c-8c8c-71466251a162
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