summaryrefslogtreecommitdiff
path: root/hw/arm/xlnx-zynqmp.c
AgeCommit message (Expand)AuthorFilesLines
2016-01-13error: Strip trailing '\n' from error string arguments (again)Markus Armbruster1-1/+1
2015-10-29target-arm: xlnx-zynqmp: Add sdhci support.Sai Pavan Boddu1-0/+28
2015-10-09qdev: Protect device-list-properties against broken devicesMarkus Armbruster1-0/+6
2015-09-18Fix bad error handling after memory_region_init_ram()Markus Armbruster1-1/+1
2015-09-14xlnx-zynqmp: Remove unnecessary brackets around error messagesAlistair Francis1-5/+5
2015-09-08xlnx-zynqmp: Connect the sysbus AHCI to ZynqMPAlistair Francis1-0/+18
2015-09-08xlnx-zynqmp.c: Convert some of the error_propagate() calls to error_abortAlistair Francis1-12/+2
2015-08-25xlnx-zynqmp: Connect the four OCM banksAlistair Francis1-0/+15
2015-07-16arm/xlnx-zynqmp: fix memory leakGonglei1-0/+2
2015-06-19arm: xlnx-zynqmp: Add 2xCortexR5 CPUsPeter Crosthwaite1-0/+34
2015-06-19arm: xlnx-zynqmp: Add boot-cpu propertyPeter Crosthwaite1-1/+18
2015-06-19arm: xlnx-zynqmp: Preface CPU variables with "apu"Peter Crosthwaite1-12/+14
2015-05-18arm: xlnx-zynqmp: Add UART supportPeter Crosthwaite1-0/+24
2015-05-18arm: xlnx-zynqmp: Add GEM supportPeter Crosthwaite1-0/+35
2015-05-18arm: xlnx-zynqmp: Connect CPU Timers to GICPeter Crosthwaite1-0/+17
2015-05-18arm: xlnx-zynqmp: Add GICPeter Crosthwaite1-0/+59
2015-05-18arm: Introduce Xilinx ZynqMP SoCPeter Crosthwaite1-0/+76
generated by cgit v1.2.1 (git 2.18.0) at 2024-07-02 17:48:39 +0000