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2013-07-29musicpal: QOM cast cleanup mv88w8618_pic_stateAndreas Färber1-9/+14
Introduce a type constant, use QOM casts and rename the parent field. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-29musicpal: QOM cast cleanup for musicpal_lcd_stateAndreas Färber1-8/+16
Introduce a type constant, use QOM casts, rename the parent field and prepare for QOM realize. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-29musicpal: QOM cast cleanup for mv88w8618_eth_stateAndreas Färber1-8/+16
Introduce type constant and use QOM casts. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-29musicpal: Fix typo in name of local functionStefan Weil1-2/+2
The misspelling was spotted by Andreas Färber. Signed-off-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Jan Kiszka <jan.kiszka@web.de> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-29integratorcp: QOM cast cleanup for icp_pic_stateAndreas Färber1-18/+25
Introduce type constant and use QOM cast. Fix indentation. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-29integratorcp: QOM cast cleanup for integratorcm_stateAndreas Färber1-13/+20
Rename to IntegratorCMState, introduce type constant and use QOM cast. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-29highbank: QOM cast cleanup for HighbankRegsStateAndreas Färber1-5/+11
Add type constant and use QOM casts. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-29armv7m: QOM cast cleanup for BitBandStateAndreas Färber1-5/+11
Introduce TYPE_* constant and use QOM cast. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-22hw/arm: Use 'load_ramdisk()' for loading ramdisks w/ U-Boot headerSoren Brinkmann1-4/+10
The load_ramdisk function is used to load ramdisk featuring a U-Boot header. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1373323202-17083-3-git-send-email-soren.brinkmann@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-07-19vexpress: Add virtio-mmio transportsPeter Maydell1-0/+99
Add some virtio-mmio transports to the vexpress board model, together with a modify_dtb hook which adds them to the device tree so that the kernel will probe for them. We put them in a reserved area of the address map. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1373977512-28932-9-git-send-email-peter.maydell@linaro.org
2013-07-19vexpress: Make VEDBoardInfo extend arm_boot_infoPeter Maydell1-16/+15
Make the VEDBoardInfo struct extend arm_boot_info; this will allow us to get at the VEDBoardInfo information inside callbacks from arm/boot code. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1373977512-28932-8-git-send-email-peter.maydell@linaro.org
2013-07-19arm/boot: Allow boards to modify the FDT blobPeter Maydell1-0/+5
Add a callback hook in arm_boot_info to allow board models to modify the device tree blob if they need to. (The major expected use case is to add virtio-mmio nodes for virtio-mmio transports that exist in QEMU but not in the hardware.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1373977512-28932-7-git-send-email-peter.maydell@linaro.org
2013-07-19arm/boot: Use qemu_devtree_setprop_sized_cells()Peter Maydell1-21/+8
Replace the opencoded assembly of the reg property array for the /memory node with a call to qemu_devtree_setprop_sized_cells(). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1373977512-28932-3-git-send-email-peter.maydell@linaro.org
2013-07-15ARM/highbank: add support for Calxeda ECX-2000 / MidwayAndre Przywara1-5/+27
The Calxeda ECX-2000 chip (aka. Midway) is model-wise quite similar to the Highbank. The most prominent difference is the Cortex-A15 CPU core in it, together with the associated core peripherals. Add a new ARM machine type called "midway". Move the L2 cache controller device into the Highbank specific part, since Midway does not have (and need) it. Signed-off-by: Andre Przywara <andre.przywara@calxeda.com> Message-id: 1373026897-12085-3-git-send-email-andre.przywara@calxeda.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-07-15ARM/highbank: prepare for adding similar machinesAndre Przywara1-6/+23
To allow the modelling of machines similar to Calxeda Highbank, introduce a parameter to the init function and call it from a wrapper. This allows to tweak the definition for individual machines later on. Signed-off-by: Andre Przywara <andre.przywara@calxeda.com> Message-id: 1373026897-12085-2-git-send-email-andre.przywara@calxeda.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-07-15hw/arm/vexpress: Add alias for flash at address 0 on A15 boardPeter Maydell1-2/+17
The A15 Versatile Express board can remap a variety of things at address 0. We don't currently emulate the Serial Configuration Controller which is how the guest can control this remapping, but we can provide the initial default mapping of the first flash device into this space. In particular this allows QEMU to boot flash images such as UEFI which expect to include an exception vector table. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Grant Likely <grant.likely@linaro.org> Message-id: 1373374180-19884-1-git-send-email-peter.maydell@linaro.org
2013-07-10Merge remote-tracking branch 'afaerber/tags/qom-cpu-for-anthony' into stagingAnthony Liguori7-13/+12
QOM CPUState refactorings * Fix for OpenRISCCPU subclasses * Fix for gdbstub CPU selection * Move linux-user CPU functions into new header * CPUState part 10 refactoring: first_cpu, next_cpu, cpu_single_env et al. * Fix some targets to consistently inline TCG code generation * Centrally log CPU reset # gpg: Signature made Wed 10 Jul 2013 07:52:39 AM CDT using RSA key ID 3E7E013F # gpg: Can't check signature: public key not found # By Andreas Färber (41) and others # Via Andreas Färber * afaerber/tags/qom-cpu-for-anthony: (43 commits) cpu: Move reset logging to CPUState target-ppc: Change LOG_MMU_STATE() argument to CPUState target-i386: Change LOG_PCALL_STATE() argument to CPUState log: Change log_cpu_state[_mask]() argument to CPUState target-i386: Change do_smm_enter() argument to X86CPU target-i386: Change do_interrupt_all() argument to X86CPU target-xtensa: Change gen_intermediate_code_internal() arg to XtensaCPU target-unicore32: Change gen_intermediate_code_internal() signature target-sparc: Change gen_intermediate_code_internal() argument to SPARCCPU target-sh4: Change gen_intermediate_code_internal() argument to SuperHCPU target-s390x: Change gen_intermediate_code_internal() argument to S390CPU target-ppc: Change gen_intermediate_code_internal() argument to PowerPCCPU target-mips: Change gen_intermediate_code_internal() argument to MIPSCPU target-microblaze: Change gen_intermediate_code_internal() argument types target-m68k: Change gen_intermediate_code_internal() argument to M68kCPU target-lm32: Change gen_intermediate_code_internal() argument to LM32CPU target-i386: Change gen_intermediate_code_internal() argument to X86CPU target-cris: Change gen_intermediate_code_internal() argument to CRISCPU target-arm: Change gen_intermediate_code_internal() argument to ARMCPU target-alpha: Change gen_intermediate_code_internal() argument to AlphaCPU ...
2013-07-09cpu: Make first_cpu and next_cpu CPUStateAndreas Färber6-11/+11
Move next_cpu from CPU_COMMON to CPUState. Move first_cpu variable to qom/cpu.h. gdbstub needs to use CPUState::env_ptr for now. cpu_copy() no longer needs to save and restore cpu_next. Acked-by: Paolo Bonzini <pbonzini@redhat.com> [AF: Rebased, simplified cpu_copy()] Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-09cpu: Replace cpu_single_env with CPUState current_cpuAndreas Färber1-2/+1
Move it to qom/cpu.h. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-09Simplify -machine option queries with qemu_get_machine_opts()Markus Armbruster1-7/+1
The previous two commits fixed bugs in -machine option queries. I can't find fault with the remaining queries, but let's use qemu_get_machine_opts() everywhere, for consistency, simplicity and robustness. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-id: 1372943363-24081-7-git-send-email-armbru@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-08Merge remote-tracking branch 'mst/tags/for_anthony' into stagingAnthony Liguori2-3/+5
pci,misc enhancements This includes some pci enhancements: Better support for systems with multiple PCI root buses FW cfg interface for more robust pci programming in BIOS Minor fixes/cleanups for fw cfg and cross-version migration - because of dependencies with other patches Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Sun 07 Jul 2013 03:11:18 PM CDT using RSA key ID D28D5469 # gpg: Can't check signature: public key not found # By David Gibson (10) and others # Via Michael S. Tsirkin * mst/tags/for_anthony: pci: Fold host_buses list into PCIHostState functionality pci: Remove domain from PCIHostBus pci: Simpler implementation of primary PCI bus pci: Add root bus parameter to pci_nic_init() pci: Add root bus argument to pci_get_bus_devfn() pci: Replace pci_find_domain() with more general pci_root_bus_path() pci: Use helper to find device's root bus in pci_find_domain() pci: Abolish pci_find_root_bus() pci: Move pci_read_devaddr to pci-hotplug-old.c pci: Cleanup configuration for pci-hotplug.c pvpanic: fix fwcfg for big endian hosts pvpanic: initialization cleanup MAINTAINERS: s/Marcelo/Paolo/ e1000: cleanup process_tx_desc pc_piix: cleanup init compat handling pc: pass PCI hole ranges to Guests pci: store PCI hole ranges in guestinfo structure range: add Range structure Message-id: 1373228271-31223-1-git-send-email-mst@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-07pci: Add root bus parameter to pci_nic_init()David Gibson2-3/+5
At present, pci_nic_init() and pci_nic_init_nofail() assume that they will only create a NIC under the primary PCI root. As we add support for multiple PCI roots, that may no longer be the case. This patch adds a root bus parameter to pci_nic_init() (and updates callers accordingly) to allow the machine init code using it to specify the right PCI root for NICs created by old-style -net nic parameters. NICs created new-style, with -device can of course be put anywhere. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-07-04hw/a*: pass owner to memory_region_init* functionsPaolo Bonzini11-34/+44
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-07-04memory: add owner argument to initialization functionsPaolo Bonzini22-125/+125
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-06-25arm/boot: Free dtb blob memory after usePeter Maydell1-5/+15
The dtb blob returned by load_device_tree() is in memory allocated with g_malloc(). Free it accordingly once we have copied its contents into the guest memory. To make this easy, we need also to clean up the error handling in load_dtb() so that we consistently handle errors in the same way (by printing a message and then returning -1, rather than either plowing on or exiting immediately). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Andreas Färber <afaerber@suse.de> Message-id: 1371209256-11408-1-git-send-email-peter.maydell@linaro.org
2013-06-25ARM: Allow dumping of device treeJohn Rigby1-0/+1
By calling qemu_devtree_dumpdtb near the end of load_dtb. Signed-off-by: John Rigby <john.rigby@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-14arm: Remove CONFIG_FDT conditionalsPeter Maydell1-7/+0
Now that we know we're compiling with libfdt, we can remove the CONFIG_FDT conditionals. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Tested-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Message-id: 1369409217-7553-3-git-send-email-peter.maydell@linaro.org
2013-06-03exynos4210.c: register rom_mem for memory migrationIgor Mitsyanko1-0/+1
Even if we do not register newly created RAM MemoryRegion for migration with vmstate_register_ram_global() function, ram_save_setup() still saves this region to snapshot file with empty idstr=="". Consequently this results in error during VM loading in ram_load(). Register rom_mem for migration. Signed-off-by: Igor Mitsyanko <i.mitsyanko@samsung.com> Message-id: 1368199981-45292-3-git-send-email-i.mitsyanko@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-03hw/arm/exynos4210.c: convert chipid_and_omr to an mmio regionIgor Mitsyanko1-3/+24
Exynos SoC was misusing memory_region_init_ram_ptr(): this interface can safely be used only for memory regions which size is a multiple of target page size. Change chipid_and_omr memory to an mmio region to fix this. Signed-off-by: Igor Mitsyanko <i.mitsyanko@samsung.com> Message-id: 1368199981-45292-2-git-send-email-i.mitsyanko@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-03xilinx_spips: seperate SPI and QSPI as two classesPeter Crosthwaite1-1/+1
Make SPI and QSPI different classes. QSPIPS is setup as a child of SPIPS. Only QSPI has the LQSPI functionality, so move all that to the child class. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Message-id: 2cdd0cadb5ba77ca02fde5cae627852dc9a64c71.1369117359.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-05-18remove some double-includesMichael Tokarev1-1/+0
Some source files #include the same header more than once for no good reason. Remove second #includes in such cases. Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2013-05-14spitz: fix compilation failure due to pty.h namespace pollutionPaolo Bonzini1-50/+50
pty.h is polluting the global namespace with a CTRL macro. spitz thus fails compilation with the patch at http://article.gmane.org/gmane.comp.emulators.qemu/211337 and this patch fixes it. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-id: 1368533545-650-1-git-send-email-pbonzini@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-04-25console: add device link to QemuConsolesGerd Hoffmann1-1/+1
So it is possible to figure which qemu console displays which device. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2013-04-20Merge branch 'arm-devs.next' of git://git.linaro.org/people/pmaydell/qemu-armBlue Swirl2-13/+20
* 'arm-devs.next' of git://git.linaro.org/people/pmaydell/qemu-arm: hw/versatile_pci: Drop unnecessary vpb_pci_config_addr() versatile_pci: Expose PCI memory space to system arm/realview: Fix mapping of PCI regions versatile_pci: Implement the PCI controller's control registers versatile_pci: Implement the correct PCI IRQ mapping versatile_pci: Put the host bridge PCI device at slot 29 versatile_pci: Use separate PCI I/O space rather than system I/O space versatile_pci: Change to subclassing TYPE_PCI_HOST_BRIDGE versatile_pci: Update to realize and instance init functions versatile_pci: Expose PCI I/O region on Versatile PB versatile_pci: Fix hardcoded tabs
2013-04-19versatile_pci: Expose PCI memory space to systemPeter Maydell2-0/+6
The VersatilePB's PCI controller exposes the PCI memory space to the system via three regions controlled by the mapping control registers. Implement this so that guests can actually use MMIO-BAR PCI cards. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Paul Brook <paul@codesourcery.com>
2013-04-19arm/realview: Fix mapping of PCI regionsPeter Maydell1-9/+9
Fix the mapping of the PCI regions for the realview board, which were all incorrect. (This was never noticed because the Linux kernel doesn't actually include a PCI driver for the realview boards.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Paul Brook <paul@codesourcery.com>
2013-04-19versatile_pci: Implement the PCI controller's control registersPeter Maydell2-6/+8
The versatile_pci PCI controller has a set of control registers which handle the mapping between PCI and system address spaces. Implement these registers (though for now they have no effect since we don't implement mapping PCI space into system memory at all). The most natural order for our sysbus regions has the control registers at the start, so move all the others down one. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Paul Brook <paul@codesourcery.com>
2013-04-19versatile_pci: Expose PCI I/O region on Versatile PBPeter Maydell1-2/+1
Comments in the QEMU source code claim that the version of the PCI controller on the VersatilePB board doesn't support the PCI I/O region, but this is incorrect; expose that region, map it in the correct location, and drop the misleading comments. This change removes the only currently implemented difference between the realview-pci and versatile-pci models; however there are other differences in not-yet-implemented functionality, so we retain the distinction between the two device types. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Paul Brook <paul@codesourcery.com>
2013-04-19Remove unneeded type castsStefan Weil5-20/+20
cpu_physical_memory_read, cpu_physical_memory_write take any pointer as 2nd argument without needing a type cast. Signed-off-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2013-04-16console: add GraphicHwOpsGerd Hoffmann1-2/+6
Pass a single GraphicHwOps struct pointer to graphic_console_init, instead of a bunch of function pointers. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2013-04-16console: simplify screendumpGerd Hoffmann1-1/+1
Screendumps are alot simpler as we can update non-active QemuConsoles now. So we only need to update the QemuConsole we want write out, then dump the DisplaySurface content into a ppm file. Done. No console switching needed. No special support code in the gfx card emulation needed. Zap it all. Also move ppm_save out of the vga code and next to the qmp_screendump function. For now screen dumping is limited to console #0 (like it used to be), even though it is dead simple to extend it to other consoles. I wanna finish the console cleanup before setting new qapi interfaces into stone. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Tested-by: Igor Mitsyanko <i.mitsyanko@gmail.com>
2013-04-15sysemu: avoid proliferation of include/ subdirectoriesPaolo Bonzini3-3/+3
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-15arm: fix location of some include filesPeter Maydell26-41/+41
The recent rearrangement of include files had some minor errors: devices.h is not ARM specific and should not be in arm/ arm.h should be in arm/ Move these two headers to correct this. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-08hw: move private headers to hw/ subdirectories.Paolo Bonzini3-2/+70
Many headers are used only in a single directory. These can be kept in hw/. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-08hw: move last file to hw/arm/Paolo Bonzini2-5/+1624
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-08hw: move ARM CPU cores to hw/cpu/, configure with default-configs/Paolo Bonzini1-2/+0
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-08hw: move other devices to hw/misc/, configure with default-configs/Paolo Bonzini1-10/+1
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-08hw: move GPIO interfaces to hw/gpio/, configure with default-configs/Paolo Bonzini1-2/+1
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-08hw: move interrupt controllers to hw/intc/, configure with default-configs/Paolo Bonzini1-7/+3
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-08hw: move DMA controllers to hw/dma/, configure with default-configs/Paolo Bonzini1-5/+2
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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