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2013-11-05a15mpcore: Prepare for QOM embeddingAndreas Färber1-20/+1
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <andreas.faerber@web.de>
2013-11-05a15mpcore: Convert to QOM realizeAndreas Färber1-8/+12
Turn SysBusDevice initfn into a QOM realizefn. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <andreas.faerber@web.de>
2013-11-05a15mpcore: Embed GICStateAndreas Färber1-15/+24
This covers both emulated and KVM GIC. Prepares for QOM realize. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <andreas.faerber@web.de>
2013-11-05a15mpcore: Split off instance_initAndreas Färber1-3/+10
Prepares for QOM realize. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <andreas.faerber@web.de>
2013-09-03a15mpcore: Use qemu_get_cpu() for generic timersAndreas Färber1-3/+2
This simplifies the loop and aids with refactoring of CPU list. Requested-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-08-20hw/cpu/a15mpcore: Wire generic timer outputs to GIC inputsPeter Maydell1-0/+18
Now our A15 CPU implements the generic timers, we can wire them up to the appropriate inputs on the GIC. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Laurent Desnogues <laurent.desnogues@gmail.com> Message-id: 1376065080-26661-5-git-send-email-peter.maydell@linaro.org
2013-07-29cpu/a15mpcore: QOM cast cleanupAndreas Färber1-4/+11
Introduce type constant and cast macro and rename A15MPPrivState::busdev field to parent_obj to enforce its use. Prepares for QOM realize. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <andreas.faerber@web.de>
2013-07-15hw/cpu/a15mpcore: Correct default value for num-irqPeter Maydell1-2/+2
The a15mpcore device claims that its default value for num-irq is the number of interrupts used by the A15MP in the vexpress-a15 board. However that chip has 128 external interrupts, not 64. Since there is only one A15 based model in QEMU currently, we can fix this by simply changing the default value. This error was causing recent (3.10) Linux kernels to print warnings/backtraces when the number of interrupts reported by the GIC was smaller than an interrupt number they wanted to use. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1373032481-15280-1-git-send-email-peter.maydell@linaro.org
2013-07-04hw/c*: pass owner to memory_region_init* functionsPaolo Bonzini1-1/+2
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-07-04memory: add owner argument to initialization functionsPaolo Bonzini1-1/+1
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-08hw: move ARM CPU cores to hw/cpu/, configure with default-configs/Paolo Bonzini1-0/+114
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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