| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2016-06-17 | hw/intc/arm_gicv3: Add IRQ handling CPU interface registers | Peter Maydell | 1 | -0/+5 |
| 2016-06-17 | hw/intc/arm_gicv3: Implement CPU i/f SGI generation registers | Peter Maydell | 1 | -0/+1 |
| 2016-06-17 | hw/intc/arm_gicv3: Implement gicv3_cpuif_update() | Peter Maydell | 1 | -4/+1 |
| 2016-06-17 | hw/intc/arm_gicv3: Implement GICv3 CPU interface registers | Peter Maydell | 1 | -0/+1 |
| 2016-06-17 | hw/intc/arm_gicv3: Implement gicv3_set_irq() | Peter Maydell | 1 | -0/+2 |
| 2016-06-17 | hw/intc/arm_gicv3: Implement GICv3 redistributor registers | Shlomo Pongratz | 1 | -0/+4 |
| 2016-06-17 | hw/intc/arm_gicv3: Implement GICv3 distributor registers | Shlomo Pongratz | 1 | -0/+4 |
| 2016-06-17 | hw/intc/arm_gicv3: Implement functions to identify next pending irq | Peter Maydell | 1 | -0/+121 |
| 2016-06-17 | hw/intc/arm_gicv3: ARM GICv3 device framework | Shlomo Pongratz | 1 | -0/+24 |
| 2016-06-17 | hw/intc/arm_gicv3: Add state information | Pavel Fedin | 1 | -0/+172 |
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index : peter/qemu | |
| QEMU hacking for Peter | Peter Wu |
| summaryrefslogtreecommitdiff |