peter/qemu - QEMU hacking for Peter

Age	Commit message (Collapse)	Author	Files	Lines
2013-07-29	xilinx_intc: QOM cast cleanup	Andreas Färber	1	-7/+12
	Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-04	hw/i: pass owner to memory_region_init functions	Paolo Bonzini	1	-1/+2
	Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-07-04	memory: add owner argument to initialization functions	Paolo Bonzini	1	-1/+1
	Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-06-18	intc/xilinx_intc: Dont lower IRQ when HIE cleared	Peter Crosthwaite	1	-5/+0
	This is a little strange. It is lowering the parent IRQ pin on input when HIE is cleared. There is no such behaviour in the real hardware. ISR changes based on interrupt pin state are already guarded on HIE being set. So we can just delete this if in its entirety. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2013-06-18	intc/xilinx_intc: Inhibit write to ISR when HIE	Peter Crosthwaite	1	-0/+5
	When the Hardware Interrupt Enable (HIE) bit is set, software cannot change ISR. Add write guard accordingly. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2013-06-18	intc/xilinx_intc: Handle level interrupt retriggering	Peter Crosthwaite	1	-1/+15
	Acking a level sensitive interrupt should have no effect if the interrupt pin is still asserted. The current implementation requires and edge condition to occur for setting a level sensitive IRQ, which means an ACK can clear a level sensitive interrupt, until the original source strobes the interrupt again. Fix by keeping track of the interrupt pin state and setting ISR based on this every time update_irq() is called. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2013-06-18	intc/xilinx_intc: Don't clear level sens. IRQs without ACK	Peter Crosthwaite	1	-7/+1
	For level sensitive interrupts, ISR bits are cleared when the input pin is lowered. This is incorrect. Only software can clear ISR bits (via IAR or direct write to ISR with !MER(2)). Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2013-06-11	intc/xilinx_intc: Use qemu_set_irq	Peter Crosthwaite	1	-5/+1
	Use qemu_set_irq rather than if-elsing qemu_irq_(lower\|raise). No functional change, just reduces verbosity. Cc: qemu-trivial@nongnu.org Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2013-04-08	hw: move target-independent files to subdirectories	Paolo Bonzini	1	-0/+190
	This patch tackles all files that are compiled once, moving them to subdirectories of hw/. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>