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2017-09-08hw/pci: add QEMU-specific PCI capability to the Generic PCI Express Root PortAleksandr Bezzubikov1-0/+36
To enable hotplugging of a newly created pcie-pci-bridge, we need to tell firmware (e.g. SeaBIOS) to reserve additional buses or IO/MEM/PREF space for pcie-root-port. Additional bus reservation allows us to hotplug pcie-pci-bridge into this root port. The number of buses and IO/MEM/PREF space to reserve are provided to the device via a corresponding property, and to the firmware via new PCI capability. The properties' default values are -1 to keep default behavior unchanged. Signed-off-by: Aleksandr Bezzubikov <zuban32s@gmail.com> Reviewed-by: Marcel Apfelbaum <marcel@redhat.com> Tested-by: Marcel Apfelbaum <marcel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2017-09-08hw/pci: introduce pcie-pci-bridge deviceAleksandr Bezzubikov2-1/+193
Introduce a new PCIExpress-to-PCI Bridge device, which is a hot-pluggable PCI Express device and supports devices hot-plug with SHPC. This device is intended to replace the DMI-to-PCI Bridge. Signed-off-by: Aleksandr Bezzubikov <zuban32s@gmail.com> Reviewed-by: Marcel Apfelbaum <marcel@redhat.com> Tested-by: Marcel Apfelbaum <marcel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2017-07-03pci: Convert shpc_init() to ErrorMao Zhongyi1-8/+6
In order to propagate error message better, convert shpc_init() to Error also convert the pci_bridge_dev_initfn() to realize. Cc: mst@redhat.com Cc: marcel@redhat.com Cc: armbru@redhat.com Signed-off-by: Mao Zhongyi <maozy.fnst@cn.fujitsu.com> Reviewed-by: Marcel Apfelbaum <marcel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2017-07-03pci: Convert to realizeMao Zhongyi4-37/+32
Convert i82801b11, io3130_upstream, io3130_downstream and pcie_root_port devices to realize. Cc: mst@redhat.com Cc: marcel@redhat.com Cc: armbru@redhat.com Signed-off-by: Mao Zhongyi <maozy.fnst@cn.fujitsu.com> Reviewed-by: Marcel Apfelbaum <marcel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2017-07-03pci: Make errp the last parameter of pci_add_capability()Mao Zhongyi1-0/+1
Add Error argument for pci_add_capability() to leverage the errp to pass info on errors. This way is helpful for its callers to make a better error handling when moving to 'realize'. Cc: pbonzini@redhat.com Cc: rth@twiddle.net Cc: ehabkost@redhat.com Cc: mst@redhat.com Cc: jasowang@redhat.com Cc: marcel@redhat.com Cc: alex.williamson@redhat.com Cc: armbru@redhat.com Signed-off-by: Mao Zhongyi <maozy.fnst@cn.fujitsu.com> Reviewed-by: Marcel Apfelbaum <marcel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2017-07-03hw/pci-bridge/dec: Classify the DEC PCI bridge as bridge deviceThomas Huth1-0/+2
This way the bridge shows up in the correct section of the "-device help" text. Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Marcel Apfelbaum <marcel@redhat.com>
2017-06-08hw/pcie: fix the generic pcie root port to support migrationMarcel Apfelbaum1-0/+25
Add msix state to pcie-root-ports's vmstate in order to support migration. Signed-off-by: Marcel Apfelbaum <marcel@redhat.com> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2017-05-18Merge remote-tracking branch 'mst/tags/for_upstream' into stagingStefan Hajnoczi1-1/+1
pci, virtio, vhost: fixes A bunch of fixes that missed the release. Most notably we are reverting shpc back to enabled by default state as guests uses that as an indicator that hotplug is supported (even though it's unused). Unfortunately we can't fix this on the stable branch since that would break migration. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Wed 17 May 2017 10:42:06 PM BST # gpg: using RSA key 0x281F0DB8D28D5469 # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * mst/tags/for_upstream: exec: abstract address_space_do_translate() pci: deassert intx when pci device unrealize virtio: allow broken device to notify guest Revert "hw/pci: disable pci-bridge's shpc by default" acpi-defs: clean up open brace usage ACPI: don't call acpi_pcihp_device_plug_cb on xen iommu: Don't crash if machine is not PC_MACHINE pc: add 2.10 machine type pc/fwcfg: unbreak migration from qemu-2.5 and qemu-2.6 during firmware boot libvhost-user: fix crash when rings aren't ready hw/virtio: fix vhost user fails to startup when MQ hw/arm/virt: generate 64-bit addressable ACPI objects hw/acpi-defs: replace leading X with x_ in FADT field names Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2017-05-18Revert "hw/pci: disable pci-bridge's shpc by default"Marcel Apfelbaum1-1/+1
This reverts commit dc0ae767700c156894e36fab89a745a2dc4173de. Disabling the shpc controller has an undesired side effect. The PCI bridge remains with no attached devices at boot time, and the guest operating systems do not allocate any resources for it, leaving the bridge unusable. Note that the behaviour is dictated by the pci bridge specification. Revert the commit and leave the shpc controller even if is not actually used by any architecture. Slot 0 remains unusable at boot time. Keep shpc off for QEMU 2.9 machines. Signed-off-by: Marcel Apfelbaum <marcel@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2017-05-17qdev: Replace cannot_instantiate_with_device_add_yet with !user_creatableEduardo Habkost2-2/+2
cannot_instantiate_with_device_add_yet was introduced by commit efec3dd631d94160288392721a5f9c39e50fb2bc to replace no_user. It was supposed to be a temporary measure. When it was introduced, we had 54 cannot_instantiate_with_device_add_yet=true lines in the code. Today (3 years later) this number has not shrunk: we now have 57 cannot_instantiate_with_device_add_yet=true lines. I think it is safe to say it is not a temporary measure, and we won't see the flag go away soon. Instead of a long field name that misleads people to believe it is temporary, replace it a shorter and less misleading field: user_creatable. Except for code comments, changes were generated using the following Coccinelle patch: @@ expression DC; @@ ( -DC->cannot_instantiate_with_device_add_yet = false; +DC->user_creatable = true; | -DC->cannot_instantiate_with_device_add_yet = true; +DC->user_creatable = false; ) @@ typedef ObjectClass; expression dc; identifier class, data; @@ static void device_class_init(ObjectClass *class, void *data) { ... dc->hotpluggable = true; +dc->user_creatable = true; ... } @@ @@ struct DeviceClass { ... -bool cannot_instantiate_with_device_add_yet; +bool user_creatable; ... } @@ expression DC; @@ ( -!DC->cannot_instantiate_with_device_add_yet +DC->user_creatable | -DC->cannot_instantiate_with_device_add_yet +!DC->user_creatable ) Cc: Alistair Francis <alistair.francis@xilinx.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Marcel Apfelbaum <marcel@redhat.com> Cc: Markus Armbruster <armbru@redhat.com> Cc: Peter Maydell <peter.maydell@linaro.org> Cc: Thomas Huth <thuth@redhat.com> Acked-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Marcel Apfelbaum <marcel@redhat.com> Acked-by: Marcel Apfelbaum <marcel@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <20170503203604.31462-2-ehabkost@redhat.com> [ehabkost: kept "TODO remove once we're there" comment] Reviewed-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2017-02-02Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.9-20170202' ↵Peter Maydell1-1/+1
into staging ppc patch queue 2017-02-02 This obsoletes ppc-for-2.9-20170112, which had a MacOS build bug. This is a long overdue ppc pull request for qemu-2.9. It's been a long time coming due to some holidays and inconveniently timed problems with testing. So, there's a lot in here: * More POWER9 instruction implementations for TCG * The simpler parts of my CPU compatibility mode cleanup * This changes behaviour to prefer compatibility modes over "raW" mode for new machine type versions * New "40p" machine type which is essentially a modernized and cleaned up "prep". The intention is that it will replace "prep" once it has some more testing and polish. * Add pseries-2.9 machine type * Implement H_SIGNAL_SYS_RESET hypercall * Consolidate the two alternate CPU init paths in pseries by making it always go through CPU core objects to initialize CPU * A number of bugfixes and cleanups * Stop the guest timebase when the guest is stopped under KVM. This makes the guest system clock also stop when paused, which matches the x86 behaviour. * Some preliminary cleanups leading towards implementation of the POWER9 MMU. There are also some changes not strictly related to ppc code, but for its benefit: * Limit the pxi-expander-bridge (PXB) device to x86 guests only (it's essentially a hack to work around historical x86 limitations) * Some additions to the 128-bit math in host_utils, necessary for some of the new instructions. * Revise a number of qtests and enable them for ppc # gpg: Signature made Thu 02 Feb 2017 01:40:16 GMT # gpg: using RSA key 0x6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dgibson/tags/ppc-for-2.9-20170202: (107 commits) hw/ppc/pnv: Use error_report instead of hw_error if a ROM file can't be found ppc/kvm: Handle the "family" CPU via alias instead of registering new types target/ppc/mmu_hash64: Fix incorrect shift value in amr calculation target/ppc/mmu_hash64: Fix printing unsigned as signed int tcg/POWER9: NOOP the cp_abort instruction target/ppc/debug: Print LPCR register value if register exists target-ppc: Add xststdc[sp, dp, qp] instructions target-ppc: Add xvtstdc[sp,dp] instructions target-ppc: Add MMU model check for booke machines ppc: switch to constants within BUILD_BUG_ON target/ppc/cpu-models: Fix/remove bad CPU aliases target/ppc: Remove unused POWERPC_FAMILY(POWER) spapr: clock should count only if vm is running ppc: Remove unused function cpu_ppc601_rtc_init() target/ppc: Add pcr_supported to POWER9 cpu class definition powerpc/cpu-models: rename ISAv3.00 logical PVR definition target-ppc: Add xvcv[hpsp, sphp] instructions target-ppc: Add xsmulqp instruction target-ppc: Add xsdivqp instruction target-ppc: Add xscvsdqp and xscvudqp instructions ... # Conflicts: # hw/pci-bridge/Makefile.objs Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-02-01hw/pci: disable pci-bridge's shpc by defaultMarcel Apfelbaum1-1/+1
The shpc component is optional while ACPI hotplug is used for hot-plugging PCI devices into a PCI-PCI bridge. Disabling the shpc by default will make slot 0 usable at boot time and not only for hot-plug, without loosing any functionality. Older machines will have shpc enabled for compatibility reasons. Signed-off-by: Marcel Apfelbaum <marcel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2017-02-01pci: Convert msix_init() to Error and fix callersCao jin1-2/+1
msix_init() reports errors with error_report(), which is wrong when it's used in realize(). The same issue was fixed for msi_init() in commit 1108b2f. In order to make the API change as small as possible, leave the return value check to later patch. For some devices(like e1000e, vmxnet3, nvme) who won't fail because of msix_init's failure, suppress the error report by passing NULL error object. Bonus: add comment for msix_init. CC: Jiri Pirko <jiri@resnulli.us> CC: Gerd Hoffmann <kraxel@redhat.com> CC: Dmitry Fleytman <dmitry@daynix.com> CC: Jason Wang <jasowang@redhat.com> CC: Michael S. Tsirkin <mst@redhat.com> CC: Hannes Reinecke <hare@suse.de> CC: Paolo Bonzini <pbonzini@redhat.com> CC: Alex Williamson <alex.williamson@redhat.com> CC: Markus Armbruster <armbru@redhat.com> CC: Marcel Apfelbaum <marcel@redhat.com> Signed-off-by: Cao jin <caoj.fnst@cn.fujitsu.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2017-02-01hw/pcie: Introduce Generic PCI Express Root PortMarcel Apfelbaum2-1/+89
The Generic Root Port behaves almost the same as the Intel's IOH device with id 3420, without having Intel specific attributes. The device has two purposes: (1) Can be used on both X86 and ARM machines. (2) It will allow us to tweak the behaviour (e.g add vendor-specific PCI capabilities) - something that obviously cannot be done on a known device. Signed-off-by: Marcel Apfelbaum <marcel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Tested-by: Andrea Bolognani <abologna@redhat.com>
2017-02-01hw/ioh3420: derive from PCI Express Root Port base classMarcel Apfelbaum1-106/+15
Preserve only Intel specific details. Signed-off-by: Marcel Apfelbaum <marcel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2017-02-01hw/pcie: Introduce a base class for PCI Express Root PortsMarcel Apfelbaum2-0/+172
The 'base' PCI Express Root Port includes the common code to be re-used for all Root Ports implementations. Most of the code was taken from the current implementation of Intel's IOH 3420 Root Port. Signed-off-by: Marcel Apfelbaum <marcel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2017-01-31pxb: Restrict to x86David Gibson1-1/+1
The PCI Expander Bridge (PXB) device is essentially a hack to allow different PCIe devices to be assigned to different NUMA nodes on x86. Each PXB is sort-of a separate PCI host bridge, except that its config space is shared with the config space of the main PCI host bridge, rather than being independent. This is only necessary if the platform doesn't (easily) allow truly independent PCI host bridges. AFAIK that's just x86. This patch makes it possible to configure PXB out of the build, and adjusts the default configs so it's only included on x86 targets. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Acked-by: Michael S. Tsirkin <mst@redhat.com>
2017-01-24PCI/migration merge vmstate_pci_device and vmstate_pcie_deviceDr. David Alan Gilbert3-3/+3
The vmstate_pci_device and vmstate_pcie_devices differ just in the size of one buffer; combine the two using a _TEST macro. I think this is safe as long as everywhere which currently uses either of these two uses the right type. One thing that concerns me is that some places use pci_device_load/save which does some irq mangling, but others just use the VMSTATE_PCI_DEVICE macro - how are they getting the same irq mangling? This passes a smoke test migrate of: ./x86_64-softmmu/qemu-system-x86_64 -M pc,accel=kvm -m 1024 ./littlefed20.img -device e1000e -device virtio-net -device e1000 -device virtio-rng -device megasas -device megasas-gen2 -device ioh3420 -device nec-usb-xhci to an unmodified qemu. Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Message-Id: <20161214195829.18241-1-dgilbert@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
2017-01-10pcie_aer: support configurable AER capa versionDou Liyang3-3/+6
Now, AER capa version is fixed to v2, if assigned device isn't v2, then this value will be inconsistent between guest and host Signed-off-by: Dou Liyang <douly.fnst@cn.fujitsu.com> Signed-off-by: Cao jin <caoj.fnst@cn.fujitsu.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2017-01-10pcie_aer: Convert pcie_aer_init to ErrorCao jin3-3/+6
When user specify invalid value for property aer_log_max, device should fail to create, and report appropriate message. Signed-off-by: Cao jin <caoj.fnst@cn.fujitsu.com> Reviewed-by: Marcel Apfelbaum <marcel@redhat.com> Acked-by: Dmitry Fleytman <dmitry@daynix.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2016-10-28clean-up: removed duplicate #includesAnand J1-1/+0
Some files contain multiple #includes of the same header file. Removed most of those unnecessary duplicate entries using scripts/clean-includes. Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Anand J <anand.indukala@gmail.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2016-07-29hw/pci-bridge: Convert pxb initialization functions to ErrorWei Jiangang1-27/+25
Firstly, convert pxb_dev_init_common() to Error and rename it to pxb_dev_realize_common(). Actually, pxb_register_bus() is converted as well. And then, convert pxb_dev_initfn() and pxb_pcie_dev_initfn() to Error, rename them to pxb_dev_realize() and pxb_pcie_dev_realize() respectively. Signed-off-by: Wei Jiangang <weijg.fnst@cn.fujitsu.com> Signed-off-by: Cao jin <caoj.fnst@cn.fujitsu.com> Reviewed-by: Marcel Apfelbaum <marcel@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2016-07-29hw/pxb: declare pxb devices as not hot-pluggableMarcel Apfelbaum1-0/+2
Prevent future issues when hotplug will work for devices attached to pxbs. Suggested-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Marcel Apfelbaum <marcel@redhat.com> Tested-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2016-07-29hw/pcie-root-port: Fix PCIe root port initializationMarcel Apfelbaum1-0/+1
Specify the root port interrupt pin as part of the init process for cases when msi/msix are not enabled. Fixes "hw/pci/pci.c:196:23: runtime error: shift exponent -1 is negative" warning from clang's sanitizer. Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Marcel Apfelbaum <marcel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2016-07-12Clean up decorations and whitespace around header guardsMarkus Armbruster1-1/+1
Cleaned up with scripts/clean-header-guards.pl. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
2016-07-12Clean up header guards that don't match their file nameMarkus Armbruster1-2/+2
Header guard symbols should match their file name to make guard collisions less likely. Offenders found with scripts/clean-header-guards.pl -vn. Cleaned up with scripts/clean-header-guards.pl, followed by some renaming of new guard symbols picked by the script to better ones. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
2016-07-12Drop Emacs local variables lists redundant with .dir-locals.elMarkus Armbruster3-28/+0
Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
2016-07-05pci: Convert msi_init() to Error and fix callers to check itCao jin4-7/+31
msi_init() reports errors with error_report(), which is wrong when it's used in realize(). Fix by converting it to Error. Fix its callers to handle failure instead of ignoring it. For those callers who don't handle the failure, it might happen: when user want msi on, but he doesn't get what he want because of msi_init fails silently. cc: Gerd Hoffmann <kraxel@redhat.com> cc: John Snow <jsnow@redhat.com> cc: Dmitry Fleytman <dmitry@daynix.com> cc: Jason Wang <jasowang@redhat.com> cc: Michael S. Tsirkin <mst@redhat.com> cc: Hannes Reinecke <hare@suse.de> cc: Paolo Bonzini <pbonzini@redhat.com> cc: Alex Williamson <alex.williamson@redhat.com> cc: Markus Armbruster <armbru@redhat.com> cc: Marcel Apfelbaum <marcel@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Cao jin <caoj.fnst@cn.fujitsu.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Hannes Reinecke <hare@suse.com>
2016-07-05pci bridge dev: change msi property typeCao jin1-6/+7
>From bit to enum OnOffAuto. cc: Michael S. Tsirkin <mst@redhat.com> cc: Markus Armbruster <armbru@redhat.com> cc: Marcel Apfelbaum <marcel@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Cao jin <caoj.fnst@cn.fujitsu.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2016-07-04q35: allow dynamic sysbusMarcel Apfelbaum1-0/+2
Allow adding sysbus devices with -device on Q35. At first Q35 will support only intel-iommu to be added this way, however the command line will support all sysbus devices. Mark with 'cannot_instantiate_with_device_add_yet' the ones causing immediate problems (e.g. crashes). Signed-off-by: Marcel Apfelbaum <marcel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2016-06-17fix some coding style problemsCao jin4-2/+18
It has: 1. More newlines make the code block well separated. 2. Add more comments for msi_init. 3. Fix a indentation in vmxnet3.c. 4. ioh3420 & xio3130_downstream: put PCI Express capability init function together, make it more readable. cc: Michael S. Tsirkin <mst@redhat.com> cc: Markus Armbruster <armbru@redhat.com> cc: Marcel Apfelbaum <marcel@redhat.com> cc: Dmitry Fleytman <dmitry@daynix.com> cc: Jason Wang <jasowang@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Marcel Apfelbaum <marcel@redhat.com> Signed-off-by: Cao jin <caoj.fnst@cn.fujitsu.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2016-04-07hw/pci-bridge: Add missing unref in case register-bus failsWei Jiangang1-1/+7
The error paths after a successful qdev_create/pci_bus_new should contain a object_unref/object_unparent. pxb_dev_init_common() did not yet, so add it. Signed-off-by: Wei Jiangang <weijg.fnst@cn.fujitsu.com> Signed-off-by: Cao jin <caoj.fnst@cn.fujitsu.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Marcel Apfelbaum <marcel@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com>
2016-04-07Migration: Add i82801b11 migration dataDr. David Alan Gilbert1-0/+9
The i82801b11 bridge didn't have a vmsd and thus didn't send any migration data, including that of its parent PCIBridge object. The symptom being if the guest used any devices behind the bridge the guest crashed (mostly with various interrupt related issues). Note: This will cause migration from old qemus that used this device to explicitly fail during migration as opposed to the guest crashing. Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Suggested-by: Marcel Apfelbaum <marcel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2016-03-22include/qemu/osdep.h: Don't include qapi/error.hMarkus Armbruster1-0/+1
Commit 57cb38b included qapi/error.h into qemu/osdep.h to get the Error typedef. Since then, we've moved to include qemu/osdep.h everywhere. Its file comment explains: "To avoid getting into possible circular include dependencies, this file should not include any other QEMU headers, with the exceptions of config-host.h, compiler.h, os-posix.h and os-win32.h, all of which are doing a similar job to this file and are under similar constraints." qapi/error.h doesn't do a similar job, and it doesn't adhere to similar constraints: it includes qapi-types.h. That's in excess of 100KiB of crap most .c files don't actually need. Add the typedef to qemu/typedefs.h, and include that instead of qapi/error.h. Include qapi/error.h in .c files that need it and don't get it now. Include qapi-types.h in qom/object.h for uint16List. Update scripts/clean-includes accordingly. Update it further to match reality: replace config.h by config-target.h, add sysemu/os-posix.h, sysemu/os-win32.h. Update the list of includes in the qemu/osdep.h comment quoted above similarly. This reduces the number of objects depending on qapi/error.h from "all of them" to less than a third. Unfortunately, the number depending on qapi-types.h shrinks only a little. More work is needed for that one. Signed-off-by: Markus Armbruster <armbru@redhat.com> [Fix compilation without the spice devel packages. - Paolo] Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-03-11pxb: cleanupCao jin1-1/+1
Signed-off-by: Cao jin <caoj.fnst@cn.fujitsu.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Marcel Apfelbaum <marcel@redhat.com>
2016-03-11msi_supported -> msi_nonbrokenMichael S. Tsirkin1-1/+1
Rename controller flag to make it clearer what it means. Add some documentation as well. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2016-02-19aer: impove pcie_aer_init to support vfio deviceChen Fan3-3/+3
pcie_aer_init was used to emulate an aer capability for pcie device, but for vfio device, the aer config space size is mutable and is not always equal to PCI_ERR_SIZEOF(0x48). it depends on where the TLP Prefix register required, so here we add a size argument. Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2016-02-16change type of pci_bridge_initfn() to voidCao jin5-24/+7
Since it can`t fail. Also modify the callers. Signed-off-by: Cao jin <caoj.fnst@cn.fujitsu.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Marcel Apfelbaum <marcel@redhat.com>
2016-02-16dec: convert to realize()Cao jin1-3/+3
Also because pci_bridge_initfn() can`t fail. Signed-off-by: Cao jin <caoj.fnst@cn.fujitsu.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Marcel Apfelbaum <marcel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2016-02-06hw/pxb: add pxb devices to the bridge categoryMarcel Apfelbaum1-0/+2
Signed-off-by: Marcel Apfelbaum <marcel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2016-01-29pci: Clean up includesPeter Maydell6-0/+6
Clean up includes so that osdep.h is included first and headers which it implies are not included manually. This commit was created with scripts/clean-includes. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1453832250-766-23-git-send-email-peter.maydell@linaro.org
2016-01-29ppc: Clean up includesPeter Maydell1-0/+1
Clean up includes so that osdep.h is included first and headers which it implies are not included manually. This commit was created with scripts/clean-includes. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1453832250-766-6-git-send-email-peter.maydell@linaro.org
2015-12-22hw/pxb: introduce pxb-pcie expander for PCIe machinesMarcel Apfelbaum1-15/+83
The pxb-pcie is the counterpart of pxb for PCI express machines. The new device re-uses the pxb code, but appears to the guests as a different device. The pxb-pcie device does not have an internal pci-pci bridge and exposes a PCIe root bus instead of a PCI one. Signed-off-by: Marcel Apfelbaum <marcel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2015-06-23hw/pci-bridge: format special OFW unit address for PXB hostLaszlo Ersek1-0/+53
We have agreed that OpenFirmware device paths in the "bootorder" fw_cfg file should follow the pattern /pci@i0cf8,%x/... for devices that live behind an extra root bus. The extra root bus in question is the %x'th among the extra root buses. (In other words, %x gives the position of the affected extra root bus relative to the other extra root buses, in bus_nr order.) %x starts at 1, and is formatted in hex. The portion of the unit address that comes before the comma is dynamically taken from the main host bridge, similarly to sysbus_get_fw_dev_path(). Cc: Kevin O'Connor <kevin@koconnor.net> Cc: Michael S. Tsirkin <mst@redhat.com> Cc: Marcel Apfelbaum <marcel@redhat.com> Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2015-06-23hw/pci-bridge: disable SHPC in PXBLaszlo Ersek1-0/+1
OVMF downloads the ACPI linker/loader script from QEMU when the edk2 PCI Bus driver globally signals the firmware that PCI enumeration and resource allocation have completed. At this point QEMU regenerates the ACPI payload in an fw_cfg read callback, and this is when the PXB's _CRS gets populated. Unfortunately, when this happens, the PCI_COMMAND_MEMORY bit is clear in the root bus's command register, *unlike* under SeaBIOS. The consequences unfold as follows: - When build_crs() fetches dev->io_regions[i].addr, it is all-bits-one, because pci_update_mappings() --> pci_bar_address() calculated it as PCI_BAR_UNMAPPED, due to the PCI_COMMAND_MEMORY bit being clear. - Consequently, the SHPC MMIO BAR (bar 0) of the bridge is not added to the _CRS, *despite* having been programmed in PCI config space. - Similarly, the SHPC MMIO BAR of the PXB is not removed from the main root bus's DWordMemory descriptor. - Guest OSes (Linux and Windows alike) notice the pre-programmed SHPC BAR within the PXB's config space, and notice that it conflicts with the main root bus's memory resource descriptors. Linux reports pci 0000:04:00.0: BAR 0: can't assign mem (size 0x100) pci 0000:04:00.0: BAR 0: trying firmware assignment [mem 0x88200000-0x882000ff 64bit] pci 0000:04:00.0: BAR 0: [mem 0x88200000-0x882000ff 64bit] conflicts with PCI Bus 0000:00 [mem 0x88200000-0xfebfffff] While Windows Server 2012 R2 reports https://technet.microsoft.com/en-us/library/cc732199%28v=ws.10%29.aspx This device cannot find enough free resources that it can use. If you want to use this device, you will need to disable one of the other devices on this system. (Code 12) This issue was apparently encountered earlier, see the "hack" in: https://lists.nongnu.org/archive/html/qemu-devel/2015-01/msg02983.html and the current hole-punching logic in build_crs() and build_ssdt() is probably supposed to remedy exactly that problem -- however, for OVMF they don't work, because at the end of the PCI enumeration and resource allocation, which cues the ACPI linker/loader client, the command register is clear. The "shpc" property of "pci-bridge", introduced in the previous patches, allows us to disable the standard hotplug controller cleanly, eliminating the SHPC bar and the conflict. Cc: Michael S. Tsirkin <mst@redhat.com> Cc: Marcel Apfelbaum <marcel@redhat.com> Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2015-06-23hw/pci-bridge: introduce "shpc" propertyLaszlo Ersek1-16/+70
In the PCI expander bridge, we will want to disable those features of pci-bridge that relate to SHPC (standard hotplug controller): - SHPC bar and underlying MemoryRegion - interrupt (INTx or MSI) - effective hotplug callbacks - other SHPC hooks (initialization, cleanup, migration etc) Introduce a new feature request bit in the PCIBridgeDev.flags field, and turn off the above if the bit is explicitly cleared. Suggested-by: Michael S. Tsirkin <mst@redhat.com> Cc: Michael S. Tsirkin <mst@redhat.com> Cc: Marcel Apfelbaum <marcel@redhat.com> Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2015-06-23hw/pci-bridge: add macro for "msi" propertyLaszlo Ersek1-1/+2
This should help catch property name typos at compile time. Cc: Michael S. Tsirkin <mst@redhat.com> Cc: Marcel Apfelbaum <marcel@redhat.com> Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2015-06-23hw/pci-bridge: add macro for "chassis_nr" propertyLaszlo Ersek2-2/+4
This should help catch property name typos at compile time. Cc: Michael S. Tsirkin <mst@redhat.com> Cc: Marcel Apfelbaum <marcel@redhat.com> Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2015-06-23hw/pci-bridge: expose _test parameter in SHPC_VMSTATE()Laszlo Ersek1-1/+1
Change the signature of the function-like macro SHPC_VMSTATE(), so that we can produce and expect this field conditionally in the migration stream, starting with an upcoming patch. Cc: Michael S. Tsirkin <mst@redhat.com> Cc: Marcel Apfelbaum <marcel@redhat.com> Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2015-06-23add pci-bridge-seatGerd Hoffmann1-1/+24
Simplifies multiseat configuration, see docs/multiseat.txt update for details. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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