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path: root/hw/ppc/spapr_pci.c
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2014-03-13Merge remote-tracking branch 'remotes/afaerber/tags/ppc-for-2.0' into stagingPeter Maydell1-26/+26
PowerPC queue for 2.0-rc0 * QEMUMachine include cleanup * SLOF update * XICS reset fix * sPAPR PCI host bridge refactorings # gpg: Signature made Thu 13 Mar 2014 02:50:51 GMT using RSA key ID 3E7E013F # gpg: Good signature from "Andreas Färber <afaerber@suse.de>" # gpg: aka "Andreas Färber <afaerber@suse.com>" * remotes/afaerber/tags/ppc-for-2.0: spapr-pci: Convert fprintf() to error_report() spapr-pci: Convert to QOM realize xics-kvm: Fix reset function pseries: Update SLOF firmware image to qemu-slof-20140304 Move QEMUMachine typedef to qemu/typedefs.h Revert "KVM: Split QEMUMachine typedef into separate header" Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-03-13spapr-pci: Convert fprintf() to error_report()Alexey Kardashevskiy1-4/+5
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Reviewed-by: Mike Day <ncmike@ncultra.org> Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13spapr-pci: Convert to QOM realizeAlexey Kardashevskiy1-22/+21
This converts the old-style SysBusDevice::init() callback to a new-style DeviceClass::realize() callback. As a part of conversion, this replaces fprintf(stderr) with error_setg() as realize() does not "return" any value, instead it puts the extended error into **errp. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Reviewed-by: Mike Day <ncmike@ncultra.org> Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-12spapr-pci: Change the default PCI bus namingAlexey Kardashevskiy1-21/+2
Previously libvirt required the first/default PCI bus to have name "pci". Since QEMU can support multiple buses now, libvirt wants "pci.0" now. This removes custom bus name and lets QEMU make up default names. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-05PPC: sPAPR: Only use getpagesize() when we run with kvmAlexander Graf1-1/+12
We currently size the msi window trap page according to the host's page size so that we poke a working hole into a memory slot in case we overlap. However, this is only ever necessary with KVM active. Without KVM, we should rather try to be host platform agnostic and use a constant size: 4k. This fixes a build breakage on win32 hosts. Signed-off-by: Alexander Graf <agraf@suse.de>
2014-03-05spapr-pci: enable adding PHB via -deviceAlexey Kardashevskiy1-0/+2
Recent changes introduced cannot_instantiate_with_device_add_yet and removed capability of adding yet another PCI host bridge via command line for SPAPR platform (POWERPC64 server). This brings the capability back and puts SPAPR PHB into "bridge" category. This is not much use for emulated PHB but it is absolutely required for VFIO as we put an IOMMU group onto a separate PHB on SPAPR. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Alexander Graf <agraf@suse.de>
2014-02-14qdev: Remove hex8/32/64 property typesPaolo Bonzini1-8/+8
Replace them with uint8/32/64. Reviewed-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-12-20spapr-rtas: replace return code constants with macrosAlexey Kardashevskiy1-21/+21
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-12-10spapr_pci: s/INT64_MAX/UINT64_MAX/Michael S. Tsirkin1-1/+1
It doesn't make sense for a region to be INT64_MAX in size: memory core uses UINT64_MAX as a special value meaning "all 64 bit" this is what was meant here. While this should never affect the spapr system which at the moment always has < 63 bit size, this makes us hit all kind of corner case bugs with sub-pages, so users are probably better off if we just use UINT64_MAX instead. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Alexander Graf <agraf@suse.de>
2013-10-25spapr-pci: enable irqfd for INTxAlexey Kardashevskiy1-0/+13
This enables IRQFD for LSI (level triggered INTx interrupts) by adding a spapr_route_intx_pin_to_irq() callback to the sPAPR PCI host bus. This callback is called to know the global interrupt number to link resampling fd with IRQFD's fd in KVM. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-09-02spapr-pci: rework MSI/MSIXAlexey Kardashevskiy1-34/+27
On the sPAPR platform a guest allocates MSI/MSIX vectors via RTAS hypercalls which return global IRQ numbers to a guest so it only operates with those and never touches MSIMessage. Therefore MSIMessage handling is completely hidden in QEMU. Previously every sPAPR PCI host bridge implemented its own MSI window to catch msi_notify()/msix_notify() calls from QEMU devices (virtio-pci or vfio) and route them to the guest via qemu_pulse_irq(). MSIMessage used to be encoded as: .addr - address within the PHB MSI window; .data - the device index on PHB plus vector number. The MSI MR write function translated this MSIMessage to a global IRQ number and called qemu_pulse_irq(). However the total number of IRQs is not really big (at the moment it is 1024 IRQs starting from 4096) and even 16bit data field of MSIMessage seems to be enough to store an IRQ number there. This simplifies MSI handling in sPAPR PHB. Specifically, this does: 1. remove a MSI window from a PHB; 2. add a single memory region for all MSIs to sPAPREnvironment and spapr_pci_msi_init() to initialize it; 3. encode MSIMessage as: * .addr - a fixed address of SPAPR_PCI_MSI_WINDOW==0x40000000000ULL; * .data as an IRQ number. 4. change IRQ allocator to align first IRQ number in a block for MSI. MSI uses lower bits to specify the vector number so the first IRQ has to be aligned. MSIX does not need any special allocator though. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-09-02spapr-pci: fix config space access to support bridgesAlexey Kardashevskiy1-10/+2
spapr-pci config space accessors use find_dev() to find a PCI device. However find_dev() only searched on a primary bus and did not do recursive search through secondary buses so config space access was not possible for devices other that on a primary bus. This fixed find_dev() by using the PCI API pci_find_device() function. This effectively enabled pci bridges on spapr. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-29spapr_pci: QOM cast cleanupAndreas Färber1-3/+4
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-29pseries: savevm support for PCI host bridgeDavid Gibson1-0/+49
This adds the necessary support for saving the state of the PAPR virtual PCI host bridge (or host bridges). Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Message-id: 1374175984-8930-10-git-send-email-aliguori@us.ibm.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-29spapr-tce: make sPAPRTCETable a proper deviceAnthony Liguori1-1/+1
Model TCE tables as a device that's hooked up as a child object to the owner. Besides the code cleanup, we get a few nice benefits: 1) free actually works now (it was dead code before) 2) the TCE information is visible in the device tree 3) we can expose table information as properties such that if we change the window_size, we can use globals to keep migration working. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Message-id: 1374175984-8930-6-git-send-email-aliguori@us.ibm.com [dwg: pseries: savevm support for PAPR TCE tables] Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> [alexey: ppc kvm: fix to compile] Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-25spapr_pci: remove indirection for I/O port accessAlexey Kardashevskiy1-39/+2
This fixes endianness bugs in I/O port access. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Message-id: 1374501278-31549-5-git-send-email-pbonzini@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-11spapr: Fix compiler warnings for some versions of gccStefan Weil1-2/+2
i686-w64-mingw32-gcc (GCC) 4.6.3 from Debian wheezy reports these warnings: hw/ppc/spapr_hcall.c:188:1: warning: control reaches end of non-void function [-Wreturn-type] hw/ppc/spapr_pci.c:454:1: warning: control reaches end of non-void function [-Wreturn-type] Both warnings are fixed by using g_assert_not_reached instead of assert. A second line with assert(0) in spapr_pci.c which did not raise a compiler warning was modified, too, because g_assert_not_reached documents the purpose of that statement and is not removed in release builds. Signed-off-by: Stefan Weil <sw@weilnetz.de> Acked-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-08Merge remote-tracking branch 'mst/tags/for_anthony' into stagingAnthony Liguori1-0/+10
pci,misc enhancements This includes some pci enhancements: Better support for systems with multiple PCI root buses FW cfg interface for more robust pci programming in BIOS Minor fixes/cleanups for fw cfg and cross-version migration - because of dependencies with other patches Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Sun 07 Jul 2013 03:11:18 PM CDT using RSA key ID D28D5469 # gpg: Can't check signature: public key not found # By David Gibson (10) and others # Via Michael S. Tsirkin * mst/tags/for_anthony: pci: Fold host_buses list into PCIHostState functionality pci: Remove domain from PCIHostBus pci: Simpler implementation of primary PCI bus pci: Add root bus parameter to pci_nic_init() pci: Add root bus argument to pci_get_bus_devfn() pci: Replace pci_find_domain() with more general pci_root_bus_path() pci: Use helper to find device's root bus in pci_find_domain() pci: Abolish pci_find_root_bus() pci: Move pci_read_devaddr to pci-hotplug-old.c pci: Cleanup configuration for pci-hotplug.c pvpanic: fix fwcfg for big endian hosts pvpanic: initialization cleanup MAINTAINERS: s/Marcelo/Paolo/ e1000: cleanup process_tx_desc pc_piix: cleanup init compat handling pc: pass PCI hole ranges to Guests pci: store PCI hole ranges in guestinfo structure range: add Range structure Message-id: 1373228271-31223-1-git-send-email-mst@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-07pci: Replace pci_find_domain() with more general pci_root_bus_path()David Gibson1-0/+10
pci_find_domain() is used in a number of places where we want an id for a whole PCI domain (i.e. the subtree under a PCI root bus). The trouble is that many platforms may support multiple independent host bridges with no hardware supplied notion of domain number. This patch, therefore, replaces calls to pci_find_domain() with calls to a new pci_root_bus_path() returning a string. The new call is implemented in terms of a new callback in the host bridge class, so it can be defined in some way that's well defined for the platform. When no callback is available we fall back on the qbus name. Most current uses of pci_find_domain() are for error or informational messages, so the change in identifiers should be harmless. The exception is pci_get_dev_path(), whose results form part of migration streams. To maintain compatibility with old migration streams, the PIIX PCI host is altered to always supply "0000" for this path, which matches the old domain number (since the code didn't actually support domains other than 0). For the pseries (spapr) PCI bridge we use a different platform-unique identifier (pseries machines can routinely have dozens of PCI host bridges). Theoretically that breaks migration streams, but given that we don't yet have migration support for pseries, it doesn't matter. Any other machines that have working migration support including PCI devices will need to be updated to maintain migration stream compatibility. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-07-04hw/p*: pass owner to memory_region_init* functionsPaolo Bonzini1-5/+7
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-07-04spapr_iommu: pass device to spapr_tce_new_table and use it to set ownerPaolo Bonzini1-1/+2
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-07-04memory: add owner argument to initialization functionsPaolo Bonzini1-5/+5
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-07-01spapr-rtas: add CPU argument to RTAS callsAnthony Liguori1-6/+7
RTAS is a hypervisor provided binary blob that a guest loads and calls into to execute certain functions. It's similar to the vsyscall page in Linux or the short lived VMCI paravirt interface from VMware. The QEMU implementation of the RTAS blob is simply a passthrough that proxies all RTAS calls to the hypervisor via an hypercall. While we pass a CPU argument for hypercall handling in QEMU, we don't pass it for RTAS calls. Since some RTAs calls require making hypercalls (normally RTAS is implemented as guest code) we have nasty hacks to allow that. Add a CPU argument to RTAS call handling so we can more easily invoke hypercalls just as guest code would. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-06-20memory: give name to every AddressSpaceAlexey Kardashevskiy1-1/+3
The "info mtree" command in QEMU console prints only "memory" and "I/O" address spaces while there are actually a lot more other AddressSpace structs created by PCI and VIO devices. Those devices do not normally have names and therefore not present in "info mtree" output. The patch fixes this. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-06-20pci: use memory core for iommu supportAvi Kivity1-4/+4
Use the new iommu support in the memory core for iommu support. The only user, spapr, is also converted, but it still provides a DMAContext interface until the non-PCI bits switch to AddressSpace. Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Avi Kivity <avi.kivity@gmail.com> [ Do not calls memory_region_del_subregion() on the device's bus_master_enable_region, it is an alias; return an AddressSpace from the IOMMU hook and remove the destructor hook. - David Gibson ] Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-06-20spapr: convert TCE API to use an opaque typePaolo Bonzini1-4/+4
The TCE table is currently returned as a DMAContext, and non-type-safe APIs are called later passing back the DMAContext. Since we want to move away from DMAContext, use an opaque type instead, and add an accessor to retrieve the DMAContext from it. Acked-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-08hw: move PCI bridges to hw/pci-* or hw/ARCHPaolo Bonzini1-0/+839
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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