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2013-03-10Merge remote-tracking branch 'origin/master' into stagingAnthony Liguori3-1/+33
* origin/master: (75 commits) tcg: Don't make exitreq flag a local temporary Makefile: Add subdir dependency on config-devices-all.mak make_device_config.sh: Emit dependency file to directory where included Revert "make_device_config.sh: Fix target path in generated dependency file" s390/virtio-ccw: remove redundant call to blockdev_mark_auto_del s390/css: Fix subchannel detection Allow virtio-net features for legacy s390 virtio bus s390: virtio-ccw maintainer s390: simplify kvm cpu init pseries: Add compatible property to root of device tree target-ppc: Move CPU aliases out of translate_init.c target-ppc: Report CPU aliases for QMP target-ppc: List alias names alongside CPU models target-ppc: Make host CPU a subclass of the host's CPU model PPC: xnu kernel expects FLUSH to be cleared on STOP PPC: Fix dma interrupt target-ppc: Fix PPC_DUMP_SPR_ACCESS build target-ppc: Synchronize FPU state with KVM target-ppc: Add mechanism for synchronizing SPRs with KVM Save memory allocation in the elf loader ...
2013-03-10Merge remote-tracking branch 'bonzini/hw-dirs' into stagingAnthony Liguori20-17/+10412
* bonzini/hw-dirs: sh: move files referencing CPU to hw/sh4/ ppc: move more files to hw/ppc ppc: move files referencing CPU to hw/ppc/ m68k: move files referencing CPU to hw/m68k/ i386: move files referencing CPU to hw/i386/ arm: move files referencing CPU to hw/arm/ hw: move boards and other isolated files to hw/ARCH ppc: express FDT dependency of pSeries and e500 boards via default-configs/ build: always link device_tree.o into emulators if libfdt available hw: include hw header files with full paths ppc: do not use ../ in include files vt82c686: vt82c686 is not a PCI host bridge virtio-9p: remove PCI dependencies from hw/9pfs/ virtio-9p: use CONFIG_VIRTFS, not CONFIG_LINUX hw: move device-hotplug.o to toplevel, compile it once hw: move qdev-monitor.o to toplevel directory hw: move fifo.[ch] to libqemuutil hw: move char backends to backends/ Conflicts: backends/baum.c backends/msmouse.c hw/a15mpcore.c hw/arm/Makefile.objs hw/arm/pic_cpu.c hw/dataplane/event-poll.c hw/dataplane/virtio-blk.c include/char/baum.h include/char/msmouse.h qemu-char.c vl.c Resolve conflicts caused by header movements. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-03-08PPC: Fix dma interruptAmadeusz Sławiński1-1/+1
In openbios (drivers/ide.c) they are set to 0000000d 00000000 00000002 00000000 0000000e 00000000 00000003 00000000 0000000f 00000000 00000004 00000000 (The last one seems to be not implemented in qemu) It follows convention of how they are set on real machines, both ide and dma ones are increased Real machine one: http://web.archive.org/web/20090107151044/http://penguinppc.org/historical/dev-trees-html/g4_agp_500_2.html 00000013 00000001 0000000b 00000000 00000014 00000001 0000000c 00000000 00000015 00000001 0000000d 00000000 Signed-off-by: Amadeusz Sławiński <amade@asmblr.net> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08pci_host: Drop write-only address_space fieldPeter Maydell1-1/+0
The address_space field of PCIHostState was only ever written, never used. Drop it completely. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2013-03-01ppc: move more files to hw/ppcPaolo Bonzini5-4/+1693
These sPAPR files do not implement devices, move them over. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-03-01ppc: move files referencing CPU to hw/ppc/Paolo Bonzini6-7/+2329
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-03-01hw: move boards and other isolated files to hw/ARCHPaolo Bonzini8-7/+6392
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-03-01ppc: express FDT dependency of pSeries and e500 boards via default-configs/Paolo Bonzini1-2/+2
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-03-01build: always link device_tree.o into emulators if libfdt availablePaolo Bonzini1-1/+0
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-03-01ppc: do not use ../ in include filesPaolo Bonzini3-3/+3
This simplifies the scripted execution of the next patch. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-02-16e500: Replace open-coded loop with qemu_get_cpu()Andreas Färber1-8/+3
Since we still need env for ppc-specific fields, obtain it via the new env_ptr fields to avoid "cpu" name conflicts between CPUState and PowerPCCPU for now. This fixes a potential issue with env being NULL at the end of the loop but cpu still being a valid pointer corresponding to a previous env. Acked-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-01-30Merge remote-tracking branch 'afaerber-or/prep-up' into stagingAnthony Liguori2-1/+682
# By Andreas Färber # Via Andreas Färber * afaerber-or/prep-up: prep: Move PReP machine to hw/ppc/ prep_pci: Convert to QOM realizefn prep_pci: Create PCIBus and PCIDevice in-place
2013-01-30prep: Move PReP machine to hw/ppc/Andreas Färber2-1/+682
Signed-off-by: Andreas Färber <andreas.faerber@web.de>
2013-01-27fw_cfg: Remove FW_CFG_MAX_CPUS from fw_cfg_init()Eduardo Habkost2-0/+2
PC will not use max_cpus for that field, so move it outside the common code so it can use a different value on PC. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-01-25PPC: e500: Select MPIC v4.2 on ppce500 platformScott Wood4-3/+9
The compatible string is changed to fsl,mpic on all e500 platforms, to advertise the existence of BRR1. This matches what the device tree will have on real hardware. With MPIC v4.2 max_cpu can be increased from 15 to 32. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-01-25PPC: e500: fix mpic_iack addressScott Wood1-1/+1
MPIC+0xa0 is IACK for the current CPU. MPIC+0x200a0 is IACK for CPU 0. This fix allows EPR to work with an SMP target. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-01-25cuda: Move ADB bus into CUDA stateAndreas Färber3-4/+12
Replace the global adb_bus with a CUDA-internal one, accessed using regular qdev child bus accessor. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-01-25adb: QOM'ify ADB devicesAndreas Färber2-4/+8
They were not qdev'ified before. Derive ADBDevice from DeviceState and convert reset callbacks to DeviceClass::reset, ADBDevice::opaque pointer to ADBDevice subtypes for mouse and keyboard and adb_{kbd,mouse}_init() to regular qdev functions. Fixing Coding Style issues and splitting keyboard and mouse off into their own files is left for a later point in time. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-01-25cuda: QOM'ify CUDAAndreas Färber3-23/+84
It was not qdev'ified before. Turn it into a SysBusDevice and embed it in MacIO. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-01-25ide/macio: QOM'ify MacIO IDEAndreas Färber3-30/+59
It was not qdev'ified before. Turn it into a SysBusDevice. Embed them into the MacIO devices. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-01-25mac_nvram: QOM'ify MacIO NVRAMAndreas Färber3-14/+25
It was not qdev'ified before. Turn it into a SysBusDevice and initialize it via static properties. Prepare Old World specific MacIO state and embed the NVRAM state there. Drop macio_nvram_setup_bar() in favor of sysbus_mmio_map() or direct use of Memory API. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-01-25mac_nvram: Clean up public APIAndreas Färber1-2/+2
The state data field is accessed in uint8_t quantities, so switch from uint32_t argument and return value to uint8_t. Fix debug format specifiers while at it. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-01-25macio: Split MacIO in twoAndreas Färber3-6/+12
Let the machines create two different types. This prepares to move knowledge about sub-devices from the machines into the devices. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-01-25ppc: Move Mac machines to hw/ppc/Andreas Färber4-4/+891
Signed-off-by: Andreas Färber <afaerber@suse.de> [agraf: squash in MAINTAINERS fix] Signed-off-by: Alexander Graf <agraf@suse.de>
2013-01-21sysbus: Drop sysbus_from_qdev() cast macroAndreas Färber1-2/+2
Replace by SYS_BUS_DEVICE() QOM cast macro using a scripted conversion. Avoids the old macro creeping into new code. Resolve a Coding Style warning in openpic code. Signed-off-by: Andreas Färber <afaerber@suse.de> Cc: Anthony Liguori <anthony@codemonkey.ws> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-01-18PPC: e500: Change in-memory order of load blobsAlexander Graf1-1/+6
Today, we load <kernel> <initrd> <dtb> into memory in that order. However, Linux has a bug where it can only handle the dtb if it's within the first 64MB of where <kernel> starts. So instead, let's change the order to <kernel> <dtb> <initrd> making Linux happy. Signed-off-by: Alexander Graf <agraf@suse.de>
2013-01-18PPC: E500: Calculate loading blob offsets properlyAlexander Graf1-4/+8
We have 3 blobs we need to load when booting the system: - kernel - initrd - dtb We place them in physical memory in that order. At least we should. This patch fixes the location calculation up to take any module into account, fixing the dtb offset along the way. Reported-by: Stuart Yoder <stuart.yoder@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-01-15Make default boot order machine specificAvik Sil2-0/+2
This patch makes default boot order machine specific instead of set globally. The default boot order can be set per machine in QEMUMachine boot_order. This also allows a machine to receive a NULL boot order when -boot isn't used and take an appropriate action accordingly. This helps machine boots from the devices as set in guest's non-volatile memory location in case no boot order is provided by the user. Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by: Avik Sil <aviksil@linux.vnet.ibm.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-01-15cpu: Move cpu_index field to CPUStateAndreas Färber1-6/+11
Note that target-alpha accesses this field from TCG, now using a negative offset. Therefore the field is placed last in CPUState. Pass PowerPCCPU to [kvm]ppc_fixup_cpu() to facilitate this change. Move common parts of mips cpu_state_reset() to mips_cpu_reset(). Acked-by: Richard Henderson <rth@twiddle.net> (for alpha) [AF: Rebased onto ppc CPU subclasses and openpic changes] Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-01-07PPC: Bring EPR support closer to realityAlexander Graf1-2/+2
We already used to support the external proxy facility of FSL MPICs, but only implemented it halfway correctly. This patch adds support for * dynamic enablement of the EPR facility * interrupt acknowledgement only when the interrupt is delivered This way the implementation now is closer to real hardware. Signed-off-by: Alexander Graf <agraf@suse.de>
2013-01-07PPC: KVM: set has-idle in guest device treeStuart Yoder1-0/+4
On e500mc, the platform doesn't provide a way for the CPU to go idle. To still not uselessly burn CPU time, expose an idle hypercall to the guest if kvm supports it. Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com> [agraf: adjust for current code base, add patch description, fix non-kvm case] Signed-off-by: Alexander Graf <agraf@suse.de>
2012-12-23Merge branch 'master' of git://git.qemu.org/qemu into qom-cpuAndreas Färber4-11/+12
Adapt header include paths. Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-12-19ppc_booke: Pass PowerPCCPU to ppc_booke_timers_init()Andreas Färber1-1/+1
Cleans up after passing PowerPCCPU to timer callbacks. Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-12-19softmmu: move include files to include/sysemu/Paolo Bonzini3-6/+6
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-12-19misc: move include files to include/qemu/Paolo Bonzini1-2/+2
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-12-19exec: move include files to include/exec/Paolo Bonzini1-1/+1
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-12-19net: reorganize headersPaolo Bonzini1-1/+1
Move public headers to include/net, and leave private headers in net/. Put the virtio headers in include/net/tap.h, removing the multiple copies that existed. Leave include/net/tap.h as the interface for NICs, and net/tap_int.h as the interface for OS-specific parts of the tap backend. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-12-19janitor: do not rely on indirect inclusions of or from qemu-char.hPaolo Bonzini1-0/+1
Various header files rely on qemu-char.h including qemu-config.h or main-loop.h, but they really do not need qemu-char.h at all (particularly interesting is the case of the block layer!). Clean this up, and also add missing inclusions of qemu-char.h itself. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-12-17Merge commit '1dd3a74d2ee2d873cde0b390b536e45420b3fe05' into HEADPaolo Bonzini2-2/+2
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-12-17pci: update all users to look in pci/Michael S. Tsirkin1-1/+1
update all users so we can remove the makefile hack. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-12-17pci: move pci core code to hw/pciMichael S. Tsirkin1-1/+1
Move files and modify makefiles to pick them at the new location. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-12-14PPC: e500: pci: Export slot2irq calculationAlexander Graf1-1/+4
We need the calculation method to get from a PCI slot ID to its respective interrupt line twice. Once in the internal map function and once when assembling the device tree. So let's extract the calculation to a separate function that can be called by both users. Signed-off-by: Alexander Graf <agraf@suse.de>
2012-12-14PPC: E500plat: Make a lot of PCI slots availableAlexander Graf1-2/+3
The ppce500 machine doesn't have to stick to hardware limitations, as it's defined as being fully device tree based. Thus we can change the initial PCI slot ID to 0x1 which gives us a whopping 31 PCI devices we can support with this machine now! Signed-off-by: Alexander Graf <agraf@suse.de>
2012-12-14PPC: E500: Move PCI slot information into paramsAlexander Graf4-1/+9
We have a params struct that allows us to expose differences between e500 machine models. Include PCI slot information there, so we can have different machines with different PCI slot topology. Signed-off-by: Alexander Graf <agraf@suse.de>
2012-12-14PPC: E500: Generate dt pci irq map dynamicallyAlexander Graf1-20/+31
Today we're hardcoding the PCI interrupt map in the e500 machine file. Instead, let's write it dynamically so that different machine types can have different slot properties. Signed-off-by: Alexander Graf <agraf@suse.de>
2012-12-14PPC: e500: Add MSI supportAlexander Graf1-0/+23
Now that our interrupt controller supports MSIs, let's expose that feature to the guest through the device tree! Signed-off-by: Alexander Graf <agraf@suse.de>
2012-12-14openpic: convert to qdevAlexander Graf1-5/+19
This patch converts the OpenPIC device to qdev. Along the way it renames the "openpic" target to "raven" and the "mpic" target to "fsl_mpic_20", to better reflect the actual models they implement. This way we have a generic OpenPIC device now that can handle different flavors of the OpenPIC specification. Signed-off-by: Alexander Graf <agraf@suse.de>
2012-12-14openpic: remove irq_outAlexander Graf1-1/+1
The current openpic emulation contains half-ready code for bypass mode. Remove it, so that when someone wants to finish it they can start from a clean state. Signed-off-by: Alexander Graf <agraf@suse.de>
2012-12-14mpic: Unify numbering schemeAlexander Graf1-2/+2
MPIC interrupt numbers in Linux (device tree) and in QEMU are different, because QEMU takes the sparseness of the IRQ number space into account. Remove that cleverness and instead assume a flat number space. This makes the code easier to understand, because we are actually aligned with Linux on the view of our worlds. Signed-off-by: Alexander Graf <agraf@suse.de>
2012-12-14Adding BAR0 for e500 PCI controllerBharat Bhushan2-9/+63
PCI Root complex have TYPE-1 configuration header while PCI endpoint have type-0 configuration header. The type-1 configuration header have a BAR (BAR0). In Freescale PCI controller BAR0 is used for mapping pci address space to CCSR address space. This can used for 2 purposes: 1) for MSI interrupt generation 2) Allow CCSR registers access when configured as PCI endpoint, which I am not sure is a use case with QEMU-KVM guest. What I observed is that when guest read the size of BAR0 of host controller configuration header (TYPE1 header) then it always reads it as 0. When looking into the QEMU hw/ppce500_pci.c, I do not find the PCI controller device registering BAR0. I do not find any other controller also doing so may they do not use BAR0. There are two issues when BAR0 is not there (which I can think of): 1) There should be BAR0 emulated for PCI Root complex (TYPE1 header) and when reading the size of BAR0, it should give size as per real h/w. 2) Do we need this BAR0 inbound address translation? When BAR0 is of non-zero size then it will be configured for PCI address space to local address(CCSR) space translation on inbound access. The primary use case is for MSI interrupt generation. The device is configured with an address offsets in PCI address space, which will be translated to MSI interrupt generation MPIC registers. Currently I do not understand the MSI interrupt generation mechanism in QEMU and also IIRC we do not use QEMU MSI interrupt mechanism on e500 guest machines. But this BAR0 will be used when using MSI on e500. I can see one more issue, There are ATMUs emulated in hw/ppce500_pci.c, but i do not see these being used for address translation. So far that works because pci address space and local address space are 1:1 mapped. BAR0 inbound translation + ATMU translation will complete the address translation of inbound traffic. Signed-off-by: Bharat Bhushan <bharat.bhushan@freescale.com> [agraf: fix double variable assignment w/o read] Signed-off-by: Alexander Graf <agraf@suse.de>
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