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2014-03-13cputlb: Change tlb_flush() argument to CPUStateAndreas Färber1-1/+1
Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-02-11exec: Make stw_*_phys input an AddressSpaceEdgar E. Iglesias1-1/+1
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2014-02-11exec: Make stl_*_phys input an AddressSpaceEdgar E. Iglesias1-1/+1
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2013-12-23pci-host: Consistently set cannot_instantiate_with_device_add_yetMarkus Armbruster1-0/+6
Many PCI host bridges consist of a sysbus device and a PCI device. You need both for the thing to work. Arguably, these bridges should be modelled as a single, composite devices instead of pairs of seemingly independent devices you can only use together, but we're not there, yet. Since the sysbus part can't be instantiated with device_add, yet, permitting it with the PCI part is useless. We shouldn't offer useless options to the user, so let's set cannot_instantiate_with_device_add_yet for them. It's already set for Bonito, Grackle, i440FX and Raven. Document why. Set it for the others: dec-21154, e500-host-bridge, gt64120_pci, mch, pbm-pci, ppc4xx-host-bridge, sh_pci_host, u3-agp, uni-north-agp, uni-north-internal-pci, uni-north-pci, and versatile_pci_host. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Marcel Apfelbaum <marcel.a@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-11-05shix: Don't require firmware presence for qtestAndreas Färber1-4/+5
Adopt error_report() while at it. Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-11-05shix: Drop debug outputAndreas Färber1-7/+0
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-08-28hw: Clean up bogus default boot orderMarkus Armbruster2-2/+0
We set default boot order "cad" in every single machine definition except "pseries" and "moxiesim", even though very few boards actually care for boot order, and "cad" makes sense for even fewer. Machines that care: * pc and its variants Accept up to three letters 'a', 'b' (undocumented alias for 'a'), 'c', 'd' and 'n'. Reject all others (fatal with -boot). * nseries (n800, n810) Check whether order starts with 'n'. Silently ignored otherwise. * prep, g3beige, mac99 Extract the first character the machine understands (subset of 'a'..'f'). Silently ignored otherwise. * spapr Accept an arbitrary string (vl.c restricts it to contain only 'a'..'p', no duplicates). * sun4[mdc] Use the first character. Silently ignored otherwise. Strip characters these machines ignore from their default boot order. For all other machines, remove the unused default boot order alltogether. Note that my rename of QEMUMachine member boot_order to default_boot_order and QEMUMachineInitArgs member boot_device to boot_order has a welcome side effect: it makes every use of boot orders visible in this patch, for easy review. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-07-25sh4: unbreak r2dPaolo Bonzini1-14/+25
... by making sh_pci a subclass of TYPE_PCI_HOST_BRIDGE. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Message-id: 1374501278-31549-20-git-send-email-pbonzini@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-25sh4: do not use isa_mmioPaolo Bonzini1-1/+2
This fixes endianness bugs in I/O port access (for sh4eb). Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Message-id: 1374501278-31549-2-git-send-email-pbonzini@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-08Merge remote-tracking branch 'mst/tags/for_anthony' into stagingAnthony Liguori1-1/+4
pci,misc enhancements This includes some pci enhancements: Better support for systems with multiple PCI root buses FW cfg interface for more robust pci programming in BIOS Minor fixes/cleanups for fw cfg and cross-version migration - because of dependencies with other patches Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Sun 07 Jul 2013 03:11:18 PM CDT using RSA key ID D28D5469 # gpg: Can't check signature: public key not found # By David Gibson (10) and others # Via Michael S. Tsirkin * mst/tags/for_anthony: pci: Fold host_buses list into PCIHostState functionality pci: Remove domain from PCIHostBus pci: Simpler implementation of primary PCI bus pci: Add root bus parameter to pci_nic_init() pci: Add root bus argument to pci_get_bus_devfn() pci: Replace pci_find_domain() with more general pci_root_bus_path() pci: Use helper to find device's root bus in pci_find_domain() pci: Abolish pci_find_root_bus() pci: Move pci_read_devaddr to pci-hotplug-old.c pci: Cleanup configuration for pci-hotplug.c pvpanic: fix fwcfg for big endian hosts pvpanic: initialization cleanup MAINTAINERS: s/Marcelo/Paolo/ e1000: cleanup process_tx_desc pc_piix: cleanup init compat handling pc: pass PCI hole ranges to Guests pci: store PCI hole ranges in guestinfo structure range: add Range structure Message-id: 1373228271-31223-1-git-send-email-mst@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-07pci: Add root bus parameter to pci_nic_init()David Gibson1-1/+4
At present, pci_nic_init() and pci_nic_init_nofail() assume that they will only create a NIC under the primary PCI root. As we add support for multiple PCI roots, that may no longer be the case. This patch adds a root bus parameter to pci_nic_init() (and updates callers accordingly) to allow the machine init code using it to specify the right PCI root for NICs created by old-style -net nic parameters. NICs created new-style, with -device can of course be put anywhere. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-07-04hw/s*: pass owner to memory_region_init* functionsPaolo Bonzini1-3/+3
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-07-04memory: add owner argument to initialization functionsPaolo Bonzini4-15/+15
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-15arm: fix location of some include filesPeter Maydell1-1/+1
The recent rearrangement of include files had some minor errors: devices.h is not ARM specific and should not be in arm/ arm.h should be in arm/ Move these two headers to correct this. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-13sh7750: Change cpu field type to SuperHCPUAndreas Färber3-50/+51
This brings us a step closer to QOM'ified SH7750 SoC and fixes b350ab75 (target-sh4: Move PVR/PRR/CVR into SuperHCPUClass) assuming SuperHCPU type for SUPERH_CPU_GET_CLASS(). Fix Coding Style issues while at it (indentation, braces). Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-04-13shix: Catch CPU initialization errorsAndreas Färber1-0/+4
Print an error message as done for the r2d machine and exit. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-04-08hw: move private headers to hw/ subdirectories.Paolo Bonzini5-5/+1288
Many headers are used only in a single directory. These can be kept in hw/. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-08hw: move interrupt controllers to hw/intc/, configure with default-configs/Paolo Bonzini1-4/+0
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-08hw: move PCI bridges to hw/pci-* or hw/ARCHPaolo Bonzini2-1/+188
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-08hw: move timer devices to hw/timer/, configure with default-configs/Paolo Bonzini1-1/+1
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-08hw: move char devices to hw/char/, configure via default-configs/Paolo Bonzini1-1/+1
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-08hw: move display devices to hw/display/, configure via default-configs/Paolo Bonzini1-1/+1
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-08hw: move block devices to hw/block/, configure via default-configs/Paolo Bonzini1-1/+0
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-08hw: make all of hw/ide/ configurable via default-configs/Paolo Bonzini1-1/+0
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-08hw: move headers to include/Paolo Bonzini4-7/+7
Many of these should be cleaned up with proper qdev-/QOM-ification. Right now there are many catch-all headers in include/hw/ARCH depending on cpu.h, and this makes it necessary to compile these files per-target. However, fixing this does not belong in these patches. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-03-12target-sh4: Move PVR/PRR/CVR into SuperHCPUClassAndreas Färber1-3/+7
They are never changed once initialized, and moving them to the class will allow to inspect them before instantiating. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-03-01sh: move files referencing CPU to hw/sh4/Paolo Bonzini3-1/+938
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-03-01hw: move boards and other isolated files to hw/ARCHPaolo Bonzini3-1/+470
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-06-07build: move obj-TARGET-y variables to nested Makefile.objsPaolo Bonzini1-0/+5
Also drop duplicate occurrence of device-hotplug.o. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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