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2013-03-07hw/nand.c: correct the sense of the BUSY/READY status bitKuo-Jung Su1-1/+2
The BIT6 of Status Register(SR): SR[6] behaves the same as R/B# pin SR[6] = 0 indicates the device is busy; SR[6] = 1 means the device is ready Some NAND flash controller (i.e. ftnandc021) relies on the SR[6] to determine if the NAND flash erase/program is success or error timeout. P.S: The exmaple NAND flash datasheet could be found at following link: http://www.mxic.com.tw/QuickPlace/hq/PageLibrary4825740B00298A3B.nsf/h_Index/8FEA549237D2F7674825795800104C26/$File/MX30LF1G08AA,%203V,%201Gb,%20v1.1.pdf Signed-off-by: Kuo-Jung Su <dantesu@gmail.com> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2013-03-05scsi-disk: handle io_canceled uniformly and correctlyPaolo Bonzini1-4/+21
Always check it immediately after calling bdrv_acct_done, and always do a "goto done" in case the "done" label has to free some memory---as is the case for scsi_unmap_complete in the previous patch. This patch could fix problems that happen when a request is split into multiple parts, and one of them is canceled. Then the next part is fired, but the HBA's cancellation callbacks have fired already. Whether this happens or not, depends on how the block/ driver implements AIO cancellation. It it does a simple bdrv_drain_all() or similar, then it will not have a problem. If it only cancels the given AIOCB, this scenario could happen. Cc: qemu-stable@nongnu.org Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-03-05scsi-disk: do not complete canceled UNMAP requestsPaolo Bonzini1-4/+7
Canceled requests should never be completed, and doing that could cause accesses to a NULL hba_private field. Cc: qemu-stable@nongnu.org Reported-by: Stefan Priebe <s.priebe@profihost.ag> Tested-by: Stefan Priebe <s.priebe@profihost.ag> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-03-05scsi: do not call scsi_read_data/scsi_write_data for a canceled requestPaolo Bonzini1-0/+4
Cc: qemu-stable@nongnu.org Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-03-05hw/kvm/arm_gic: Implement support for KVM in-kernel ARM GICPeter Maydell3-1/+175
Implement support for using the KVM in-kernel GIC for ARM. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Andreas Färber <afaerber@suse.de>
2013-03-05hw/arm_gic: Convert ARM GIC classes to use init/realizePeter Maydell4-29/+37
Convert the ARM GIC classes to use init/realize rather than SysBusDevice::init. (We have to do them all in one patch to avoid unconverted subclasses calling a nonexistent SysBusDevice init function in the base class and crashing.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Andreas Färber <afaerber@suse.de>
2013-03-05hw/arm_gic: Add presave/postload hooksPeter Maydell2-0/+12
Add presave/postload hooks to the ARM GIC common base class. These will be used by the KVM in-kernel GIC subclass to sync state between kernel and userspace when migrating. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
2013-03-05ARM: KVM: Add support for KVM on ARM architectureChristoffer Dall1-0/+26
Add basic support for KVM on ARM architecture. Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu> [PMM: Minor tweaks and code cleanup, switch to ONE_REG] Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
2013-03-04Merge remote-tracking branch 'stefanha/block' into stagingAnthony Liguori6-163/+33
# By MORITA Kazutaka (5) and others # Via Stefan Hajnoczi * stefanha/block: block: for HMP commit() operations on 'all', skip non-COW drives sheepdog: add support for connecting to unix domain socket sheepdog: use inet_connect to simplify connect code sheepdog: accept URIs move socket_set_nodelay to osdep.c slirp/tcp_subr.c: fix coding style in tcp_connect dataplane: remove EventPoll in favor of AioContext virtio-blk: fix unplug + virsh reboot ide/macio: Fix macio DMA initialisation.
2013-03-04Merge remote-tracking branch 'mst/tags/for_anthony' into stagingAnthony Liguori9-22/+163
virtio,vhost,pci,e1000 Mostly bugfixes, but also some ICH work by Laszlo. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Thu 28 Feb 2013 07:13:56 AM CST using RSA key ID D28D5469 # gpg: Can't check signature: public key not found # By Michael S. Tsirkin (2) and others # Via Michael S. Tsirkin * mst/tags/for_anthony: Set virtio-serial device to have a default of 2 MSI vectors. ICH9 LPC: Reset Control Register, basic implementation Fix guest OS hang when 64bit PCI bar present e1000: unbreak the guest network migration to 1.3 vhost: memory sync fixes
2013-03-04Merge remote-tracking branch 'stefanha/net' into stagingAnthony Liguori1-2/+4
# By Jason Wang (2) and others # Via Stefan Hajnoczi * stefanha/net: qmp: netdev_add is like -netdev, not -net, fix documentation doc: document -netdev hubport net: reduce the unnecessary memory allocation of multiqueue tap: set IFF_ONE_QUEUE per default tap: forbid creating multiqueue tap when hub is used net: fix unbounded NetQueue net: fix qemu_flush_queued_packets() in presence of a hub
2013-03-04dataplane: remove EventPoll in favor of AioContextPaolo Bonzini4-161/+29
During the review of the dataplane code, the EventPoll API morphed itself (not concidentially) into something very very similar to an AioContext. Thus, it is trivial to convert virtio-blk-dataplane to use AioContext, and a first baby step towards letting dataplane talk directly to the QEMU block layer. The only interesting note is the value-copy of EventNotifiers. At least in my opinion this is part of the EventNotifier API and is even portable to Windows. Of course, in this case you should not close the notifier's underlying file descriptors or handle with event_notifier_cleanup. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2013-03-04virtio-blk: fix unplug + virsh rebootChristian Borntraeger1-1/+3
virtio-blk registers a vmstate change handler. Unfortunately this handler is not unregistered on unplug, leading to some random crashes if the system is restarted, e.g. via virsh reboot. Lets unregister the vmstate change handler if the device is removed. Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2013-03-04ide/macio: Fix macio DMA initialisation.Mark Cave-Ayland1-1/+1
Commit 07a7484e5d713f1eb7c1c37b18a8ab0d56d88875 accidentally introduced a bug in the initialisation of the second macio DMA device which could cause some DMA operations to segfault QEMU. CC: Andreas Färber <afaerber@suse.de> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2013-03-01sh: move files referencing CPU to hw/sh4/Paolo Bonzini3-1/+3
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-03-01ppc: move more files to hw/ppcPaolo Bonzini5-4/+4
These sPAPR files do not implement devices, move them over. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-03-01ppc: move files referencing CPU to hw/ppc/Paolo Bonzini6-7/+6
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-03-01m68k: move files referencing CPU to hw/m68k/Paolo Bonzini3-1/+2
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-03-01i386: move files referencing CPU to hw/i386/Paolo Bonzini2-1/+3
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-03-01arm: move files referencing CPU to hw/arm/Paolo Bonzini8-5/+8
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-03-01hw: move boards and other isolated files to hw/ARCHPaolo Bonzini85-62/+72
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-03-01ppc: express FDT dependency of pSeries and e500 boards via default-configs/Paolo Bonzini1-2/+2
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-03-01build: always link device_tree.o into emulators if libfdt availablePaolo Bonzini3-3/+0
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-03-01hw: include hw header files with full pathsPaolo Bonzini487-1604/+1604
Done with this script: cd hw for i in `find . -name '*.h' | sed 's/^..//'`; do echo '\,^#.*include.*["<]'$i'[">], s,'$i',hw/&,' done | sed -i -f - `find . -type f` This is so that paths remain valid as files are moved. Instead, files in hw/dataplane are referenced with the relative path. We know they are not going to move to include/, and they are the only include files that are in subdirectories _and_ move. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-03-01ppc: do not use ../ in include filesPaolo Bonzini3-3/+3
This simplifies the scripted execution of the next patch. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-03-01vt82c686: vt82c686 is not a PCI host bridgePaolo Bonzini1-2/+0
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-03-01virtio-9p: remove PCI dependencies from hw/9pfs/Paolo Bonzini7-60/+55
Also move the 9p.h file to 9pfs/virtio-9p-device.h, for consistency with the corresponding .c file. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-03-01virtio-9p: use CONFIG_VIRTFS, not CONFIG_LINUXPaolo Bonzini2-3/+3
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-03-01hw: move device-hotplug.o to toplevel, compile it oncePaolo Bonzini2-89/+0
The situation with device-hotplug.c is similar to qdev-monitor.c. Add a stub for pci_drive_hot_add, so that it can be compiled once, and move it out of hw/. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-03-01hw: move qdev-monitor.o to toplevel directoryPaolo Bonzini19-703/+18
qdev-monitor.c is the only "core qdev" file that is not used in user-mode emulation, and it does not define anything that is used by hardware models. Remove it from the hw/ directory and remove hw/qdev-monitor.h from hw/qdev.h too; this requires some files to have some new explicitly includes. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-03-01hw: move fifo.[ch] to libqemuutilPaolo Bonzini5-180/+2
fifo.c is generic code that can be easily unit tested. So it belongs in libqemuutil. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-03-01hw: move char backends to backends/Paolo Bonzini5-745/+1
Braille and msmouse support is in hw/, but it is not hardware. Move it to the backends/ directory. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-02-28cadence_gem: Add debug msgs for rx desc movementPeter Crosthwaite1-0/+2
Add some helpful messages that show the rx descriptor pointer moving as packets are rxed. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1ef2eb34dade64d589a69a2bcfd5aaddb7d50164.1360901435.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-02-28cadence_gem: Don't reset rx desc pointer on rx_enPeter Crosthwaite1-4/+0
This doesn't happen in the real hardware. The Zynq TRM explicitly states that this bit has no effect on the rx descriptor pointer ("The receive queue pointer register is unaffected"). Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 06fdf92b78ee62d8965779bafd29c8df1a5d2718.1360901435.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-02-28cadence_gem: fix interrupt eventsPeter Crosthwaite1-23/+4
Bits in the ISR were continually mirroring their corresponding TX/RX SR bits. This is incorrect. The ISR bits are only ever set at the time their corresponding event occurs. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: cedfb6d108318846480b416a6041023ea5a353d6.1360901435.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-02-28cadence_gem: factor out can_rx() logic replicationPeter Crosthwaite1-1/+1
The gem_receive() function replicates the logic for whether or not the device can rx. Just call the actual gem_can_receive() function in place. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: bf7f93969f3e01fbc76d68d2955307fdbad11bb1.1360901435.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-02-28cadence_gem: Flush queued packetsPeter Crosthwaite1-0/+3
The device needs to check for queued RX packets when the RX path is re-enabled. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1fa8c88a3b7c654886d0a7484c2463cd4c2a2781.1360901435.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-02-28m25p80.c: Use QOM classes for part differentiationPeter Crosthwaite3-31/+33
Currently, M25P80 uses an object property to differentiate between flash parts. Changed this over to use QOM sub-classes - the actual names of the different parts are used to create a set of dynamic classes which passes the part info as class data. The object no longer needs to search the known_devices table for itself, instead it just gets its info from its own class. Kept the intermediate class definition private to m25p80.c for the moment, as the expectation is parts will only be added as new entries in the table. We can factor out the TYPE_M25P80 abstraction into a header on a demand basis. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: e24e156d-ff96-4901-997a-e31178b08bee@VA3EHSMHS021.ehs.local Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-02-28xilinx_zynq: Added SD controllersPeter Crosthwaite1-0/+10
The Xilinx Zynq device has two SDHCI controllers. Added to the machine model. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-02-28hw/sdhci: introduce standard SD host controllerIgor Mitsyanko3-0/+1613
Device model for standard SD Host Controller Interface (SDHCI) compliant with version 2.00 of SD association specification. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Igor Mitsyanko <i.mitsyanko@samsung.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-02-28arm: a9mpcore: Coreify the SCUPeter Crosthwaite3-113/+174
Split the SCU in a9mpcore out into its own object definition. mpcore is now just a container for the mpcore components. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-02-28arm: a9mpcore: remove old_timer_status fieldPeter Crosthwaite1-8/+3
This field was write only and thus unused. Removed. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-02-28arm: mptimer: Remove WDT distinctionPeter Crosthwaite3-64/+41
In QEMU emulation, there is no functional difference between the ARM mpcore private timers and watchdogs. Removed all the distinction between the two from arm_mptimer.c and converted it to be just the mptimer. a9mpcore and arm11mpcore just instantiate the same mptimer object twice to get both timer and WDT. If in the future we want to make the WDT functionally different then we can use either QOM hierarchy to derive WDT from from mptimer, or we can add a property "is-wdt" or some such. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-02-28arm: arm11mpcore, a9mpcore: CamelCased type namesPeter Crosthwaite2-23/+23
To conform with QEMU coding style. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-02-28arm: mptimer: CamelCased type namesPeter Crosthwaite1-28/+28
Trivial find replace on type names "timerblock" and "arm_mptimer_state" to conform with QEMU coding style. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-02-28hw/pflash_cfi01: Treat read in unknown command state as readPeter Maydell1-5/+6
The code for handling the default "unknown command state" case in pflash_read in pflash_cfi01.c comments "reset state & treat it as a read". However the code doesn't actually do this. Moving the default case to the top of the switch so it can fall through into the read case brings this file into line with pflash_cfi02 and makes the code behave as the comments suggest. The pflash_cfi01 code has always had this bug -- it was presumably introduced when the original author copied the cfi02 code and rearranged the order of the switch statement without noticing that the default case relied on the fall-through. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Tested-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1358777318-7579-3-git-send-email-peter.maydell@linaro.org
2013-02-28hw/pflash_cfi01: Make read after byte-write or erase return statusPeter Maydell1-0/+3
The Intel flash command set requires that a read operation after doing a 'single byte write' command returns the status register; add this case to pflash_read() so we return the correct information. Similarly, the case for the 0x28 flavour of block erase was missing. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Tested-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1358777318-7579-2-git-send-email-peter.maydell@linaro.org
2013-02-28hw/ds1338: Fix conversion between 12 hours and 24 hours modes.Antoine Mathys1-4/+4
The proper mapping between 24 hours and 12 hours modes is: 0 12 AM 1-11 1-11 AM 12 12 PM 13-23 1-11 PM Fix code accordingly. Signed-off-by: Antoine Mathys <barsamin@gmail.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-02-27Set virtio-serial device to have a default of 2 MSI vectors.Gal Hammer2-1/+9
The virtio-serial device is expected to use 2 MSI vectors, one for control queue and a second shared for all queues. Signed-off-by: Gal Hammer <ghammer@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-02-27ICH9 LPC: Reset Control Register, basic implementationLaszlo Ersek2-0/+68
This commit does the same for the ICH9 LPC as commit 1ec4ba74 for the PIIX3. For the present we're ignoring the Full Reset (FULL_RST) and System Reset (SYS_RST) bits; the guest can read them back but that's it. Signed-off-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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