| Age | Commit message (Collapse) | Author | Files | Lines |
|---|
|
A lot of real world LEON3 systems are shipped with the GRMON boot
loader. This boot loader initializes the stack pointer with the end of
RAM address. The application can use this to detect the RAM size of a
particular board variant.
Signed-off-by: Sebastian Huber <sebastian.huber@embedded-brains.de>
Reviewed-by: Fabien Chouteau <chouteau@adacore.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
|
|
acpi,pc,pci fixes and enhancements
Most changes here are hotplug related:
This merges hotplug infrastructure changes by Igor,
some acpi related fixes, and PC fixes.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
# gpg: Signature made Mon 10 Feb 2014 09:13:26 GMT using RSA key ID D28D5469
# gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>"
# gpg: aka "Michael S. Tsirkin <mst@redhat.com>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67
# Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469
* remotes/mst/tags/for_upstream:
ACPI: Remove commented-out code from HPET._CRS
hw/pci: switch to a generic hotplug handling for PCIDevice
pci/pcie: convert PCIE hotplug to use hotplug-handler API
pci/shpc: convert SHPC hotplug to use hotplug-handler API
acpi/piix4pm: convert ACPI PCI hotplug to use hotplug-handler API
qdev:pci: refactor PCIDevice to use generic "hotpluggable" property
hw/acpi: move typeinfo to the file end
qdev: add "hotpluggable" property to Device
qdev: add to BusState "hotplug-handler" link
define hotplug interface
loader: document that errno is set
pc.c: better error message on initrd sizing failure
pc_piix: enable legacy hotplug for Xen
qtest: don't report signals if qtest driver enabled
hw:piix4:acpi: reuse pcihp code for legacy PCI hotplug
pcihp: remove unused AcpiPciHpPciStatus.device_present field
pcihp: make pci_read() mmio calback compatible with legacy ACPI hotplug
pcihp: make PCI hotplug mmio handlers indifferent to PCI_HOTPLUG_ADDR
pcihp: replace enable|disable_device() with oneliners
pcihp: reduce number of device check events
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
|
|
staging
PReP machine and devices
* Cleanups for Raven PCI host bridge
* Removal of PReP machine and devices from qemu-system-ppcemb
# gpg: Signature made Mon 10 Feb 2014 16:19:03 GMT using RSA key ID 3E7E013F
# gpg: Good signature from "Andreas Färber <afaerber@suse.de>"
# gpg: aka "Andreas Färber <afaerber@suse.com>"
* remotes/afaerber/tags/prep-for-upstream:
prep: Drop from ppcemb-softmmu
raven: Use constant PCI_NUM_PINS instead of 4
prep: Kill get_system_io() usage
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
|
|
This is to allow future patches to set properties before cpu::realize().
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
|
|
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
|
|
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
|
|
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
|
|
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
|
|
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
|
|
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
|
|
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
|
|
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
|
|
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
|
|
'remotes/pmaydell/tags/pull-target-arm-20140208' into staging
target-arm queue:
* more A64 Neon instructions
* AArch32 VCVTB and VCVTT ARMv8 instructions
* fixes to inaccuracies in GIC emulation
* libvixl disassembler for A64
* Allwinner SoC ethernet controller
* zynq software system reset support
# gpg: Signature made Sat 08 Feb 2014 15:53:05 GMT using RSA key ID 14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
* remotes/pmaydell/tags/pull-target-arm-20140208: (29 commits)
arm/zynq: Add software system reset via SCLR
hw/arm/allwinner-a10: initialize EMAC
hw/net: add support for Allwinner EMAC Fast Ethernet controller
util/fifo8: clear fifo head upon reset
util/fifo8: implement push/pop of multiple bytes
disas: Implement disassembly output for A64
disas/libvixl: Fix upstream libvixl compilation issues
disas: Add subset of libvixl sources for A64 disassembler
rules.mak: Link with C++ if we have a C++ compiler
rules.mak: Support .cc as a C++ source file suffix
arm_gic: Add GICC_APRn state to the GICState
vmstate: Add uint32 2D-array support
arm_gic: Support setting/getting binary point reg
arm_gic: Keep track of SGI sources
arm_gic: Fix GIC pending behavior
target-arm: Add support for AArch32 64bit VCVTB and VCVTT
target-arm: A64: Add FNEG and FABS to the SIMD 2-reg-misc group
target-arm: A64: Add 2-reg-misc REV* instructions
target-arm: A64: Add narrowing 2-reg-misc instructions
target-arm: A64: Implement 2-reg-misc CNT, NOT and RBIT
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
|
|
* remotes/kvaneesh/for-upstream:
hw/9pfs: fix P9_STATS_GEN handling
hw/9pfs: make get_st_gen() return ENOTTY error on special files
hw/9pfs: handle undefined FS_IOC_GETVERSION case in handle_ioc_getversion()
hw/9pfs: fix error handing in local_ioc_getversion()
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
|
|
ppcemb covers only embedded processors, which does not include PReP.
Signed-off-by: Andreas Färber <andreas.faerber@web.de>
|
|
IRQNoFlags on HPET._CRS crashes WinXP because it causes the HPET
to conflict with the system timer and/or the RTC. It only occurs
on Apple hardware, and even there it is exposed fully only when
OS X is detected (via _OSI). Recent OS X versions work on QEMU
without this statement, so at this time there is no need to find
a better way to conditionally include the statement. This patch
removes the commented out (and wrong, should have been {0, 8})
statement from HPET._CRS.
Signed-off-by: Gabriel Somlo <somlo@cmu.edu>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-By: Igor Mammedov <imammedo@redhat.com>
|
|
make qdev_unplug()/device_set_realized() to call hotplug handler's
plug/unplug methods if available and remove not needed anymore
hot(un)plug handling from PCIDevice.
In case if hotplug handler is not available, revert to the legacy
hotplug method for compatibility with not yet converted buses.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
|
|
Split pcie_cap_slot_hotplug() into hotplug/unplug callbacks
and register them as "hotplug-handler" interface implementation of
PCIE_SLOT device.
Replace pci_bus_hotplug() wiring with setting link on PCI BUS
"hotplug-handler" property to PCI_BRIDGE_DEV device.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
|
|
Split shpc_device_hotplug() into hotplug/unplug callbacks
and register them as "hotplug-handler" interface implementation of
PCI_BRIDGE_DEV device.
Replace pci_bus_hotplug() wiring with setting link on PCI BUS
"hotplug-handler" property to PCI_BRIDGE_DEV device.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
|
|
Split piix4_device_hotplug() into hotplug/unplug callbacks
and register them as "hotplug-handler" interface implementation of
PIIX4_PM device.
Replace pci_bus_hotplug() wiring with setting link on
PCI BUS "hotplug-handler" property to PIIX4_PM device.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
|
|
Get rid of PCIDevice specific PCIDeviceClass.no_hotplug and use
generic DeviceClass.hotpluggable field instead.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
|
|
do so to avoid not necessary forward declarations and
place typeinfo registration at the file end where it's
usually expected.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
|
|
Currently it's possible to make PCIDevice not hotpluggable
by using no_hotplug field of PCIDeviceClass. However it
limits this only to PCI devices and prevents from
generalizing hotplug code.
So add similar field to DeviceClass so it could be reused
with other Devices and would allow to replace PCI specific
hotplug callbacks with generic implementation. Following
patches will replace PCIDeviceClass.no_hotplug with this
new property.
In addition expose field as "hotpluggable" readonly property,
to make it possible to read its value via QOM interface.
Make DeviceClass hotpluggable by default as it was assumed
before.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
|
|
It will allow to reuse field with different BUSes,
reducing code duplication. Field is intended for
replacing 'hotplug_qdev' field in PCIBus and also
will allow to avoid adding equivalent field to
DimmBus with possiblitity to refactor other BUSes
to use it instead of custom field.
In addition once all users of allow_hotplug field
are converted to new API, link could replace
allow_hotplug field in qdev hotplug code.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
|
|
Provide a generic hotplug interface for hotplug handlers.
Intended for replacing hotplug mechanism used by
PCI/PCIE/SHPC code and will be used for memory hotplug.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
|
|
Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
Signed-off-by: Andreas Färber <andreas.faerber@web.de>
|
|
While ISA address space in prep machine is currently the one returned
by get_system_io(), this depends of the implementation of i82378/raven
devices, and this may not be the case forever.
Use the right ISA address space when adding some more ports to it.
We can use whatever ISA device on the right ISA bus, as all ISA devices
on the same ISA bus share the same ISA address space.
Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
Signed-off-by: Andreas Färber <andreas.faerber@web.de>
|
|
staging
target-lm32: fixes
# gpg: Signature made Tue 04 Feb 2014 18:47:56 GMT using DSA key ID 3F98A378
# gpg: Can't check signature: public key not found
* remotes/mwalle/tags/lm32-fixes/20140204:
hw/lm32: print error if cpu model is not found
target-lm32: stop VM on illegal or unknown instruction
lm32_sys: dump cpu state if test case fails
lm32_sys: print test result on stderr
target-lm32: add breakpoint/watchpoint support
target-lm32: move model features to LM32CPU
target-lm32: kill cpu_abort() calls
milkymist-vgafb: swap pixel data in source buffer
lm32_uart/lm32_juart: use qemu_chr_fe_write_all()
milkymist-uart: use qemu_chr_fe_write_all() instead of qemu_chr_fe_write()
tests: lm32: new rule for single test cases
lm32_sys: increase test case name length limit
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
|
|
Support software-driven system reset via the register in the SCLR.
Signed-off-by: Sebastian Huber <sebastian.huber@embedded-brains.de>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
|
|
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
|
|
This patch adds support for the Fast Ethernet MAC found on Allwinner
SoCs, together with a basic emulation of Realtek RTL8201CP PHY.
Since there is no public documentation of the Allwinner controller, the
implementation is based on Linux kernel driver.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
|
|
The GICC_APRn registers are not currently supported by the ARM GIC v2.0
emulation. This patch adds the missing state.
Note that we also change the number of APRs to use a define GIC_NR_APRS
based on the maximum number of preemption levels. This patch also adds
RAZ/WI accessors for the four registers on the emulated CPU interface.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
|
|
Add a binary_point field to the gic emulation structure and support
setting/getting this register now when we have it. We don't actually
support interrupt grouping yet, oh well.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
|
|
Right now the arm gic emulation doesn't keep track of the source of an
SGI (which apparently Linux guests don't use, or they're fine with
assuming CPU 0 always).
Add the necessary matrix on the GICState structure and maintain the data
when setting and clearing the pending state of an IRQ and make the state
visible to the guest.
Note that we always choose to present the source as the lowest-numbered
CPU in case multiple cores have signalled the same SGI number to a core
on the system.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
|
|
The existing implementation of the pending behavior in gic_set_irq,
gic_complete_irq, and the distributor pending set/clear registers does
not follow the semantics of the GICv2.0 specs, but may implement the
11MPCore support. Therefore, maintain the existing semantics for
11MPCore and v7M NVIC and change the behavior to be in accordance with
the GICv2.0 specs for "generic implementations" (s->revision == 1 ||
s->revision == 2).
Generic implementations distinguish between setting a level-triggered
interrupt pending through writes to the GICD_ISPENDR and when hardware
raises the interrupt line. Writing to the GICD_ICPENDR will not cause
the interrupt to become non-pending if the line is still active, and
conversely, if the line is deactivated but the interrupt is marked as
pending through a write to GICD_ISPENDR, the interrupt remains pending.
Handle this situation in the GIC_TEST_PENDING (which now becomes a
static inline named gic_test_pending) and let the 'pending' field
correspond only to the latched state of the D-flip flop in the GICv2.0
specs Figure 4-10.
The following changes are added:
gic_test_pending:
Make this a static inline and split out the 11MPCore from the generic
behavior. For the generic behavior, consider interrupts pending if:
((s->irq_state[irq].pending & (cm) != 0) ||
(!GIC_TEST_EDGE_TRIGGER(irq) && GIC_TEST_LEVEL(irq, cm))
gic_set_irq:
Split out the 11MPCore from the generic behavior. For the generic
behavior, always GIC_SET_LEVEL() on positive level, but only
GIC_SET_PENDING for edge-triggered interrupts and always simply
GIC_CLEAR_LEVEL() on negative level.
gic_complete_irq:
Only resample the line for line-triggered interrupts on an 11MPCore.
Generic implementations will sample the line directly in
gic_test_pending().
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
|
|
'remotes/juanquintela/tags/migration/20140204-1' into staging
migration/next for 20140204
# gpg: Signature made Tue 04 Feb 2014 15:52:00 GMT using RSA key ID 5872D723
# gpg: Can't check signature: public key not found
* remotes/juanquintela/tags/migration/20140204-1:
Don't abort on memory allocation error
Don't abort on out of memory when creating page cache
XBZRLE cache size should not be larger than guest memory size
migration:fix free XBZRLE decoded_buf wrong
Add check for cache size smaller than page size
Set xbzrle buffers to NULL after freeing them to avoid double free errors
exec: fix ram_list dirty map optimization
vmstate: Make VMSTATE_STRUCT_POINTER take type, not ptr-to-type
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
|
|
misc spice patches
# gpg: Signature made Mon 03 Feb 2014 15:05:29 GMT using RSA key ID D3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>"
# gpg: aka "Gerd Hoffmann <gerd@kraxel.org>"
# gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>"
* remotes/spice/tags/pull-spice-2:
spice: hook qemu_chr_fe_set_open() event to ports
Add the ability to vary Spice playback and record rates, to facilitate Opus support.
hw/display/qxl: fix signed to unsigned comparison
qxl: clear irq on reset
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
|
|
into staging
trivial patches for 2014-02-02
# gpg: Signature made Sun 02 Feb 2014 16:11:37 GMT using RSA key ID 74F0C838
# gpg: Good signature from "Michael Tokarev <mjt@tls.msk.ru>"
# gpg: aka "Michael Tokarev <mjt@corpit.ru>"
# gpg: aka "Michael Tokarev <mjt@debian.org>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 6EE1 95D1 886E 8FFB 810D 4324 457C E0A0 8044 65C5
# Subkey fingerprint: E190 8639 3B10 B51B AC2C 8B73 5253 C5AD 74F0 C838
* remotes/mjt/tags/trivial-patches-2014-02-02:
tests/.gitignore: Ignore tests/check-qom-interface
hw/ppc: Remove unused defines
readline: Add missing GCC_FMT_ATTR
tcg/s390: Remove sigill_handler
i386: Add missing include file for QEMU_PACKED
osdep: drop unused #include "trace.h"
qemu 1.7.0 does not build on NetBSD
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
|
|
staging
Block pull request
# gpg: Signature made Fri 31 Jan 2014 21:16:43 GMT using RSA key ID 81AB73C8
# gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>"
# gpg: aka "Stefan Hajnoczi <stefanha@gmail.com>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35 775A 9CA4 ABB3 81AB 73C8
* remotes/stefanha/tags/block-pull-request:
qemu-iotests: only run 071 on qcow2
dataplane: Comment fix
block/vhdx: Error checking fixes
qemu-iotests: Drop assert_no_active_commit in case 040
block/vmdk: add basic .bdrv_check support
block: remove qcow2 .bdrv_make_empty implementation
block: remove QED .bdrv_make_empty implementation
Describe flaws in qcow/qcow2 encryption in the docs
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
|
|
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
|
|
xenfv has no fwcfg and so does not load acpi from QEMU.
as such new acpi features don't work.
Reported-by: Sander Eikelenboom <linux@eikelenboom.it>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
|
|
reduces acpi PCI hotplug code duplication by ~200LOC
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
|
|
due to recent change introduced by:
"pcihp: reduce number of device check events"
'up' field is cleared right after it's read.
This is incompatible with legacy BIOS ACPI code
where PCNF ACPI method reads this field 32 times.
To make pci_read mmio callback compatible with legacy
'up' behavior, pcihp code will need to know in which
mode it runs add 'legacy_piix' field to AcpiPciHpState
structure and alter register behavior accordingly.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
|
|
... removes dependency of mmio handler on PCI_HOTPLUG_ADDR.
It will be needed in case of Q35 where base could be different.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
|
|
enable_device() and disable_device() functions aren't reused anywere,
so replace them with respective oneliners at call sites.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
|
|
PIIX created a made-up value for the UP register since it was read by
guest 32 times for each interrupt.
There's no reason to do this for the new PCIHP: register is only read
once for each interrupt, so clean up code by making read act as an
interrupt acknowledgement: the new UP register clear on read.
In this way we cut down the number of bus rescans
by a factor of 32, and drop a bunch of code that's
now unused.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
|
|
QEMU crashed if a the given cpu_model is not found.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
|
|
This will ease debugging the test cases.
Signed-off-by: Michael Walle <michael@walle.cc>
|
|
Do not use qemu_log().
Signed-off-by: Michael Walle <michael@walle.cc>
|
