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2016-06-28hw/sh4/sh_pci.c: Use ldl_le_p() and stl_le_p()Peter Maydell1-2/+2
Use ldl_le_p() and stl_le_p() instead of le32_to_cpup() and cpu_to_le32w(); the former handle misaligned addresses and don't need casts, and the latter are deprecated. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Eric Blake <eblake@redhat.com> Acked-by: Aurelien Jarno <aurelien@aurel32.net> Message-id: 1465575021-3774-1-git-send-email-peter.maydell@linaro.org
2016-06-28Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into ↵Peter Maydell4-44/+101
staging # gpg: Signature made Tue 28 Jun 2016 14:23:24 BST # gpg: using RSA key 0x9CA4ABB381AB73C8 # gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>" # gpg: aka "Stefan Hajnoczi <stefanha@gmail.com>" # Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35 775A 9CA4 ABB3 81AB 73C8 * remotes/stefanha/tags/block-pull-request: virtio-blk: add num-queues device property virtio-blk: dataplane multiqueue support virtio-blk: live migrate s->rq with multiqueue virtio-blk: associate request with a virtqueue virtio-blk: tell dataplane which vq to notify virtio-blk: multiqueue batch notify virtio-blk: add VirtIOBlockConf->num_queues dma-helpers: dma_blk_io() cancel support Revert "virtio: sync the dataplane vring state to the virtqueue before virtio_save" Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-06-28virtio-blk: add num-queues device propertyStefan Hajnoczi1-2/+13
Multiqueue virtio-blk can be enabled as follows: qemu -device virtio-blk-pci,num-queues=8 Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Fam Zheng <famz@redhat.com> Message-id: 1466511196-12612-8-git-send-email-stefanha@redhat.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2016-06-28virtio-blk: dataplane multiqueue supportStefan Hajnoczi1-16/+34
Monitor ioeventfds for all virtqueues in the device's AioContext. This is not true multiqueue because requests from all virtqueues are processed in a single IOThread. In the future it will be possible to use multiple IOThreads when the QEMU block layer supports multiqueue. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Fam Zheng <famz@redhat.com> Message-id: 1466511196-12612-7-git-send-email-stefanha@redhat.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2016-06-28virtio-blk: live migrate s->rq with multiqueueStefan Hajnoczi1-1/+19
Add a field for the virtqueue index when migrating the s->rq request list. The new field is only needed when num_queues > 1. Existing QEMUs are unaffected by this change and therefore virtio-blk migration stays compatible. Suggested-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Fam Zheng <famz@redhat.com> Message-id: 1466511196-12612-6-git-send-email-stefanha@redhat.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2016-06-28virtio-blk: associate request with a virtqueueStefan Hajnoczi1-9/+11
Multiqueue requires that each request knows to which virtqueue it belongs. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Fam Zheng <famz@redhat.com> Message-id: 1466511196-12612-5-git-send-email-stefanha@redhat.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2016-06-28virtio-blk: tell dataplane which vq to notifyStefan Hajnoczi3-4/+4
Let the virtio_blk_data_plane_notify() caller decide which virtqueue to notify. This will allow the function to be used with multiqueue. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Fam Zheng <famz@redhat.com> Message-id: 1466511196-12612-4-git-send-email-stefanha@redhat.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2016-06-28virtio-blk: multiqueue batch notifyStefan Hajnoczi1-6/+23
The batch notification BH needs to know which virtqueues to notify when multiqueue is enabled. Use a bitmap to track the virtqueues with pending notifications. At this point there is only one virtqueue so hard-code virtqueue index 0. A later patch will switch to real virtqueue indices. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Fam Zheng <famz@redhat.com> Message-id: 1466511196-12612-3-git-send-email-stefanha@redhat.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2016-06-28virtio-blk: add VirtIOBlockConf->num_queuesStefan Hajnoczi1-0/+1
The num_queues field is always 1 for the time being. A later patch will make it a configurable device property so that multiqueue can be enabled. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Fam Zheng <famz@redhat.com> Message-id: 1466511196-12612-2-git-send-email-stefanha@redhat.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2016-06-28Revert "virtio: sync the dataplane vring state to the virtqueue before ↵Stefan Hajnoczi2-10/+0
virtio_save" This reverts commit 10a06fd65f667a972848ebbbcac11bdba931b544. Dataplane has used the same virtqueue code as non-dataplane since commits e24a47c5b73e04f94030e2daa356c7582aebfca2 ("virtio-scsi: do not use vring in dataplane") and 03de2f527499ae0c6d16a379665d072345254f2c ("virtio-blk: do not use vring in dataplane"). It is no longer necessary to stop dataplane in order to sync state since there is no duplicated virtqueue state. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com> Reviewed-by: Pavel Butsykin <pbutsykin@virtuozzo.com> Message-id: 1466503331-9831-1-git-send-email-stefanha@redhat.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2016-06-28Merge remote-tracking branch 'remotes/jasowang/tags/net-pull-request' into ↵Peter Maydell4-142/+158
staging # gpg: Signature made Tue 28 Jun 2016 04:29:53 BST # gpg: using RSA key 0xEF04965B398D6211 # gpg: Good signature from "Jason Wang (Jason Wang on RedHat) <jasowang@redhat.com>" # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: 215D 46F4 8246 689E C77F 3562 EF04 965B 398D 6211 * remotes/jasowang/tags/net-pull-request: vmxnet3: Fix reading/writing guest memory specially when behind an IOMMU rtl8139: save/load RxMulOk counter (again) Change net/socket.c to use socket_*() functions net: mipsnet: check transmit buffer size before sending net: fix qemu_announce_self not emitting packets Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-06-28misc/aspeed_scu: Fix build error caused by missing headerPranith Kumar1-0/+1
Tracing configurations error out currently as follows: /home/travis/build/pranith/qemu/hw/misc/aspeed_scu.c: In function ‘aspeed_scu_read’: /home/travis/build/pranith/qemu/hw/misc/aspeed_scu.c:130:9: error: implicit declaration of function ‘qemu_log_mask’ [-Werror=implicit-function-declaration] /home/travis/build/pranith/qemu/hw/misc/aspeed_scu.c:130:9: error: nested extern declaration of ‘qemu_log_mask’ [-Werror=nested-externs] /home/travis/build/pranith/qemu/hw/misc/aspeed_scu.c:130:23: error: ‘LOG_GUEST_ERROR’ undeclared (first use in this function) /home/travis/build/pranith/qemu/hw/misc/aspeed_scu.c:130:23: note: each undeclared identifier is reported only once for each function it appears in /home/travis/build/pranith/qemu/hw/misc/aspeed_scu.c: In function ‘aspeed_scu_write’: /home/travis/build/pranith/qemu/hw/misc/aspeed_scu.c:154:23: error: ‘LOG_GUEST_ERROR’ undeclared (first use in this function) This is caused by a missing header file. Fix it. Signed-off-by: Pranith Kumar <bobby.prani@gmail.com> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Message-id: 20160627215304.821-1-bobby.prani@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-06-28vmxnet3: Fix reading/writing guest memory specially when behind an IOMMUKarimAllah Ahmed2-113/+139
When a PCI device lives behind an IOMMU, it should use 'pci_dma_*' family of functions when any transfer from/to guest memory is required while 'cpu_physical_memory_*' family of functions completely bypass any MMU/IOMMU in the system. vmxnet3 in some places was using 'cpu_physical_memory_*' family of functions which works fine with the default QEMU setup where IOMMU is not enabled but fails miserably when IOMMU is enabled. This commit converts all such instances in favor of 'pci_dma_*' Cc: Dmitry Fleytman <dmitry@daynix.com> Cc: Jason Wang <jasowang@redhat.com> Cc: qemu-devel@nongnu.org Cc: Anthony Liguori <aliguori@amazon.com> Signed-off-by: KarimAllah Ahmed <karahmed@amazon.de> Acked-by: Dmitry Fleytman <dmitry@daynix.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
2016-06-28rtl8139: save/load RxMulOk counter (again)David Vrabel1-26/+14
Commit 9d29cdeaaca3a0383af764000b71492c4fc67c6e (rtl8139: port TallyCounters to vmstate) introduced in incompatibility in the v4 format as it omitted the RxOkMul counter. There are presumably no users that were impacted by the v4 to v4' breakage, so increase the save version to 5 and re-add the field, keeping backward compatibility with v4'. We can't have a field conditional on the section version in vmstate_tally_counters since this version checked would not be the section version (but the version defined in this structure). So, move all the fields into the main state structure. Signed-off-by: David Vrabel <david.vrabel@citrix.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
2016-06-28net: mipsnet: check transmit buffer size before sendingPrasad J Pandit1-3/+5
When processing MIPSnet I/O port write operation, it uses a transmit buffer tx_buffer[MAX_ETH_FRAME_SIZE=1514]. Two indices 's->tx_written' and 's->tx_count' are used to control data written to this buffer. If the two were to be equal before writing, it'd lead to an OOB write access beyond tx_buffer. Add check to avoid it. Reported-by: Li Qiang <qiang6-s@360.cn> Signed-off-by: Prasad J Pandit <pjp@fedoraproject.org> Signed-off-by: Jason Wang <jasowang@redhat.com>
2016-06-27macio: Use blk_drain instead of blk_drain_allFam Zheng1-1/+1
We only care about the associated backend, so blk_drain is more appropriate here. Signed-off-by: Fam Zheng <famz@redhat.com> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Reviewed-by: John Snow <jsnow@redhat.com> Message-id: 20160612065603.21911-1-famz@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
2016-06-27hw/net/e1000: Don't use *_to_cpup()Peter Maydell3-13/+13
Don't use *_to_cpup() to do byte-swapped loads; instead use ld*_p() which correctly handle misaligned accesses. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Acked-by: Jason Wang <jasowang@redhat.com> Acked-by: Dmitry Fleytman <dmitry@daynix.com <mailto:dmitry@daynix.com>> Message-id: 1466097446-981-6-git-send-email-peter.maydell@linaro.org
2016-06-27hw/net/virtio-net.c: Don't use *_to_cpup()Peter Maydell1-1/+1
Don't use *_to_cpup() to do byte-swapped loads; instead use ld*_p() which correctly handle misaligned accesses. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Acked-by: Jason Wang <jasowang@redhat.com> Acked-by: Dmitry Fleytman <dmitry@daynix.com <mailto:dmitry@daynix.com>> Message-id: 1466097446-981-5-git-send-email-peter.maydell@linaro.org
2016-06-27hw/net/rocker: Don't use *_to_cpup()Peter Maydell1-3/+3
Don't use *_to_cpup() to do byte-swapped loads; instead use ld*_p() which correctly handle misaligned accesses. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Acked-by: Jason Wang <jasowang@redhat.com> Acked-by: Dmitry Fleytman <dmitry@daynix.com <mailto:dmitry@daynix.com>> Message-id: 1466097446-981-4-git-send-email-peter.maydell@linaro.org
2016-06-27hw/net/rtl8139.c: Don't use *_to_cpup()Peter Maydell1-5/+4
Don't use *_to_cpup() to do byte-swapped loads; instead use ld*_p() which correctly handle misaligned accesses. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Acked-by: Jason Wang <jasowang@redhat.com> Acked-by: Dmitry Fleytman <dmitry@daynix.com <mailto:dmitry@daynix.com>> Message-id: 1466097446-981-3-git-send-email-peter.maydell@linaro.org
2016-06-27hw/net/eepro100.c: Don't use cpu_to_*w() and *_to_cpup()Peter Maydell1-4/+4
Don't use cpu_to_*w() and *_to_cpup() to do byte-swapped loads and stores; instead use ld*_p() and st*_p() which correctly handle misaligned accesses. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Acked-by: Jason Wang <jasowang@redhat.com> Acked-by: Dmitry Fleytman <dmitry@daynix.com <mailto:dmitry@daynix.com>> Message-id: 1466097446-981-2-git-send-email-peter.maydell@linaro.org
2016-06-27m25p80: Fix WINBOND fast read command handlingMarcin Krzeminski1-2/+5
This commit fix obvious bug in WINBOND command handling. Datasheet states that default dummy cycles is 8 so fix it. Signed-off-by: Marcin Krzeminski <marcin.krzeminski@nokia.com> Message-id: 1466755631-25201-11-git-send-email-marcin.krzeminski@nokia.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-06-27m25p80: New flash devices.Marcin Krzeminski1-6/+13
Macronix: mx66u51235f and mx66u1g45g Micron: mt25ql01g and mt25qu01g Spansion: s25fs512s and s70fs01gs Signed-off-by: Marcin Krzeminski <marcin.krzeminski@nokia.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-id: 1466755631-25201-10-git-send-email-marcin.krzeminski@nokia.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-06-27m25p80: Fast read commands family changes.Marcin Krzeminski1-37/+117
Support for Spansion and Macronix flashes. Additionally Numonyx(Micron) moved from default in fast read commands family. Also moved fast read command decoding to functions. Signed-off-by: Marcin Krzeminski <marcin.krzeminski@nokia.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-id: 1466755631-25201-9-git-send-email-marcin.krzeminski@nokia.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-06-27m25p80: Introduce configuration registers.Marcin Krzeminski1-0/+47
Configuration registers for Spansion and Macronix devices. Signed-off-by: Marcin Krzeminski <marcin.krzeminski@nokia.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-id: 1466755631-25201-8-git-send-email-marcin.krzeminski@nokia.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-06-27m25p80: Introduce quad and equad modes.Marcin Krzeminski1-5/+65
Quad and Equad modes for Spansion and Macronix flash devices. This commit also includes modification and new command to manipulate quad mode (status registers and dedicated commands). This work is based on Pawel Lenkow work. Signed-off-by: Marcin Krzeminski <marcin.krzeminski@nokia.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-id: 1466755631-25201-7-git-send-email-marcin.krzeminski@nokia.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-06-27m25p80: Add additional flash commands:Marcin Krzeminski1-0/+9
Page program 4byte/quad and erase 32K sectors 4 bytes. Signed-off-by: Marcin Krzeminski <marcin.krzeminski@nokia.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-id: 1466755631-25201-6-git-send-email-marcin.krzeminski@nokia.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-06-27m25p80: Introduce COLLECTING_VAR_LEN_DATA state.Marcin Krzeminski1-0/+5
Some flash allows to stop read at any time. Allow framework to support this. Signed-off-by: Marcin Krzeminski <marcin.krzeminski@nokia.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-id: 1466755631-25201-5-git-send-email-marcin.krzeminski@nokia.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-06-27m25p80: Allow more than four banks.Marcin Krzeminski1-3/+2
Allow to have more than four 16MiB regions for bigger flash devices. Signed-off-by: Marcin Krzeminski <marcin.krzeminski@nokia.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-id: 1466755631-25201-4-git-send-email-marcin.krzeminski@nokia.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-06-27m25p80: Make a table for JEDEC ID.Marcin Krzeminski1-19/+42
Since it is now longer than 4. This work based on Pawel Lenkow changes and the kernel SPI framework. Signed-off-by: Marcin Krzeminski <marcin.krzeminski@nokia.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-id: 1466755631-25201-3-git-send-email-marcin.krzeminski@nokia.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-06-27m25p80: Replace JEDEC ID masking with function.Marcin Krzeminski1-9/+40
Instead of always reading and comparing jededc ID, replace it by function. Signed-off-by: Marcin Krzeminski <marcin.krzeminski@nokia.com> Message-id: 1466755631-25201-2-git-send-email-marcin.krzeminski@nokia.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-06-27palmetto-bmc: Configure the SCU's hardware strapping registerAndrew Jeffery1-0/+2
The magic constant configures the following options: * 28:27: Configure DRAM size as 256MB * 26:24: DDR3 SDRAM with CL = 6, CWL = 5 * 23: Configure 24/48MHz CLKIN * 22: Disable GPIOE pass-through mode * 21: Disable GPIOD pass-through mode * 20: Enable LPC decode of SuperIO 0x2E/0x4E addresses * 19: Disable ACPI * 18: Configure 48MHz CLKIN * 17: Disable BMC 2nd boot watchdog timer * 16: Decode SuperIO address 0x2E * 15: VGA Class Code * 14: Enable LPC dedicated reset pin * 13:12: Enable SPI Master and SPI Slave to AHB Bridge * 11:10: Select CPU:AHB ratio = 2:1 * 9:8: Select 384MHz H-PLL * 7: Configure MAC#2 for RMII/NCSI * 6: Configure MAC#1 for RMII/NCSI * 5: No VGA BIOS ROM * 4: Boot using 32bit SPI address mode * 3:2: Select 16MB VGA memory * 1:0: Boot from SPI flash memory Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Cédric Le Goater <clg@kaod.org> Message-id: 1466744305-23163-4-git-send-email-andrew@aj.id.au Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-06-27ast2400: Integrate the SCU model and set silicon revisionAndrew Jeffery1-0/+21
By specifying the silicon revision we select the appropriate reset values for the SoC. Additionally, expose hardware strapping properties aliasing those provided by the SCU for board-specific configuration. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1466744305-23163-3-git-send-email-andrew@aj.id.au Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-06-27hw/misc: Add a model for the ASPEED System Control UnitAndrew Jeffery3-0/+287
The SCU is a collection of chip-level control registers that manage the various functions supported by ASPEED SoCs. Typically the bits control interactions with clocks, external hardware or reset behaviour, and we can largly take a hands-off approach to reads and writes. Firmware makes heavy use of the state to determine how to boot, but the reset values vary from SoC to SoC (eg AST2400 vs AST2500). A qdev property is exposed so that the integrating SoC model can configure the silicon revision, which in-turn selects the appropriate reset values. Further qdev properties are exposed so the board model can configure the board-dependent hardware strapping. Almost all provided AST2400 reset values are specified by the datasheet. The notable exception is SOC_SCRATCH1, where we mark the DRAM as successfully initialised to avoid unnecessary dark corners in the SoC's u-boot support. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Message-id: 1466744305-23163-2-git-send-email-andrew@aj.id.au Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [PMM: drop unnecessary inttypes.h include] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-06-27cadence_gem: Set the last bit when wrap is setAlistair Francis1-0/+6
The Cadence GEM data sheet says: "Wrap - marks last descriptor in transmit buffer descriptor list. This can be set for any buffer within the frame." which seems to imply that when the wrap bit is set so is the last bit. Previously if the wrap bit is set, but the last is not then QEMU will enter an infinite loop. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reported-by: Li Qiang <liqiang6-s@360.cn> Reported-by: P J P <ppandit@redhat.com> Message-id: eb23f15c67989ea6a53609dc66568399dadf52a7.1466539342.git.alistair.francis@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-06-27cadence_gem: Avoid infinite loops with a misconfigured bufferAlistair Francis1-0/+7
A guest can write zero to the DMACFG resulting in an infinite loop when it reaches the while(bytes_to_copy) loop. To avoid this issue enforce a minimum size for the RX buffer. Hardware does not have this enforcement and relies on the guest to set a non-zero value. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reported-by: Li Qiang <liqiang6-s@360.cn> Reported-by: P J P <ppandit@redhat.com> Message-id: 84bb1c391b833275da3f573d4972920cea34c188.1466539342.git.alistair.francis@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-06-27cadence_uart: Protect against transmit errorsAlistair Francis1-2/+5
If qemu_chr_fe_write() returns an error (represented by a negative number) we should skip incrementing the count and initiating a memmove(). Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reported-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 667e5dc534d33338fcfc2471e5aa32fe7cbd13dc.1466546703.git.alistair.francis@xilinx.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-06-27hw/intc/arm_gicv3: Add missing breakShannon Zhao1-0/+2
These are spotted by coverity 1356936 and 1356937. Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> Message-id: 1466387717-13740-1-git-send-email-zhaoshenglong@huawei.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-06-27qapi: keep names in 'CpuInstanceProperties' in sync with struct CPUCorePeter Krempa1-2/+2
struct CPUCore uses 'id' suffix in the property name. As docs for query-hotpluggable-cpus state that the cpu core properties should be passed back to device_add by management in case new members are added and thus the names for the fields should be kept in sync. Signed-off-by: Peter Krempa <pkrempa@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> [dwg: Removed a duplicated word in comment] Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-06-27ppc/xics: Remove unused xics_set_irq_type()Benjamin Herrenschmidt1-11/+0
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> [dwg: Adjusted for context to apply without original series] Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-06-27target-ppc: ppce500_spin.c uses SPR_PIR, should use SPR_BOOKE_PIRAaron Larson1-1/+1
ppce500_spin.c uses SPR_PIR to initialize the spin table, however on Book E processors the correct SPR is SPR_BOOKE_PIR. Signed-off-by: Aaron Larson <alarson@ddci.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-06-24virtio-bus: remove old set_host_notifier callbackCornelia Huck3-37/+7
All users have been converted to the new ioevent callbacks. Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com> Reviewed-by: Fam Zheng <famz@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2016-06-24virtio-mmio: convert to ioeventfd callbacksCornelia Huck1-87/+41
Convert to the new interface. Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com> Reviewed-by: Fam Zheng <famz@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2016-06-24virtio-pci: convert to ioeventfd callbacksCornelia Huck1-83/+41
Convert to new interface. Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com> Reviewed-by: Fam Zheng <famz@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2016-06-24virtio-ccw: convert to ioeventfd callbacksCornelia Huck1-88/+45
Use the new interface. Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com> Reviewed-by: Fam Zheng <famz@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2016-06-24virtio-bus: have callers tolerate new host notifier apiCornelia Huck3-12/+42
Have vhost and dataplane use the new api for transports that have been converted. Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com> Reviewed-by: Fam Zheng <famz@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2016-06-24virtio-bus: common ioeventfd infrastructureCornelia Huck1-0/+132
Introduce a set of ioeventfd callbacks on the virtio-bus level that can be implemented by the individual transports. At the virtio-bus level, do common handling for host notifiers (which is actually most of it). Two things of note: - When setting the host notifier, we only switch from/to the generic ioeventfd handler. This fixes a latent bug where we had no ioeventfd assigned for a certain window. - We always iterate over all possible virtio queues, even though ccw (currently) has a lower limit. It does not really matter here. Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com> Reviewed-by: Fam Zheng <famz@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2016-06-24pc: acpi: drop intermediate PCMachineState.node_cpuIgor Mammedov2-18/+9
PCMachineState.node_cpu was used for mapping APIC ID to numa node id as CPU entries in SRAT used to be built on sparse APIC ID bitmap (up to apic_id_limit). However since commit 5803fce pc: acpi: SRAT: create only valid processor lapic entries CPU entries in SRAT aren't build using apic bitmap but using 0..maxcpus index instead which is also used for creating numa_info[x].node_cpu map. So instead of doing useless intermediate conversion from 1. node by cpu index -> node by apic id i.e. numa_info[x].node_cpu -> PCMachineState.node_cpu 2. apic id -> srat entry PMX PCMachineState.node_cpu[apic id] -> PMX value use numa_info[x].node_cpu map directly like ARM does and do 1. numa_info[x].node_cpu -> PMX value using index in range 0..maxcpus and drop not necessary PCMachineState.node_cpu and related code. That also removes the last (not counting legacy hotplug) dependency of ACPI code on apic_id_limit and need to allocate huge sparse PCMachineState.node_cpu array in case of 32-bit APIC IDs. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2016-06-24pc: use new CPU hotplug interface since 2.7 machine typeIgor Mammedov7-2/+109
For compatibility reasons PC/Q35 will start with legacy CPU hotplug interface by default but with new CPU hotplug AML code since 2.7 machine type. That way legacy firmware that doesn't use QEMU generated ACPI tables will be able to continue using legacy CPU hotplug interface. While new machine type, with firmware supporting QEMU provided ACPI tables, will generate new CPU hotplug AML, which will switch to new CPU hotplug interface when guest OS executes its _INI method on ACPI tables loading. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2016-06-24acpi: cpuhp: add cpu._OST handlingIgor Mammedov4-0/+90
it adds HW and AML parts for CPU_Device._OST method handling to allow OSPM reports status of hot-(un)plug operation. And extends QMP command query-acpi-ospm-status to report CPU's OST info along with already reported PC-DIMM devices. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
generated by cgit v1.2.1 (git 2.18.0) at 2024-06-30 01:34:15 +0000