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2016-09-27cpus-common: lock-free fast path for cpu_exec_start/endPaolo Bonzini1-2/+3
Set cpu->running without taking the cpu_list lock, only requiring it if there is a concurrent exclusive section. This requires adding a new field to CPUState, which records whether a running CPU is being counted in pending_cpus. When an exclusive section is started concurrently with cpu_exec_start, cpu_exec_start can use the new field to determine if it has to wait for the end of the exclusive section. Likewise, cpu_exec_end can use it to see if start_exclusive is waiting for that CPU. This a separate patch for easier bisection of issues. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-09-27tcg: Make tb_flush() thread safeSergey Fedorov2-3/+1
Use async_safe_run_on_cpu() to make tb_flush() thread safe. This is possible now that code generation does not happen in the middle of execution. It can happen that multiple threads schedule a safe work to flush the translation buffer. To keep statistics and debugging output sane, always check if the translation buffer has already been flushed. Signed-off-by: Sergey Fedorov <serge.fdrv@gmail.com> Signed-off-by: Sergey Fedorov <sergey.fedorov@linaro.org> [AJB: minor re-base fixes] Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <1470158864-17651-13-git-send-email-alex.bennee@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-09-27cpus-common: Introduce async_safe_run_on_cpu()Paolo Bonzini1-0/+14
Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-09-27cpus-common: simplify locking for start_exclusive/end_exclusivePaolo Bonzini1-4/+0
It is not necessary to hold qemu_cpu_list_mutex throughout the exclusive section, because no other exclusive section can run while pending_cpus != 0. exclusive_idle() is called in cpu_exec_start(), and that prevents any CPUs created after start_exclusive() from entering cpu_exec() during an exclusive section. Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-09-27cpus-common: move exclusive work infrastructure from linux-userPaolo Bonzini1-1/+43
This will serve as the base for async_safe_run_on_cpu. Because start_exclusive uses CPU_FOREACH, merge exclusive_lock with qemu_cpu_list_lock: together with a call to exclusive_idle (via cpu_exec_start/end) in cpu_list_add, this protects exclusive work against concurrent CPU addition and removal. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-09-27cpus-common: move CPU work item management to common codeSergey Fedorov1-8/+19
Make CPU work core functions common between system and user-mode emulation. User-mode does not use run_on_cpu, so do not implement it. Signed-off-by: Sergey Fedorov <serge.fdrv@gmail.com> Signed-off-by: Sergey Fedorov <sergey.fedorov@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <1470158864-17651-10-git-send-email-alex.bennee@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-09-27cpus-common: move CPU list management to common codePaolo Bonzini3-11/+17
Add a mutex for the CPU list to system emulation, as it will be used to manage safe work. Abstract manipulation of the CPU list in new functions cpu_list_add and cpu_list_remove. Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-09-27cpus: pass CPUState to run_on_cpu helpersAlex Bennée1-3/+5
CPUState is a fairly common pointer to pass to these helpers. This means if you need other arguments for the async_run_on_cpu case you end up having to do a g_malloc to stuff additional data into the routine. For the current users this isn't a massive deal but for MTTCG this gets cumbersome when the only other parameter is often an address. This adds the typedef run_on_cpu_func for helper functions which has an explicit CPUState * passed as the first parameter. All the users of run_on_cpu and async_run_on_cpu have had their helpers updated to use CPUState where available. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> [Sergey Fedorov: - eliminate more CPUState in user data; - remove unnecessary user data passing; - fix target-s390x/kvm.c and target-s390x/misc_helper.c] Signed-off-by: Sergey Fedorov <sergey.fedorov@linaro.org> Acked-by: David Gibson <david@gibson.dropbear.id.au> (ppc parts) Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> (s390 parts) Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <1470158864-17651-3-git-send-email-alex.bennee@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-09-27migration: sync all address spacesPaolo Bonzini1-4/+3
Migrating a VM during reboot sometimes results in differences between the source and destination in the SMRAM area. This is because migration_bitmap_sync() only fetches from KVM the dirty log of address_space_memory. SMRAM memory slots are ignored and the modifications to SMRAM are not sent to the destination. Reported-by: He Rongguang <herongguang.he@huawei.com> Reviewed-by: He Rongguang <herongguang.he@huawei.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-09-27compiler: Swap 'public domain' header for licenseFelipe Franciosi1-1/+5
As discussed on the list [1], having a comment stating that this file is "public domain" is arguably wrong and not legally binding. This patch replaces that comment with a clear GPLv2+ license as proposed in [2]. [1] http://lists.nongnu.org/archive/html/qemu-devel/2016-09/msg06151.html [2] http://lists.nongnu.org/archive/html/qemu-devel/2016-09/msg06217.html Worth noting, compiler.h was originally created on 5c026320 by splitting qemu-common.h. At the time, qemu-common.h was already GPLv2+. Signed-off-by: Felipe Franciosi <felipe@nutanix.com> Message-Id: <1474642971-11866-1-git-send-email-felipe@nutanix.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-09-27x86: ioapic: boost default version to 0x20Peter Xu1-0/+4
It's 2.8 now, and maybe it's time to switch IOAPIC default version to 0x20. Signed-off-by: Peter Xu <peterx@redhat.com> Message-Id: <1474608795-23058-1-git-send-email-peterx@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-09-27memory: introduce IOMMUOps.notify_flag_changedPeter Xu1-4/+5
The new interface can be used to replace the old notify_started() and notify_stopped(). Meanwhile it provides explicit flags so that IOMMUs can know what kind of notifications it is requested for. Acked-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Peter Xu <peterx@redhat.com> Message-Id: <1474606948-14391-3-git-send-email-peterx@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-09-27memory: introduce IOMMUNotifier and its capsPeter Xu2-8/+41
IOMMU Notifier list is used for notifying IO address mapping changes. Currently VFIO is the only user. However it is possible that future consumer like vhost would like to only listen to part of its notifications (e.g., cache invalidations). This patch introduced IOMMUNotifier and IOMMUNotfierFlag bits for a finer grained control of it. IOMMUNotifier contains a bitfield for the notify consumer describing what kind of notification it is interested in. Currently two kinds of notifications are defined: - IOMMU_NOTIFIER_MAP: for newly mapped entries (additions) - IOMMU_NOTIFIER_UNMAP: for entries to be removed (cache invalidates) When registering the IOMMU notifier, we need to specify one or multiple types of messages to listen to. When notifications are triggered, its type will be checked against the notifier's type bits, and only notifiers with registered bits will be notified. (For any IOMMU implementation, an in-place mapping change should be notified with an UNMAP followed by a MAP.) Signed-off-by: Peter Xu <peterx@redhat.com> Message-Id: <1474606948-14391-2-git-send-email-peterx@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-09-26Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingPeter Maydell5-6/+22
virtio, pc: fixes and features beginning of guest error handling for virtio devices amd iommu pc compat fixes Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Fri 23 Sep 2016 23:02:09 BST # gpg: using RSA key 0x281F0DB8D28D5469 # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * remotes/mst/tags/for_upstream: hw/i386: AMD IOMMU IVRS table hw/i386: Introduce AMD IOMMU hw/i386/trace-events: Add AMD IOMMU trace events hw/pci: Prepare for AMD IOMMU virtio: handle virtqueue_get_head() errors virtio: handle virtqueue_num_heads() errors virtio: handle virtqueue_read_next_desc() errors virtio: use unsigned int for virtqueue_get_avail_bytes() index virtio: handle virtqueue_get_avail_bytes() errors virtio: handle virtqueue_map_desc() errors virtio: migrate vdev->broken flag virtio: stop virtqueue processing if device is broken virtio: fix stray tab character target-i386: turn off CPU.l3-cache only for 2.7 and older machine types pc: clean up COMPAT macro chaining virtio: add check for descriptor's mapped address tests: add /vhost-user/flags-mismatch test tests: add a simple /vhost-user/multiqueue test tests: add /vhost-user/connect-fail test Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-09-24hw/i386: AMD IOMMU IVRS tableDavid Kiarie2-0/+13
Add IVRS table for AMD IOMMU. Generate IVRS or DMAR depending on emulated IOMMU. Signed-off-by: David Kiarie <davidkiarie4@gmail.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2016-09-23hw/pci: Prepare for AMD IOMMUDavid Kiarie1-0/+3
Introduce PCI macros from for use by AMD IOMMU Signed-off-by: David Kiarie <davidkiarie4@gmail.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2016-09-23virtio: stop virtqueue processing if device is brokenStefan Hajnoczi1-0/+3
QEMU prints an error message and exits when the device enters an invalid state. Terminating the process is heavy-handed. The guest may still be able to function even if there is a bug in a virtio guest driver. Moreover, exiting is a bug in nested virtualization where a nested guest could DoS other nested guests by killing a pass-through virtio device. I don't think this configuration is possible today but it is likely in the future. If the broken flag is set, do not process virtqueues or write back used descriptors. The broken flag can be cleared again by resetting the device. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2016-09-23target-i386: turn off CPU.l3-cache only for 2.7 and older machine typesIgor Mammedov1-4/+3
commit (14c985cff target-i386: present virtual L3 cache info for vcpus) misplaced compat property putting it in new 2.8 machine type which would effectively to disable feature until 2.9 is released. Intent of commit probably should be to disable feature for 2.7 and older while allowing not yet released 2.8 to have feature enabled by default. Cc: qemu-stable@nongnu.org Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Marcel Apfelbaum <marcel@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
2016-09-23pc: clean up COMPAT macro chainingIgor Mammedov1-2/+0
Since commit bacc344c ("machine: add properties to compat_props incrementaly") there is no need to chain per machine type compat macro. Clean up places where it was done anyway so it will be consistent and won't confuse contributors during addtion of new machine types. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
2016-09-23Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into stagingPeter Maydell2-1/+3
Block layer patches # gpg: Signature made Fri 23 Sep 2016 12:59:46 BST # gpg: using RSA key 0x7F09B272C88F2FD6 # gpg: Good signature from "Kevin Wolf <kwolf@redhat.com>" # Primary key fingerprint: DC3D EB15 9A9A F95D 3D74 56FE 7F09 B272 C88F 2FD6 * remotes/kevin/tags/for-upstream: (33 commits) block: Remove BB interface from blockdev-add/del qemu-iotests/141: Avoid blockdev-add with id block: Avoid printing NULL string in error messages qemu-iotests/139: Avoid blockdev-add with id qemu-iotests/124: Avoid blockdev-add with id qemu-iotests/118: Avoid blockdev-add with id qemu-iotests/117: Avoid blockdev-add with id qemu-iotests/087: Avoid blockdev-add with id qemu-iotests/081: Avoid blockdev-add with id qemu-iotests/071: Avoid blockdev-add with id qemu-iotests/067: Avoid blockdev-add with id qemu-iotests/041: Avoid blockdev-add with id qemu-iotests/118: Test media change with qdev name block: Accept device model name for block_set_io_throttle block: Accept device model name for blockdev-change-medium block: Accept device model name for eject block: Accept device model name for x-blockdev-remove-medium block: Accept device model name for x-blockdev-insert-medium block: Accept device model name for blockdev-open/close-tray qdev-monitor: Add blk_by_qdev_id() ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-09-23Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.8-20160923' ↵Peter Maydell5-2/+164
into staging ppc patch queue 2016-09-23 This pull request supersedes ppc-for-2.8-20160922. There was a clang build error in that, and I've also added one extra patch in the new pull. Included in this set of ppc and spapr patches are: * TCG implementations for more POWER9 instructions * Some preliminary XICS fixes in preparataion for the pnv machine type * A significant ADB (Macintosh kbd/mouse) cleanup * Some conversions to use trace instead of debug macros * Fixes to correctly handle global TLB flush synchronization in TCG. This is already a bug, but it will have much more impact when we get MTTCG * Add more qtest testcases for Power * Some MAINTAINERS updates * Assorted bugfixes * Add the basics of NUMA associativity to the spapr PCI host bridge This touches some test files and monitor.c which are technically outside the ppc code, but coming through this tree because the changes are primarily of interest to ppc. # gpg: Signature made Fri 23 Sep 2016 08:14:47 BST # gpg: using RSA key 0x6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dgibson/tags/ppc-for-2.8-20160923: (45 commits) spapr_pci: Add numa node id monitor: fix crash for platforms without a CPU 0 linux-user: ppc64: fix ARCH_206 bit in AT_HWCAP ppc/kvm: Mark 64kB page size support as disabled if not available ppc/xics: An ICS with offset 0 is assumed to be uninitialized ppc/xics: account correct irq status Enable H_CLEAR_MOD and H_CLEAR_REF hypercalls on KVM/PPC64. target-ppc: tlbie/tlbivax should have global effect target-ppc: add flag in check_tlb_flush() target-ppc: add TLB_NEED_LOCAL_FLUSH flag spapr: Introduce sPAPRCPUCoreClass target-ppc: implement darn instruction target-ppc: add stxsi[bh]x instruction target-ppc: add lxsi[bw]zx instruction target-ppc: add xxspltib instruction target-ppc: consolidate store conditional target-ppc: move out stqcx impementation target-ppc: consolidate load with reservation target-ppc: convert st[16,32,64]r to use new macro target-ppc: convert st64 to use new macro ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-09-23Merge remote-tracking branch 'remotes/famz/tags/various-pull-request' into ↵Peter Maydell2-5/+61
staging # gpg: Signature made Fri 23 Sep 2016 05:58:28 BST # gpg: using RSA key 0xCA35624C6A9171C6 # gpg: Good signature from "Fam Zheng <famz@redhat.com>" # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 5003 7CB7 9706 0F76 F021 AD56 CA35 624C 6A91 71C6 * remotes/famz/tags/various-pull-request: (23 commits) docker: exec $CMD docker: Terminate instances at SIGTERM and SIGHUP docker: Support showing environment information docker: Print used options before doing configure docker: Flatten default target list in test-quick docker: Update fedora image to latest docker: Generate /packages.txt in ubuntu image docker: Generate /packages.txt in fedora image docker: Generate /packages.txt in centos6 image tests: Ignore test-uuid Add UUID files to MAINTAINERS tests: Add uuid tests uuid: Tighten uuid parse vl: Switch qemu_uuid to QemuUUID configure: Remove detection code for UUID tests: No longer dependent on CONFIG_UUID crypto: Switch to QEMU UUID API vpc: Use QEMU UUID API vdi: Use QEMU UUID API vhdx: Use QEMU UUID API ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> # Conflicts: # tests/Makefile.include
2016-09-23qdev-monitor: Add blk_by_qdev_id()Kevin Wolf1-0/+1
This finds the BlockBackend attached to the device model identified by its qdev ID. Signed-off-by: Kevin Wolf <kwolf@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
2016-09-23block: Add blk_by_dev()Kevin Wolf1-0/+1
This finds a BlockBackend given the device model that is attached to it. Signed-off-by: Kevin Wolf <kwolf@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
2016-09-23block: Add "read-only" to the options QDictAlberto Garcia1-0/+1
This adds the "read-only" option to the QDict. One important effect of this change is that when a child inherits options from its parent, the existing "read-only" mode can be preserved if it was explicitly set previously. This addresses scenarios like this: [E] <- [D] <- [C] <- [B] <- [A] In this case, if we reopen [D] with read-only=off, and later reopen [B], then [D] will not inherit read-only=on from its parent during the bdrv_reopen_queue_child() stage. The BDRV_O_RDWR flag is not removed yet, but its keep in sync with the value of the "read-only" option. Signed-off-by: Alberto Garcia <berto@igalia.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2016-09-23block: Remove bdrv_is_snapshotAlberto Garcia1-1/+0
This is unnecessary and has been unused since 5433c24f0f9306c82ad9bcc. Signed-off-by: Alberto Garcia <berto@igalia.com> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2016-09-23vl: Switch qemu_uuid to QemuUUIDFam Zheng2-2/+3
Update all qemu_uuid users as well, especially get rid of the duplicated low level g_strdup_printf, sscanf and snprintf calls with QEMU UUID API. Since qemu_uuid_parse is quite tangled with qemu_uuid, its switching to QemuUUID is done here too to keep everything in sync and avoid code churn. Signed-off-by: Fam Zheng <famz@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Jeff Cody <jcody@redhat.com> Message-Id: <1474432046-325-10-git-send-email-famz@redhat.com>
2016-09-23util: Add UUID APIFam Zheng2-4/+59
A number of different places across the code base use CONFIG_UUID. Some of them are soft dependency, some are not built if libuuid is not available, some come with dummy fallback, some throws runtime error. It is hard to maintain, and hard to reason for users. Since UUID is a simple standard with only a small number of operations, it is cleaner to have a central support in libqemuutil. This patch adds qemu_uuid_* functions that all uuid users in the code base can rely on. Except for qemu_uuid_generate which is new code, all other functions are just copy from existing fallbacks from other files. Note that qemu_uuid_parse is moved without updating the function signature to use QemuUUID, to keep this patch simple. Signed-off-by: Fam Zheng <famz@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Jeff Cody <jcody@redhat.com> Message-Id: <1474432046-325-2-git-send-email-famz@redhat.com>
2016-09-23spapr_pci: Add numa node idAlexey Kardashevskiy1-0/+2
This adds a numa id property to a PHB to allow linking passed PCI device to CPU/memory. It is up to the management stack to do CPU/memory pinning to the node with the actual PCI device. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> [dwg: Renamed property from "node" to "numa_node" to match the similar one in the pxb device] Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-09-23ppc/xics: An ICS with offset 0 is assumed to be uninitializedBenjamin Herrenschmidt1-1/+1
This will make life easier for dealing with dynamically configured ICSes such as PHB3 Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-09-23spapr: Introduce sPAPRCPUCoreClassBharata B Rao1-1/+10
Each spapr cpu core type defines an instance_init routine which just populates the CPU class name. This can be done in the class_init commonly for all core types which simplifies the registration. This is inspired by how PowerNV core types are registered. Certain types of spapr cpu cores ('host' and generic type based on host CPU) are initialized in target-ppc/kvm.c. To convert these type registrations to use class_init, we need to expose spapr_cpu_core_class_init() outside of spapr_cpu_core.c. Commit d11b268e1765 added a generic sPAPR CPU core family type to support cases like POWER8 CPU type on POWER8E host CPU. Switching to class_init would fix such scenarios to use the right CPU thread type instead of defaulting to host-powerpc64-cpu. In an unrelated cleanup, fix a typo in .get_hotplug_handler routine. Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-09-23adb-keys.h: initial commitJohn Arbuckle1-0/+141
Add the adb-keys.h file. It maps ADB transition key codes with values. Signed-off-by: John Arbuckle <programmingkidx@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-09-23tests: add RTAS command in the protocolLaurent Vivier1-0/+10
Add a first test to validate the protocol: - rtas/get-time-of-day compares the time from the guest with the time from the host. Signed-off-by: Laurent Vivier <lvivier@redhat.com> Reviewed-by: Greg Kurz <groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-09-22dma: xlnx-zynq-devcfg: Fix up XLNX_ZYNQ_DEVCFG_R_MAXNathan Rossi1-1/+1
Whilst according to the Zynq TRM this device covers a register region of 0x000 - 0x120. The register region is also shared with XADCIF prefix registers at 0x100 and above. Due to how the devcfg and the xadc devices are implemented in QEMU these are separate models with individual mmio regions. As such the region registered by the devcfg overlaps with the xadc when initialized in a machine model (e.g. xilinx-zynq-a9). This patch fixes up the incorrect region size, where XLNX_ZYNQ_DEVCFG_R_MAX is missing its '/ 4' causing it to be 0x460 in size. As well as setting the region size to the 0x0 - 0x100 region so that an xadc device instance can be registered in the correct region to pair with the devcfg device instance. Mapping with XLNX_ZYNQ_DEVCFG_R_MAX = 0x118: dev: xlnx.ps7-dev-cfg, id "" mmio 00000000f8007000/0000000000000460 dev: xlnx,zynq-xadc, id "" mmio 00000000f8007100/0000000000000020 Mapping with XLNX_ZYNQ_DEVCFG_R_MAX = 0x100 / 4: dev: xlnx.ps7-dev-cfg, id "" mmio 00000000f8007000/0000000000000100 dev: xlnx,zynq-xadc, id "" mmio 00000000f8007100/0000000000000020 Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 20160921180911.32289-1-nathan@nathanrossi.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-09-22loader: Add AddressSpace loading support to targphysAlistair Francis1-0/+22
Add a new function load_image_targphys_as() that allows the caller to specify an AddressSpace to use when loading a targphys. The original load_image_targphys() function doesn't have any change in functionality. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 87de45de7acf02cbe6bae9d6c4d6fb8f3aba4f61.1474331683.git.alistair.francis@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-09-22loader: Add AddressSpace loading support to uImagesAlistair Francis1-0/+26
Add a new function load_uimage_as() that allows the caller to specify an AddressSpace to use when loading the uImage. The original load_uimage() function doesn't have any change in functionality. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1254092e6b80d3cd3cfabafe165d56a96c54c0b5.1474331683.git.alistair.francis@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-09-22loader: Add AddressSpace loading support to ELFsAlistair Francis2-3/+15
Add a new function load_elf_as() that allows the caller to specify an AddressSpace to use when loading the ELF. The original load_elf() function doesn't have any change in functionality. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 8b5cefecdf56fba4ccdff2db880f0b6b264cf16f.1474331683.git.alistair.francis@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-09-22loader: Allow a custom AddressSpace when loading ROMsAlistair Francis2-5/+7
When loading ROMs allow the caller to specify an AddressSpace to use for the load. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 85f86b94ea94879e7ce8b12e85ac8de26658f7eb.1474331683.git.alistair.francis@xilinx.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-09-22loader: Allow ELF loader to auto-detect the ELF archAlistair Francis2-0/+7
If the caller didn't specify an architecture for the ELF machine the load_elf() function will auto detect it based on the ELF file. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: f2d70b47fcad31445f947f8817a0e146d80a046b.1474331683.git.alistair.francis@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-09-22cadence_gem: Add support for screeningAlistair Francis1-1/+5
The Cadence GEM hardware allows incoming data to be 'screened' based on some register values. Add support for these screens. We also need to increase the max regs to avoid compilation failures. These new registers are implemented in the next patch. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 73e69a8ad9fa2763e9f68f71eaf2469dd5744fcc.1469727764.git.alistair.francis@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-09-22cadence_gem: Add the num-priority-queues propertyAlistair Francis1-4/+9
The Cadence GEM hardware supports N number priority queues, this patch is a step towards that by adding the property to set the queues. At the moment behaviour doesn't change as we only use queue 0. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 6543ec0d0c4bfd2678d0ed683efb197e91b17733.1469727764.git.alistair.francis@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-09-22hw/ptimer: Introduce timer policy featureDmitry Osipenko1-1/+24
Some of the timer devices may behave differently from what ptimer provides. Introduce ptimer policy feature that allows ptimer users to change default and wrong timer behaviour, for example to continuously trigger periodic timer when load value is equal to "0". Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Message-id: 994cd608ec392da6e58f0643800dda595edb9d97.1473252818.git.digetx@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-09-22aspeed: add a ram_size property to the memory controllerCédric Le Goater1-0/+1
Configure the size of the RAM of the SOC using a property to propagate the value down to the memory controller from the board level. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Message-id: 1473438177-26079-14-git-send-email-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-09-22aspeed: calculate the RAM size bits at realize timeCédric Le Goater1-0/+1
There is no need to do this at each reset as the RAM size will not change. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Message-id: 1473438177-26079-12-git-send-email-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-09-22aspeed: add a ast2500 SoC and support to the SCU and SDMC controllersCédric Le Goater1-0/+75
Based on previous work done by Andrew Jeffery <andrew@aj.id.au>. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1473438177-26079-9-git-send-email-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-09-22hw/misc: use macros to define hw-strap1 register on the AST2400 Aspeed SoCCédric Le Goater1-0/+118
This gives some explanation behind the magic number 0x120CE416. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1473438177-26079-8-git-send-email-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-09-22aspeed-soc: provide a framework to add new SoCsCédric Le Goater1-1/+16
Let's define an object class for each Aspeed SoC we support. A AspeedSoCInfo struct gathers the SoC specifications which can later be used by an instance of the class or by a board using the SoC. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Message-id: 1473438177-26079-4-git-send-email-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-09-22ast2400: replace ast2400 with aspeed_socCédric Le Goater1-8/+8
This is a name replacement to prepare ground for other SoCs. Let's also remove the AST2400_SMC_BASE definition from the address space mappings, as it is not used. This controller was removed from the Aspeed SoC AST2500, so this provides us a better common base for the address space mapping on both SoCs. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1473438177-26079-3-git-send-email-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-09-22ast2400: rename the Aspeed SoC files to aspeed_socCédric Le Goater1-0/+0
Let's prepare for new Aspeed SoCs and rename the ast2400 file to a more generic one. There are no changes in the code apart from the header file include. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1473438177-26079-2-git-send-email-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-09-20blockdev: Add dynamic module loading for block driversMarc Mari1-0/+3
Extend the current module interface to allow for block drivers to be loaded dynamically on request. The only block drivers that can be converted into modules are the drivers that don't perform any init operation except for registering themselves. In addition, only the protocol drivers are being modularized, as they are the only ones which see significant performance benefits. The format drivers do not generally link to external libraries, so modularizing them is of no benefit from a performance perspective. All the necessary module information is located in a new structure found in module_block.h This spoils the purpose of 5505e8b76f (block/dmg: make it modular). Before this patch, if module build is enabled, block-dmg.so is linked to libbz2, whereas the main binary is not. In downstream, theoretically, it means only the qemu-block-extra package depends on libbz2, while the main QEMU package needn't to. With this patch, we (temporarily) change the case so that the main QEMU depends on libbz2 again. Signed-off-by: Marc Marí <markmb@redhat.com> Signed-off-by: Colin Lord <clord@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Message-id: 1471008424-16465-4-git-send-email-clord@redhat.com Reviewed-by: Max Reitz <mreitz@redhat.com> [mreitz: Do a signed comparison against the length of block_driver_modules[], so it will not cause a compile error when empty] Signed-off-by: Max Reitz <mreitz@redhat.com>
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