| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2014-02-20 | target-arm: A64: Implement remaining 3-same instructions | Peter Maydell | 1 | -0/+4 |
| 2014-02-20 | target-arm: A64: Implement SIMD FP compare and set insns | Alex Bennée | 1 | -0/+3 |
| 2014-02-20 | target-arm: A64: Implement plain vector SIMD indexed element insns | Peter Maydell | 1 | -0/+2 |
| 2014-01-31 | target-arm: A64: Add SIMD TBL/TBLX | Michael Matz | 1 | -0/+1 |
| 2014-01-08 | target-arm: A64: Add support for floating point compare | Claudio Fontana | 1 | -0/+4 |
| 2013-12-17 | target-arm: A64: add support for 1-src CLS insn | Claudio Fontana | 1 | -0/+2 |
| 2013-12-17 | target-arm: A64: add support for 1-src RBIT insn | Alexander Graf | 1 | -0/+1 |
| 2013-12-17 | target-arm: A64: add support for 1-src data processing and CLZ | Claudio Fontana | 1 | -0/+1 |
| 2013-12-17 | target-arm: A64: add support for 2-src data processing and DIV | Alexander Graf | 1 | -0/+2 |
| 2013-12-17 | target-arm: A64: add stubs for a64 specific helpers | Alexander Graf | 1 | -0/+18 |
 |
index : peter/qemu | |
| QEMU hacking for Peter | Peter Wu |
| summaryrefslogtreecommitdiff |