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path: root/target-arm/translate-a64.c
AgeCommit message (Expand)AuthorFilesLines
2014-01-31target-arm: A64: Add SIMD EXTPeter Maydell1-1/+78
2014-01-31target-arm: A64: Add decode skeleton for SIMD data processing insnsAlex Bennée1-1/+305
2014-01-31target-arm: A64: Add SIMD ld/st singlePeter Maydell1-2/+142
2014-01-31target-arm: A64: Add SIMD ld/st multipleAlex Bennée1-2/+248
2014-01-08target-arm: A64: Add support for FCVT between half, single and doublePeter Maydell1-1/+74
2014-01-08target-arm: A64: Add 1-source 32-to-32 and 64-to-64 FP instructionsPeter Maydell1-1/+141
2014-01-08target-arm: A64: Add floating-point<->integer conversion instructionsWill Newton1-3/+20
2014-01-08target-arm: A64: Add floating-point<->fixed-point instructionsAlexander Graf1-1/+185
2014-01-08target-arm: A64: Add support for floating point cond selectClaudio Fontana1-1/+44
2014-01-08target-arm: A64: Add support for floating point conditional compareClaudio Fontana1-1/+34
2014-01-08target-arm: A64: Add support for floating point compareClaudio Fontana1-1/+64
2014-01-08target-arm: A64: Add fmov (scalar, immediate) instructionAlexander Graf1-1/+31
2014-01-08target-arm: A64: Add "Floating-point data-processing (3 source)" insnsAlexander Graf1-1/+94
2014-01-08target-arm: A64: Add "Floating-point data-processing (2 source)" insnsAlexander Graf1-1/+181
2014-01-08target-arm: A64: Fix vector register access on bigendian hostsPeter Maydell1-34/+35
2014-01-08target-arm: A64: Add support for dumping AArch64 VFP register stateAlexander Graf1-0/+16
2014-01-08target-arm: A64: support for ld/st/cl exclusiveMichael Matz1-3/+153
2014-01-08target-arm: aarch64: add support for ld litAlexander Graf1-2/+45
2014-01-08target-arm: A64: add support for conditional compare insnsClaudio Fontana1-13/+60
2014-01-08target-arm: A64: add support for add/sub with carryClaudio Fontana1-2/+103
2014-01-07target-arm: A64: Implement minimal set of EL0-visible sysregsPeter Maydell1-0/+52
2014-01-07target-arm: A64: Implement MRS/MSR/SYS/SYSLPeter Maydell1-30/+82
2014-01-07target-arm: Remove ARMCPU/CPUARMState from cpregs APIs used by decoderPeter Maydell1-0/+2
2013-12-23target-arm: A64: implement FMOVPeter Maydell1-1/+85
2013-12-23target-arm: A64: Add decoder skeleton for FP instructionsPeter Maydell1-1/+169
2013-12-23target-arm: A64: implement SVC, BRKAlexander Graf1-2/+49
2013-12-23target-arm: A64: add support for 3 src data proc insnsAlexander Graf1-2/+95
2013-12-23target-arm: A64: add support for move wide instructionsAlex Bennée1-2/+49
2013-12-23target-arm: A64: add support for add, addi, sub, subiAlex Bennée1-6/+286
2013-12-23target-arm: A64: add support for ld/st with indexAlex Bennée1-1/+124
2013-12-23target-arm: A64: add support for ld/st with reg offsetAlex Bennée1-1/+143
2013-12-23target-arm: A64: add support for ld/st unsigned immAlex Bennée1-1/+88
2013-12-23target-arm: A64: add support for ld/st pairPeter Maydell1-2/+277
2013-12-17target-arm: A64: add support for logical (immediate) insnsAlexander Graf1-2/+173
2013-12-17target-arm: A64: add support for 1-src CLS insnClaudio Fontana1-1/+19
2013-12-17target-arm: A64: add support for bitfield insnsClaudio Fontana1-2/+54
2013-12-17target-arm: A64: add support for 1-src REV insnsClaudio Fontana1-1/+72
2013-12-17target-arm: A64: add support for 1-src RBIT insnAlexander Graf1-0/+20
2013-12-17target-arm: A64: add support for 1-src data processing and CLZClaudio Fontana1-2/+50
2013-12-17target-arm: A64: add support for 2-src shift reg insnsAlexander Graf1-0/+22
2013-12-17target-arm: A64: add support for 2-src data processing and DIVAlexander Graf1-2/+70
2013-12-17target-arm: A64: add support for EXTRAlexander Graf1-2/+47
2013-12-17target-arm: A64: add support for ADR and ADRPAlexander Graf1-2/+23
2013-12-17target-arm: A64: add support for logical (shifted register)Alexander Graf1-6/+191
2013-12-17target-arm: A64: add support for conditional selectClaudio Fontana1-2/+65
2013-12-17target-arm: A64: add support for compare and branch immAlexander Graf1-2/+44
2013-12-17target-arm: A64: add support for 'test and branch' immAlexander Graf1-2/+25
2013-12-17target-arm: A64: add support for conditional branchesAlexander Graf1-2/+27
2013-12-17target-arm: A64: add support for BR, BLR and RET insnsAlexander Graf1-2/+41
2013-12-17target-arm: A64: add support for B and BL insnsAlexander Graf1-2/+62
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