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2015-10-27target-arm: lpae: Rename granule_sz to strideEdgar E. Iglesias1-15/+15
2015-10-27target-arm: lpae: Replace tsz with computed inputsizeEdgar E. Iglesias1-11/+11
2015-10-27target-arm: Add support for AArch32 S2 negative t0szEdgar E. Iglesias1-1/+17
2015-10-27target-arm: lpae: Move declaration of t0sz and t1szEdgar E. Iglesias1-2/+3
2015-10-27target-arm: lpae: Make t0sz and t1sz signed integersEdgar E. Iglesias1-2/+2
2015-10-27target-arm: Add HPFAR_EL2Edgar E. Iglesias2-0/+13
2015-10-27target-arm: Add support for SPSR_(ABT|UND|IRQ|FIQ)Soren Brinkmann1-0/+16
2015-10-27target-arm/translate.c: Handle non-executable page-straddling Thumb insnsPeter Maydell1-1/+44
2015-10-27target-arm: Fix "no 64-bit EL2" assumption in arm_excp_unmasked()Peter Maydell1-30/+52
2015-10-19Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell1-1/+1
2015-10-19kvm: Pass PCI device pointer to MSI routing functionsPavel Fedin1-1/+1
2015-10-16target-arm: Fix CPU breakpoint handlingSergey Fedorov4-21/+46
2015-10-16target-arm: Fix GDB breakpoint handlingSergey Fedorov1-0/+6
2015-10-16target-arm: implement arm_debug_target_el()Sergey Fedorov1-1/+16
2015-10-16target-arm: Add MDCR_EL2Sergey Fedorov2-0/+13
2015-10-16target-arm: Implement AArch64 OSLAR/OSLSR_EL1 sysregsDavorin Mista2-2/+24
2015-10-16target-arm: Avoid calling arm_el_is_aa64() function for unimplemented ELSergey Sorokin2-5/+21
2015-10-16target-arm: Break the TB after ISB to execute self-modified code correctlySergey Sorokin3-4/+27
2015-10-16target-arm: Add missing 'static' attributeStefan Weil1-1/+1
2015-10-09qdev: Protect device-list-properties against broken devicesMarkus Armbruster1-0/+11
2015-10-07tcg: Remove gen_intermediate_code_pcRichard Henderson3-78/+14
2015-10-07tcg: Pass data argument to restore_state_to_opcRichard Henderson1-4/+5
2015-10-07tcg: Add TCG_MAX_INSNSRichard Henderson2-1/+8
2015-10-07target-*: Drop cpu_gen_code defineRichard Henderson1-1/+0
2015-10-07target-arm: Add condexec state to insn_startRichard Henderson3-2/+4
2015-10-07target-*: Introduce and use cpu_breakpoint_testRichard Henderson2-28/+29
2015-10-07target-*: Increment num_insns immediately after tcg_gen_insn_startRichard Henderson2-6/+7
2015-10-07target-*: Unconditionally emit tcg_gen_insn_startRichard Henderson2-8/+2
2015-10-07tcg: Rename debug_insn_start to insn_startRichard Henderson2-2/+2
2015-09-25Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell1-2/+0
2015-09-25arm: clarify the use of muldiv64()Laurent Vivier1-6/+8
2015-09-25arm: Remove ELF_MACHINE from cpu.hPeter Crosthwaite1-2/+0
2015-09-24hw/intc: Initial implementation of vGICv3Pavel Fedin2-0/+28
2015-09-24arm_kvm: Do not assume particular GIC type in kvm_arch_irqchip_create()Pavel Fedin2-7/+21
2015-09-15target-arm: Use new revbit functionsRichard Henderson2-25/+2
2015-09-14target-arm: Add VMPIDR_EL2Edgar E. Iglesias2-2/+25
2015-09-14target-arm: Break out mpidr_read_val()Edgar E. Iglesias1-1/+6
2015-09-14target-arm: Add VPIDR_EL2Edgar E. Iglesias2-1/+42
2015-09-14target-arm: Suppress EPD for S2, EL2 and EL3 translationsEdgar E. Iglesias1-2/+4
2015-09-14target-arm: Suppress TBI for S2 translationsEdgar E. Iglesias1-1/+3
2015-09-14target-arm: Add VTTBR_EL2Edgar E. Iglesias2-2/+33
2015-09-14target-arm: Add VTCR_EL2Edgar E. Iglesias2-2/+42
2015-09-14target-arm: Use tcg_gen_extrh_i64_i32Richard Henderson1-25/+9
2015-09-14target-arm: Recognize RORRichard Henderson1-12/+21
2015-09-14target-arm: Eliminate unnecessary zero-extend in disas_bitfieldRichard Henderson1-1/+5
2015-09-14target-arm: Recognize UXTB, UXTH, LSR, LSLRichard Henderson1-0/+17
2015-09-14target-arm: Recognize SXTB, SXTH, SXTW, ASRRichard Henderson1-1/+23
2015-09-14target-arm: Implement fcsel with movcondRichard Henderson1-28/+17
2015-09-14target-arm: Implement ccmp branchlessRichard Henderson1-16/+58
2015-09-14target-arm: Use setcond and movcond for cselRichard Henderson1-36/+49
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