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AgeCommit message (Expand)AuthorFilesLines
2012-06-20target-arm: Convert cp15 c3 registerPeter Maydell1-6/+12
2012-06-20target-arm: Convert generic timer cp15 regsPeter Maydell1-12/+11
2012-06-20target-arm: Convert performance monitor registersPeter Maydell3-149/+158
2012-06-20target-arm: Convert TLS registersPeter Maydell2-58/+19
2012-06-20target-arm: Convert WFI/barriers special cases to cp_reginfoPeter Maydell2-51/+42
2012-06-20target-arm: Convert TEECR, TEEHBR to new schemePeter Maydell3-77/+45
2012-06-20target-arm: Convert debug registers to cp_reginfoPeter Maydell2-28/+25
2012-06-20target-arm: Add register_cp_regs_for_features()Peter Maydell3-0/+14
2012-06-20target-arm: Remove old cpu_arm_set_cp_io infrastructurePeter Maydell4-107/+1
2012-06-20target-arm: initial coprocessor register frameworkPeter Maydell7-3/+546
2012-06-20target-arm: Fix 11MPCore cache type register valuePeter Maydell1-1/+1
2012-06-07build: move other target-*/ objects to nested Makefile.objsPaolo Bonzini1-1/+2
2012-06-07build: move libobj-y variable to nested Makefile.objsPaolo Bonzini1-0/+4
2012-06-07build: move obj-TARGET-y variables to nested Makefile.objsPaolo Bonzini2-0/+510
2012-06-04Kill off cpu_state_reset()Andreas Färber1-5/+0
2012-06-04target-arm: Use cpu_reset() in cpu_arm_init()Andreas Färber1-1/+1
2012-05-10target-arm/cpu.h: Make cpu_init("nonexistent cpu") return NULLPeter Maydell1-1/+9
2012-05-10target-arm: When setting FPSCR.QC, don't clear other FPSCR bitsMatt Craighead1-1/+1
2012-04-27target-arm: Make SETEND respect bswap_code (BE8) settingPeter Maydell1-4/+4
2012-04-27target-arm: Move A9 config_base_address reset value to ARMCPUPeter Maydell2-3/+2
2012-04-27target-arm: Change cpu_arm_init() return type to ARMCPUAndreas Färber4-7/+7
2012-04-21target-arm: Move reset handling to arm_cpu_resetPeter Maydell2-99/+92
2012-04-21target-arm: Drop cpu_reset_model_id()Peter Maydell1-58/+1
2012-04-21target-arm: Move cache ID register setup to cpu specific init fnsPeter Maydell3-11/+18
2012-04-21target-arm: Move OMAP cp15_i_{max,min} reset to cpu_state_resetPeter Maydell1-2/+1
2012-04-21target-arm: Move feature register setup to per-CPU init fnsPeter Maydell3-59/+122
2012-04-21target-arm: Move iWMMXT wCID reset to cpu_state_resetPeter Maydell1-1/+4
2012-04-21target-arm: Drop JTAG_ID documentationPeter Maydell1-2/+0
2012-04-21target-arm: Move SCTLR reset value setup to per cpu init fnsPeter Maydell3-12/+25
2012-04-21target-arm: Move CTR setup to per cpu init fnsPeter Maydell3-12/+24
2012-04-21target-arm: Move MVFR* setup to per cpu init fnsPeter Maydell3-12/+18
2012-04-21target-arm: Move FPSID config to cpu init fnsPeter Maydell3-8/+12
2012-04-21target-arm: Move feature bit settings to CPU init fnsPeter Maydell4-99/+137
2012-04-21target-arm: Add QOM subclasses for each ARM cpu implementationPeter Maydell3-65/+282
2012-04-21target-arm: remind to keep arm features in sync with linux-user/elfload.cBenoit Canet1-0/+4
2012-04-14Use uintptr_t for various op related functionsBlue Swirl1-5/+3
2012-04-06Userspace ARM BE8 supportPaul Brook3-10/+42
2012-03-30ARM: Permit any ARMv6K CPU to read the MVFR0 and MVFR1 VFP registers.Andrew Towers3-1/+3
2012-03-29target-arm: Minimalistic CPU QOM'ificationAndreas Färber4-1/+139
2012-03-29target-arm: Drop cpu_arm_close()Andreas Färber2-6/+0
2012-03-15target-arm: Decode SETEND correctly in ThumbPeter Maydell1-23/+40
2012-03-15target-arm: Clear IT bits when taking exceptions in v7MPeter Maydell1-1/+2
2012-03-15target-arm: Fix typo in ARM946 cp15 c5 handlingPeter Maydell1-1/+1
2012-03-14Rename CPUState -> CPUArchStateAndreas Färber1-1/+1
2012-03-14target-arm: Don't overuse CPUStateAndreas Färber6-195/+195
2012-03-14Rename cpu_reset() to cpu_state_reset()Andreas Färber1-2/+2
2012-02-28target-arm: Clean includesStefan Weil1-5/+0
2012-02-17target-arm/helper.c: tb_flush() on CPU resetPeter Maydell1-0/+5
2012-02-17target-arm/helper.c: Correct FPSID value for Cortex-A9Peter Maydell1-1/+1
2012-01-25Add Cortex-A15 CPU definitionPeter Maydell2-5/+52
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