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2013-09-20target-i386: forward CPUID cache leaves when -cpu host is usedBenoît Canet1-0/+19
Some users running cpu intensive tasks checking the cache CPUID leaves at startup and making decisions based on the result reported that the guest was not reflecting the host CPUID leaves when -cpu host is used. This patch fix this. Signed-off-by: Benoît Canet <benoit@irqsave.net> [Rename new field to cache_info_passthrough - Paolo] Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-09-03target-i386: Use #defines instead of magic numbers for CPUID cache infoEduardo Habkost1-22/+162
This is an attempt to make the CPUID cache topology code clearer, by replacing the magic numbers in the code with #defines, and moving all the cache information to the same place in the file. I took care of comparing the assembly output of compiling target-i386/cpu.c before and after applying this change, to make sure not a single bit was changed on cpu_x86_cpuid() before and after applying this patch (unfortunately I had to manually check existing differences, because of __LINE__ expansions on object_class_dynamic_cast_assert() calls). This even keeps the code bug-compatible with the previous version: today the cache information returned on AMD cache information leaves (CPUID 0x80000005 & 0x80000006) do not match the information returned on CPUID leaves 2 and 4. The L2 cache information on CPUID leaf 2 also doesn't match the information on CPUID leaf 2. The new constants should make it easier to eventually fix those inconsistencies. All inconsistencies I have found are documented in code comments. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: liguang <lig.fnst@cn.fujitsu.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-08-20Convert stderr message calling error_get_pretty() to error_report()Seiji Aguchi1-1/+1
Convert stderr messages calling error_get_pretty() to error_report(). Timestamp is prepended by -msg timstamp option with it. Per Markus's comment below, A conversion from fprintf() to error_report() is always an improvement, regardless of error_get_pretty(). http://marc.info/?l=qemu-devel&m=137513283408601&w=2 But, it is not reasonable to convert them at one time because fprintf() is used everwhere in qemu. So, it should be done step by step with avoiding regression. Signed-off-by: Seiji Aguchi <seiji.aguchi@hds.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
2013-08-16target-i386: Move hyperv_* static globals to X86CPUIgor Mammedov1-5/+11
- since hyperv_* helper functions are used only in target-i386/kvm.c move them there as static helpers Requested-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-08-06target-i386: Fix X86CPU error handlingAndreas Färber1-1/+5
Error **errp argument is not for emitting warnings, it means an error has occurred and the caller should not make any assumptions about the state of other return values (unless otherwise documented). Therefore cpu_x86_create() must unref the new X86CPU itself, and pc_new_cpu() must check for an Error rather than NULL return value. While at it, clean up a superfluous NULL check. Reported-by: Jan Kiszka <jan.kiszka@siemens.com> Cc: qemu-stable@nongnu.org Cc: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-29target-i386: Disable PMU CPUID leaf by defaultEduardo Habkost1-1/+10
Bug description: QEMU currently gets all bits from GET_SUPPORTED_CPUID for CPUID leaf 0xA and passes them directly to the guest. This makes the guest ABI depend on host kernel and host CPU capabilities, and breaks live migration if we migrate between hosts with different capabilities (e.g., different number of PMU counters). Add a "pmu" property to X86CPU, and set it to true only on "-cpu host", or on pc-*-1.5 and older machine-types. For now, setting pmu=on will enable the current passthrough mode that doesn't have any ABI stability guarantees, but in the future we may implement a mode where the PMU CPUID bits are stable and configurable. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-29target-i386: Pass X86CPU object to cpu_x86_find_by_name()Eduardo Habkost1-2/+3
This will help us change the initialization code to not require carrying some intermediate values in a x86_def_t struct (and eventually kill the x86_def_t struct entirely). Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-29cpu: Partially revert "cpu: Change qemu_init_vcpu() argument to CPUState"Andreas Färber1-1/+3
Commit c643bed99 moved qemu_init_vcpu() calls to common CPUState code. This causes x86 cpu-add to fail with "KVM: setting VAPIC address failed". The reason for the failure is that CPUClass::kvm_fd is not yet initialized in the following call graph: ->x86_cpu_realizefn ->x86_cpu_apic_realize ->qdev_init ->device_set_realized ->device_reset (hotplugged == 1) ->apic_reset_common ->vapic_base_update ->kvm_apic_vapic_base_update This causes attempted KVM vCPU ioctls to fail. By contrast, in the non-hotplug case the APIC is reset much later, when the vCPU is already initialized. As a quick and safe solution, move the qemu_init_vcpu() call back into the targets' realize functions. Reported-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Acked-by: Igor Mammedov <imammedo@redhat.com> (for i386) Tested-by: Jia Liu <proljc@gmail.com> (for openrisc) Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-27cpu: Introduce CPUClass::gdb_{read,write}_register()Andreas Färber1-0/+2
Completes migration of target-specific code to new target-*/gdbstub.c. Acked-by: Michael Walle <michael@walle.cc> (for lm32) Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa) Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-26cpu: Introduce CPUState::gdb_num_regs and CPUClass::gdb_num_core_regsAndreas Färber1-0/+1
CPUState::gdb_num_regs replaces num_g_regs. CPUClass::gdb_num_core_regs replaces NUM_CORE_REGS. Allows building gdb_register_coprocessor() for xtensa, too. As a side effect this should fix coprocessor register numbering for SMP. Acked-by: Michael Walle <michael@walle.cc> (for lm32) Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa) Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-23cpu: Turn cpu_get_phys_page_debug() into a CPUClass hookAndreas Färber1-1/+2
Change breakpoint_invalidate() argument to CPUState alongside. Since all targets now assign a softmmu-only field, we can drop helpers cpu_class_set_{do_unassigned_access,vmsd}() and device_class_set_vmsd(). Prepares for changing cpu_memory_rw_debug() argument to CPUState. Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa) Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-23cpu: Introduce CPUClass::synchronize_from_tb() for cpu_pc_from_tb()Andreas Färber1-0/+8
Where no extra implementation is needed, fall back to CPUClass::set_pc(). Acked-by: Michael Walle <michael@walle.cc> (for lm32) Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-23cpu: Introduce CPUClass::set_pc() for gdb_set_cpu_pc()Andreas Färber1-0/+8
This moves setting the Program Counter from gdbstub into target code. Use vaddr type as upper-bound replacement for target_ulong. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-09cpu: Move reset logging to CPUStateAndreas Färber1-5/+1
x86 was using additional CPU_DUMP_* flags, so make that configurable in CPUClass::reset_dump_flags. This adds reset logging for alpha, unicore32 and xtensa. Acked-by: Michael Walle <michael@walle.cc> (for lm32) Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-09log: Change log_cpu_state[_mask]() argument to CPUStateAndreas Färber1-1/+1
Since commit 878096eeb278a8ac1ccd6667af73e026f29b4cf5 (cpu: Turn cpu_dump_{state,statistics}() into CPUState hooks) CPUArchState is no longer needed. Add documentation and make the functions available through qemu/log.h outside NEED_CPU_H to allow use in qom/cpu.c. Moving them to qom/cpu.h was not yet possible due to convoluted include paths, so that some devices grow an implicit and unneeded dependency on qom/cpu.h for now. Acked-by: Michael Walle <michael@walle.cc> (for lm32) Reviewed-by: Richard Henderson <rth@twiddle.net> [AF: Simplified mb_cpu_do_interrupt() and do_interrupt_all() changes] Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-06-28cpu: Change qemu_init_vcpu() argument to CPUStateAndreas Färber1-1/+0
This allows to move the call into CPUState's realizefn. Therefore move the stub into libqemustub.a. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-06-28cpu: Turn cpu_dump_{state,statistics}() into CPUState hooksAndreas Färber1-0/+1
Make cpustats monitor command available unconditionally. Prepares for changing kvm_handle_internal_error() and kvm_cpu_exec() arguments to CPUState. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-06-11cpu: Turn cpu_get_memory_mapping() into a CPUState hookAndreas Färber1-0/+1
Change error reporting from return value to Error argument. Reviewed-by: Jens Freimann <jfrei@linux.vnet.ibm.com> Reviewed-by: Luiz Capitulino <lcapitulino@redhat.com> [AF: Fixed cpu_get_memory_mapping() documentation] Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-06-11cpu: Turn cpu_paging_enabled() into a CPUState hookAndreas Färber1-2/+9
Relocate assignment of x86 get_arch_id to have all hooks in one place. Reviewed-by: Jens Freimann <jfrei@linux.vnet.ibm.com> Reviewed-by: Luiz Capitulino <lcapitulino@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-06-10target-i386: cpu: Fix potential buffer overrun in get_register_name_32()Igor Mammedov1-1/+1
Spotted by Coverity, x86_reg_info_32[] is CPU_NB_REGS32 elements long, so accessing x86_reg_info_32[CPU_NB_REGS32] will be one element off array. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: liguang <lig.fnst@cn.fujitsu.com> Reviewed by: Jesse Larrew <jlarrew@linux.vnet.ibm.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-06-10target-i386: Set level=4 on Conroe/Penryn/NehalemEduardo Habkost1-3/+3
The CPUID level value on Conroe, Penryn, and Nehalem are too low. This causes at least one known problem: the -smp "threads" option doesn't work as expect if level is < 4, because thread count information is provided to the guest on CPUID[EAX=4,ECX=2].EAX Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-06-10target-i386: Update model values on Conroe/Penryn/Nehalem CPU modelsEduardo Habkost1-3/+3
The CPUID model values on Conroe, Penryn, and Nehalem are too conservative and don't reflect the values found on real Conroe, Penryn, and Nehalem CPUs. This causes at least one known problems: Windows XP disables sysenter when (family == 6 && model <= 2), but Skype tries to use the sysenter instruction anyway because it is reported as available on CPUID, making it crash. This patch sets appropriate model values that correspond to real Conroe, Penryn, and Nehalem CPUs. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-05-06target-i386: n270 can MOVBEBorislav Petkov1-1/+2
The Atom core (cpu name "n270" in QEMU speak) supports MOVBE. This is needed when booting 3.8 and later linux kernels built with the MATOM target because we require MOVBE in order to boot properly now. Signed-off-by: Borislav Petkov <bp@suse.de> [ehabkost: added compat code to disable MOVBE on pc-*-1.4 and older] Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-05-06target-i386: Introduce generic CPUID feature compat functionEduardo Habkost1-0/+26
Introduce x86_cpu_compat_set_features(), that can be used to set/unset feature bits on specific CPU models for machine-type compatibility. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-05-06target-i386: Change CPUID model of 486 to 8Andreas Färber1-1/+1
This changes the model number of 486 to 8 (DX4) which matches the feature set presented, and actually has the CPUID instruction. This adds a compatibility property, to keep model=0 on pc-*-1.4 and older. Signed-off-by: H. Peter Anvin <hpa@zytor.com> [AF: Add compat_props entry] Tested-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-05-06target-i386: Emulate X86CPU subclasses for global propertiesAndreas Färber1-0/+9
After initializing the object from its x86_def_t and before setting any additional -cpu arguments, set any global properties for the designated subclass <name>-{i386,x86_64}-cpu. Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-05-06target-i386: Add "filtered-features" property to X86CPUEduardo Habkost1-4/+7
This property will contain all the features that were removed from the CPU because they are not supported by the host. This way, libvirt or other management tools can emulate the check/enforce behavior by checking if filtered-properties is all zeroes, before starting the guest. Example output where some features were missing: $ qemu-system-x86_64 -enable-kvm -cpu Haswell,check -S \ -qmp unix:/tmp/m,server,nowait warning: host doesn't support requested feature: CPUID.01H:ECX.fma [bit 12] warning: host doesn't support requested feature: CPUID.01H:ECX.movbe [bit 22] warning: host doesn't support requested feature: CPUID.01H:ECX.tsc-deadline [bit 24] warning: host doesn't support requested feature: CPUID.01H:ECX.xsave [bit 26] warning: host doesn't support requested feature: CPUID.01H:ECX.avx [bit 28] warning: host doesn't support requested feature: CPUID.07H:EBX.fsgsbase [bit 0] warning: host doesn't support requested feature: CPUID.07H:EBX.bmi1 [bit 3] warning: host doesn't support requested feature: CPUID.07H:EBX.hle [bit 4] warning: host doesn't support requested feature: CPUID.07H:EBX.avx2 [bit 5] warning: host doesn't support requested feature: CPUID.07H:EBX.smep [bit 7] warning: host doesn't support requested feature: CPUID.07H:EBX.bmi2 [bit 8] warning: host doesn't support requested feature: CPUID.07H:EBX.erms [bit 9] warning: host doesn't support requested feature: CPUID.07H:EBX.invpcid [bit 10] warning: host doesn't support requested feature: CPUID.07H:EBX.rtm [bit 11] [...] $ ./QMP/qmp --path=/tmp/m \ qom-get --path=/machine/icc-bridge/icc/child[0] \ --property=filtered-features item[0].cpuid-register: EDX item[0].cpuid-input-eax: 2147483658 item[0].features: 0 item[1].cpuid-register: EAX item[1].cpuid-input-eax: 1073741825 item[1].features: 0 item[2].cpuid-register: EDX item[2].cpuid-input-eax: 3221225473 item[2].features: 0 item[3].cpuid-register: ECX item[3].cpuid-input-eax: 2147483649 item[3].features: 0 item[4].cpuid-register: EDX item[4].cpuid-input-eax: 2147483649 item[4].features: 0 item[5].cpuid-register: EBX item[5].cpuid-input-eax: 7 item[5].features: 4025 item[5].cpuid-input-ecx: 0 item[6].cpuid-register: ECX item[6].cpuid-input-eax: 1 item[6].features: 356519936 item[7].cpuid-register: EDX item[7].cpuid-input-eax: 1 item[7].features: 0 Example output when no feature is missing: $ qemu-system-x86_64 -enable-kvm -cpu Nehalem,enforce -S \ -qmp unix:/tmp/m,server,nowait [...] $ ./QMP/qmp --path=/tmp/m \ qom-get --path=/machine/icc-bridge/icc/child[0] \ --property=filtered-features item[0].cpuid-register: EDX item[0].cpuid-input-eax: 2147483658 item[0].features: 0 item[1].cpuid-register: EAX item[1].cpuid-input-eax: 1073741825 item[1].features: 0 item[2].cpuid-register: EDX item[2].cpuid-input-eax: 3221225473 item[2].features: 0 item[3].cpuid-register: ECX item[3].cpuid-input-eax: 2147483649 item[3].features: 0 item[4].cpuid-register: EDX item[4].cpuid-input-eax: 2147483649 item[4].features: 0 item[5].cpuid-register: EBX item[5].cpuid-input-eax: 7 item[5].features: 0 item[5].cpuid-input-ecx: 0 item[6].cpuid-register: ECX item[6].cpuid-input-eax: 1 item[6].features: 0 item[7].cpuid-register: EDX item[7].cpuid-input-eax: 1 item[7].features: 0 Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-05-06target-i386: Introduce X86CPU::filtered_features fieldEduardo Habkost1-3/+6
This field will contain the feature bits that were filtered out because of missing host support. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-05-06target-i386: Add "feature-words" property to X86CPUEduardo Habkost1-12/+58
This property will be useful for libvirt, as libvirt already has logic based on low-level feature bits (not feature names), so it will be really easy to convert the current libvirt logic to something using the "feature-words" property. The property will have two main use cases: - Checking host capabilities, by checking the features of the "host" CPU model - Checking which features are enabled on each CPU model Example output: $ ./QMP/qmp --path=/tmp/m \ qom-get --path=/machine/icc-bridge/icc/child[0] \ --property=feature-words item[0].cpuid-register: EDX item[0].cpuid-input-eax: 2147483658 item[0].features: 0 item[1].cpuid-register: EAX item[1].cpuid-input-eax: 1073741825 item[1].features: 0 item[2].cpuid-register: EDX item[2].cpuid-input-eax: 3221225473 item[2].features: 0 item[3].cpuid-register: ECX item[3].cpuid-input-eax: 2147483649 item[3].features: 101 item[4].cpuid-register: EDX item[4].cpuid-input-eax: 2147483649 item[4].features: 563346425 item[5].cpuid-register: EBX item[5].cpuid-input-eax: 7 item[5].features: 0 item[5].cpuid-input-ecx: 0 item[6].cpuid-register: ECX item[6].cpuid-input-eax: 1 item[6].features: 2155880449 item[7].cpuid-register: EDX item[7].cpuid-input-eax: 1 item[7].features: 126614521 Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-05-06target-i386: Use FeatureWord loop on filter_features_for_kvm()Eduardo Habkost1-17/+7
Instead of open-coding the filtering code for each feature word, change the existing code to use the feature_word_info array, that has exactly the same CPUID eax/ecx/register values for each feature word. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-05-06target-i386: Add ECX information to FeatureWordInfoEduardo Habkost1-3/+7
FEAT_7_0_EBX uses ECX as input, so we have to take that into account when reporting feature word values. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-05-02target-i386: Replace cpuid_*features fields with a feature word arrayEduardo Habkost1-167/+162
This replaces the feature-bit fields on both X86CPU and x86_def_t structs with an array. With this, we will be able to simplify code that simply does the same operation on all feature words (e.g. kvm_check_features_against_host(), filter_features_for_kvm(), add_flagname_to_bitmaps(), CPU feature-bit property lookup/registration, and the proposed "feature-words" property) The following field replacements were made on X86CPU and x86_def_t: (cpuid_)features -> features[FEAT_1_EDX] (cpuid_)ext_features -> features[FEAT_1_ECX] (cpuid_)ext2_features -> features[FEAT_8000_0001_EDX] (cpuid_)ext3_features -> features[FEAT_8000_0001_ECX] (cpuid_)ext4_features -> features[FEAT_C000_0001_EDX] (cpuid_)kvm_features -> features[FEAT_KVM] (cpuid_)svm_features -> features[FEAT_SVM] (cpuid_)7_0_ebx_features -> features[FEAT_7_0_EBX] Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-05-02target-i386: Break CPUID feature definition linesEduardo Habkost1-90/+180
Break lines on kvm_check_features_against_host(), kvm_cpu_fill_host(), and builtin_x86_defs, so they don't get too long once the *_features fields are replaced by an array. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-05-01target-i386: Group together level, xlevel, xlevel2 fieldsEduardo Habkost1-2/+2
Consolidate level, xlevel, xlevel2 fields in x86_def_t and CPUX86State. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-05-01target-i386: Move APIC to ICC busIgor Mammedov1-13/+3
It allows APIC to be hotplugged. * map APIC's mmio at board level if it is present * do not register mmio region for each APIC, since only one is used/mapped Signed-off-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-05-01target-i386: Attach ICC bus to CPU on its creationIgor Mammedov1-2/+13
X86CPU should have parent bus so it could provide bus for child APIC. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-05-01cpu: Move cpu_write_elfXX_note() functions to CPUStateJens Freimann1-0/+6
Convert cpu_write_elfXX_note() functions to CPUClass methods and pass CPUState as argument. Update target-i386 accordingly. Signed-off-by: Jens Freimann <jfrei@linux.vnet.ibm.com> [AF: Retain stubs as CPUClass' default method implementation; style changes] Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-05-01target-i386: Do not allow to set apic-id once CPU is realizedIgor Mammedov1-0/+7
Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-05-01target-i386: Introduce apic-id CPU propertyIgor Mammedov1-0/+40
The property is used from board level to set APIC ID for CPUs it creates. Do so in a new pc_new_cpu() helper, to be reused for hot-plug. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-05-01target-i386: Introduce feat2prop() for CPU propertiesIgor Mammedov1-4/+15
This helper replaces '_' with '-' in a uniform way. As a side effect, even custom mappings must use '-' now. Signed-off-by: Igor Mammedov <imammedo@redhat.com> [AF: Split off; operate on NUL-terminated string rather than '=' delimiter] Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-05-01cpu: Introduce get_arch_id() method and override it for X86CPUIgor Mammedov1-0/+10
get_arch_id() adds possibility for generic code to get a guest-visible CPU ID without accessing CPUArchState. If derived classes don't override it, it will return cpu_index. Override it on target-i386 in X86CPU to return the APIC ID. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: liguang <lig.fnst@cn.fujitsu.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-04-16target-i386: Split out CPU creation and features parsingIgor Mammedov1-3/+15
Move CPU creation and features parsing into a separate cpu_x86_create() function, so that board would be able to set board-specific CPU properties before CPU is realized. Keep cpu_x86_init() for compatibility with the code that uses cpu_init() and doesn't need to modify CPU properties. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-04-16target-i386/cpu.c: Coding style fixesEduardo Habkost1-3/+4
* Add braces to 'if' statements; * Remove last TAB character from the source. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> [AF: Changed whitespace] Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-04-16target-i386: Split APIC creation from initialization in x86_cpu_realizefn()Igor Mammedov1-3/+21
When APIC is hotplugged during CPU hotplug, device_set_realized() calls device_reset() on it. And if QEMU runs in KVM mode, following call chain will fail: apic_reset_common() -> kvm_apic_vapic_base_update() -> kvm_vcpu_ioctl(cpu->kvm_fd,...) due to cpu->kvm_fd not being initialized yet. cpu->kvm_fd is initialized during qemu_init_vcpu() but x86_cpu_apic_init() can't be moved after it because kvm_init_vcpu() -> kvm_arch_reset_vcpu() relies on APIC to determine if CPU is BSP for setting initial env->mp_state. So split APIC device creation from its initialization and realize APIC after CPU is created, when it's safe to call APIC's reset method. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: liguang <lig.fnst@cn.fujitsu.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-04-16target-i386: Consolidate error propagation in x86_cpu_realizefn()Igor Mammedov1-7/+10
Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-04-16target-i386: Improve -cpu ? features outputJan Kiszka1-8/+6
We were missing a bunch of feature lists. Fix this by simply dumping the meta list feature_word_info. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-04-16target-i386: Fix including "host" in -cpu ? outputJan Kiszka1-3/+6
kvm_enabled() cannot be true at this point because accelerators are initialized much later during init. Also, hiding this makes it very hard to discover for users. Simply dump unconditionally if CONFIG_KVM is set. Add explanation for "host" CPU type. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-04-13target-i386: add AES-NI instructionsAurelien Jarno1-3/+3
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-04-13target-i386: enable PCLMULQDQ on Westmere CPUAurelien Jarno1-1/+1
The PCLMULQDQ instruction has been introduced on the Westmere CPU. Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-04-13target-i386: add pclmulqdq instructionAurelien Jarno1-10/+9
Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>