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2013-03-23target-i386: Don't modify env->eflags around cpu_dump_stateRichard Henderson1-1/+1
We can compute the value in cpu_dump_state anyway, and gratuitous modifications to eflags creates heisenbugs. Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-03-12cpu: Pass CPUState to cpu_interrupt()Andreas Färber1-3/+3
Move it to qom/cpu.h to avoid issues with include order. Change pc_acpi_smi_interrupt() opaque to X86CPU. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-03-12cpu: Move halted and interrupt_request fields to CPUStateAndreas Färber1-5/+7
Both fields are used in VMState, thus need to be moved together. Explicitly zero them on reset since they were located before breakpoints. Pass PowerPCCPU to kvmppc_handle_halt(). Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-19target-i386: Add CC_OP_CLRRichard Henderson1-0/+2
Special case xor with self. We need not even store the known zero into cc_src. Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-02-19target-i386: Implement ADX extensionRichard Henderson1-0/+4
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-02-18target-i386: Implement BLSR, BLSMSK, BLSIRichard Henderson1-1/+6
Do all of group 17 at one time for ease. Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-02-16target-i386: Move cpu_x86_init()Andreas Färber1-24/+0
Consolidate CPU functions in cpu.c. Allows to make cpu_x86_register() static. No functional changes. Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-16target-i386: Update X86CPU to QOM realizefnAndreas Färber1-1/+1
Adapt the signature of x86_cpu_realize(), hook up to DeviceClass::realize and set realized = true in cpu_x86_init(). The QOM realizefn cannot depend on errp being non-NULL as in cpu_x86_init(), so use a local Error to preserve error handling behavior on APIC initialization errors. Reviewed-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> [AF: Invoke parent's realizefn] Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-01cpu: do not use object_deletePaolo Bonzini1-2/+2
CPUs are never added to the composition tree, so delete is achieved simply by removing the last references to them. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-02-01target-i386: Pass X86CPU to cpu_x86_set_a20()Andreas Färber1-1/+3
Prepares for cpu_interrupt() changing argument to CPUState. While touching it, rename to x86_cpu_...() now that it takes an X86CPU. Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
2013-01-15target-i386: Use switch in check_hw_breakpoints()liguang1-12/+32
Replace an if statement using magic numbers for breakpoint type with a more explicit switch statement. This is to aid readability. Change the return type and force_dr6_update argument type to bool. While at it, fix Coding Style issues (missing braces). Signed-off-by: liguang <lig.fnst@cn.fujitsu.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-01-15target-i386: Avoid goto in hw_breakpoint_insert()liguang1-6/+10
"Go To Statement Considered Harmful" -- E. Dijkstra To avoid an unnecessary goto within the switch statement, move watchpoint insertion out of the switch statement. Improves readability. While at it, fix Coding Style issues (missing braces, indentation). Signed-off-by: liguang <lig.fnst@cn.fujitsu.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-01-15target-i386: Introduce hw_{local,global}_breakpoint_enabled()liguang1-3/+6
hw_breakpoint_enabled() returned a bit field indicating whether a local breakpoint and/or global breakpoint was enabled. Avoid this number magic by using explicit boolean helper functions hw_local_breakpoint_enabled() and hw_global_breakpoint_enabled(), to aid readability. Reuse them for the hw_breakpoint_enabled() implementation and change its return type to bool. While at it, fix Coding Style issues (missing braces). Signed-off-by: liguang <lig.fnst@cn.fujitsu.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-01-15target-i386: Define DR7 bit field constantsliguang1-9/+9
Implicit use of dr7 bit field is a little hard to understand, so define constants for them and use them consistently. Signed-off-by: liguang <lig.fnst@cn.fujitsu.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-01-15cpu: Move cpu_index field to CPUStateAndreas Färber1-7/+8
Note that target-alpha accesses this field from TCG, now using a negative offset. Therefore the field is placed last in CPUState. Pass PowerPCCPU to [kvm]ppc_fixup_cpu() to facilitate this change. Move common parts of mips cpu_state_reset() to mips_cpu_reset(). Acked-by: Richard Henderson <rth@twiddle.net> (for alpha) [AF: Rebased onto ppc CPU subclasses and openpic changes] Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-12-19softmmu: move include files to include/sysemu/Paolo Bonzini1-2/+2
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-12-19monitor: move include files to include/monitor/Paolo Bonzini1-1/+1
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-12-16exec: refactor cpu_restore_stateBlue Swirl1-4/+1
Refactor common code around calls to cpu_restore_state(). tb_find_pc() has now no external users, make it static. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-31cpus: Pass CPUState to run_on_cpu()Andreas Färber1-2/+2
CPUArchState is no longer needed. Move the declaration to include/qemu/cpu.h and add documentation. Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-10-31target-i386: Pass X86CPU to cpu_x86_inject_mce()Andreas Färber1-1/+2
Needed for changing run_on_cpu() argument to CPUState. Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-10-30target-i386: If x86_cpu_realize() failed, report error and do cleanupIgor Mammedov1-2/+7
Signed-off-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-10-23Rename target_phys_addr_t to hwaddrAvi Kivity1-3/+3
target_phys_addr_t is unwieldly, violates the C standard (_t suffixes are reserved) and its purpose doesn't match the name (most target_phys_addr_t addresses are not target specific). Replace it with a finger-friendly, standards conformant hwaddr. Outstanding patchsets can be fixed up with the command git rebase -i --exec 'find -name "*.[ch]" | xargs s/target_phys_addr_t/hwaddr/g' origin Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-10-05cpu_dump_state: move DUMP_FPU and DUMP_CCOP flags from x86-only to genericPeter Maydell1-2/+2
Move the DUMP_FPU and DUMP_CCOP flags for cpu_dump_state() from being x86-specific flags to being generic ones. This allows us to drop some TARGET_I386 ifdefs in various places, and means that we can (potentially) be more consistent across architectures about which monitor commands or debug abort printouts include FPU register contents and info about QEMU's condition-code optimisations. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-10-01x86: Implement SMEP and SMAPH. Peter Anvin1-29/+121
This patch implements Supervisor Mode Execution Prevention (SMEP) and Supervisor Mode Access Prevention (SMAP) for x86. The purpose of the patch, obviously, is to help kernel developers debug the support for those features. A fair bit of the code relates to the handling of CPUID features. The CPUID code probably would get greatly simplified if all the feature bit words were unified into a single vector object, but in the interest of producing a minimal patch for SMEP/SMAP, and because I had very limited time for this project, I followed the existing style. [ v2: don't change the definition of the qemu64 CPU shorthand, since that breaks loading old snapshots. Per Anthony Liguori this can be fixed once the CPU feature set is snapshot. Change the coding style slightly to conform to checkpatch.pl. ] Signed-off-by: H. Peter Anvin <hpa@linux.intel.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-08-09Merge branch 'x86cpu_qom_tcg_v2' of git://github.com/imammedo/qemuBlue Swirl1-15/+1
* 'x86cpu_qom_tcg_v2' of git://github.com/imammedo/qemu: target-i386: move tcg initialization into x86_cpu_initfn() cleanup cpu_set_debug_excp_handler target-xtensa: drop usage of prev_debug_excp_handler target-i386: drop usage of prev_debug_excp_handler
2012-08-01target-i386: move cpu halted decision into x86_cpu_resetIgor Mammedov1-1/+0
MP initialization protocol differs between cpu families, and for P6 and onward models it is up to CPU to decide if it will be BSP using this protocol, so try to model this. However there is no point in implementing MP initialization protocol in qemu. Thus first CPU is always marked as BSP. This patch: - moves decision to designate BSP from board into cpu, making cpu self-sufficient in this regard. Later it will allow to cleanup hw/pc.c and remove cpu_reset and wrappers from there. - stores flag that CPU is BSP in IA32_APIC_BASE to model behavior described in Inted SDM vol 3a part 1 chapter 8.4.1 - uses MSR_IA32_APICBASE_BSP flag in apic_base for checking if cpu is BSP patch is based on Jan Kiszka's proposal: http://thread.gmane.org/gmane.comp.emulators.qemu/100806 Signed-off-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-06-28x86: avoid AREG0 for exceptionsBlue Swirl1-2/+2
Add an explicit CPUX86State parameter instead of relying on AREG0. Merge raise_exception_env() to raise_exception(), likewise with raise_exception_err_env() and raise_exception_err(). Introduce cpu_svm_check_intercept_param() and cpu_vmexit() as wrappers. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-25target-i386: move tcg initialization into x86_cpu_initfn()Igor Mammedov1-10/+1
In order to make cpu object not depended on external ad-hoc initialization routines, move tcg initialization from cpu_x86_init inside cpu object "x86_cpu_initfn()". Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Andreas Färber <afaerber@suse.de>
2012-06-25target-i386: drop usage of prev_debug_excp_handlerIgor Mammedov1-6/+1
Chains of exception handlers are currently unused feature, drop it for now so as not to expose prev_debug_excp_handler at global scope when moving tcg initialization into target-i386/cpu.c Later we probably could re-invent better interface for this. Signed-off-by: Igor Mammedov <imammedo@redhat.com>
2012-06-04Kill off cpu_state_reset()Andreas Färber1-6/+0
In commit 1bba0dc932e8826a7d030df3767daf0bc339f9a2 cpu_reset() was renamed to cpu_state_reset(), to allow introducing a new cpu_reset() that would operate on QOM objects. All callers have been updated except for one in target-mips, so drop all implementations except for the one in target-mips and move the declaration there until MIPSCPU reset can be fully QOM'ified. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Michael Walle <michael@walle.cc> (for lm32) Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa) Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> (for mb + cris) Acked-by: Alexander Graf <agraf@suse.de> (for ppc) Acked-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-04target-i386: Let cpu_x86_init() return X86CPUAndreas Färber1-2/+2
Turn cpu_init macro into a static inline function returning CPUX86State for backwards compatibility. Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Igor Mammedov <imammedo@redhat.com>
2012-06-04target-i386: Pass X86CPU to do_cpu_{init,sipi}()Andreas Färber1-5/+8
Allows to use cpu_reset() in place of cpu_state_reset(). Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Igor Mammedov <imammedo@redhat.com>
2012-05-12target-i386: Defer MCE initAndreas Färber1-1/+1
Commit de024815e3b523addf58f1f79846b7fe74643678 (target-i386: QOM'ify CPU init) moved mce_init() call from helper.c:cpu_x86_init() into X86CPU's cpu.c:x86_cpu_initfn(). mce_init() checks for a family >= 6 though, so we could end up with a sequence such as for -cpu somecpu,family=6: x86_cpu_initfn => X86CPU::family == 5 mce_init => no-op cpu_x86_register => X86CPU::family = 6 => MCE unexpectedly not init'ed or for -cpu someothercpu,family=5: x86_cpu_initfn => X86CPU::family == 6 mce_init => init'ed cpu_x86_register => X86CPU::family = 5 => MCE unexpectedly init'ed Therefore partially revert the above commit. To avoid moving mce_init() back into helper.c, foresightedly move it into a new x86_cpu_realize() function and, in lack of ObjectClass::realize, call it directly from cpu_x86_init(). While at it, move the qemu_init_vcpu() call that used to follow mce_init() in cpu_x86_init() into the new realizefn as well. Reported-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Igor Mammedov <imammedo@redhat.com>
2012-04-25target-i386: Pass X86CPU to cpu_x86_register()Andreas Färber1-1/+1
Avoids an x86_env_get_cpu() call there, to work with QOM properties. Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com>
2012-04-10target-i386: QOM'ify CPU resetAndreas Färber1-70/+1
Move code from cpu_state_reset() into QOM x86_cpu_reset(), fixing style issues for FPU init. Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-04-10target-i386: QOM'ify CPU initAndreas Färber1-18/+0
Move code from cpu_x86_init() to new QOM x86_cpu_initfn(). Also move mce_init() to cpu.c since it's used nowhere else. Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-04-10target-i386: QOM'ify CPUAndreas Färber1-7/+4
Embed CPUX86State as first member of X86CPU. Distinguish between "x86_64-cpu" and "i386-cpu". Drop cpu_x86_close() in favor of calling object_delete() directly. For now let CPUClass::reset() call cpu_state_reset(). Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-03-14target-i386: Don't overuse CPUStateAndreas Färber1-19/+19
Scripted conversion: sed -i "s/CPUState/CPUX86State/g" target-i386/*.[hc] sed -i "s/#define CPUX86State/#define CPUState/" target-i386/cpu.h Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Anthony Liguori <aliguori@us.ibm.com>
2012-03-14Rename cpu_reset() to cpu_state_reset()Andreas Färber1-2/+2
Frees the identifier cpu_reset for QOM CPUs (manual rename). Don't hide the parameter type behind explicit casts, use static functions with strongly typed argument to indirect. Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
2012-03-11target-i386: Mask NX bit from cpu_get_phys_page_debug resultJan Kiszka1-6/+7
This was a long pending bug, now revealed by the assert in phys_page_find that stumbled over the large page index returned by cpu_get_phys_page_debug for NX-marked pages: We need to mask out NX and all user-definable bits 52..62 from PDEs and the final PTE to avoid corrupting physical addresses. Reviewed-by: Avi Kivity <avi@redhat.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-03Merge branch 'upstream' of git://qemu.weilnetz.de/qemuBlue Swirl1-6/+0
* 'upstream' of git://qemu.weilnetz.de/qemu: Move definition of HOST_LONG_BITS to qemu-common.h target-xtensa: Clean includes target-unicore32: Clean includes target-sh4: Clean includes target-s390x: Clean includes target-ppc: Clean includes target-mips: Clean includes target-microblaze: Clean includes target-m68k: Clean includes target-lm32: Clean includes target-i386: Clean includes target-cris: Clean includes target-arm: Clean includes target-alpha: Clean includes Remove macro HOST_LONG_SIZE
2012-02-28target-i386: Clean includesStefan Weil1-6/+0
Remove some include statements which are not needed. Signed-off-by: Stefan Weil <sw@weilnetz.de>
2012-02-18target-i386: Add infrastructure for reporting TPR MMIO accessesJan Kiszka1-0/+16
This will allow the APIC core to file a TPR access report. Depending on the accelerator and kernel irqchip mode, it will either be delivered right away or queued for later reporting. In TCG mode, we can restart the triggering instruction and can therefore forward the event directly. KVM does not allows us to restart, so we postpone the delivery of events recording in the user space APIC until the current instruction is completed. Note that KVM without in-kernel irqchip will report the address after the instruction that triggered the access. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Avi Kivity <avi@redhat.com>
2011-11-02Fix X86 CPU topology in KVM modeBharata B Rao1-0/+1
apic id returned to guest kernel in ebx for cpuid(function=1) depends on CPUX86State->cpuid_apic_id which gets populated after the cpuid information is cached in the host kernel. This results in broken CPU topology in guest. Fix this by setting cpuid_apic_id before cpuid information is passed to the host kernel. This is done by moving the setting of cpuid_apic_id to cpu_x86_init() where it will work for both KVM as well as TCG modes. Acked-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Bharata B Rao <bharata.rao@gmail.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-10-24i386: wire up MSR_IA32_MISC_ENABLEAvi Kivity1-0/+1
It's needed for its default value - bit 0 specifies that "rep movs" is good enough for memcpy, and Linux may use a slower memcpu if it is not set, depending on cpu family/model. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-08-20Use glib memory allocation and free functionsAnthony Liguori1-2/+2
qemu_malloc/qemu_free no longer exist after this commit. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-08-07Remove unused is_softmmu parameter from cpu_handle_mmu_faultBlue Swirl1-2/+2
Parameter is_softmmu (and its evil mutant twin brother is_softmuu) is not used in cpu_*_handle_mmu_fault() functions, remove them and adjust callers. Acked-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-08-05Avoid allocating TCG resources in non-TCG modeJan Kiszka1-2/+2
Do not allocate TCG-only resources like the translation buffer when running over KVM or XEN. Saves a "few" bytes in the qemu address space and is also conceptually cleaner. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-07-30exec.h cleanupBlue Swirl1-2/+0
Move softmmu_exec.h include directives from target-*/exec.h to target-*/op_helper.c. Move also various other stuff only used in op_helper.c there. Define global env in dyngen-exec.h. For i386, move wrappers for segment and FPU helpers from user-exec.c to op_helper.c. Implement raise_exception_err_env() to handle dynamic CPUState. Move the function declarations to cpu.h since they can be used outside of op_helper.c context. LM32, s390x, UniCore32: remove unused cpu_halted(), regs_to_env() and env_to_regs(). ARM: make raise_exception() static. Convert #include "exec.h" to #include "cpu.h" #include "dyngen-exec.h" and remove now unused target-*/exec.h. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26Remove exec-all.h include directivesBlue Swirl1-1/+0
Most exec-all.h include directives are now useless, remove them. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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