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path: root/target-i386/helper.c
AgeCommit message (Expand)AuthorFilesLines
2008-11-18x86: Dump debug registers (Jan Kiszka)aliguori1-0/+7
2008-11-18x86: Debug register emulation (Jan Kiszka)aliguori1-31/+138
2008-11-17TCG variable type checking.pbrook1-0/+1
2008-11-13x86: fix warning without CONFIG_KVM (Mark McLoughlin)aliguori1-2/+2
2008-11-13Fix CPUID ext2 features masking (Avi Kivity)aliguori1-1/+1
2008-11-10x86 CPUID extended family/model (Andre Przywara).balrog1-2/+7
2008-11-05Add KVM support to QEMUaliguori1-0/+73
2008-11-05Split CPUID from op_helperaliguori1-0/+166
2008-10-28Fix cpuid ext_features value for Atom N270 (Blue Swirl).balrog1-1/+1
2008-10-14target-i386: Add Core Duo Definitionaurel321-1/+20
2008-09-29My core2duo patch introduced a vague statement of "missing features" in pbrook1-7/+10
2008-09-28Rename -cpu atom to -cpu n270.balrog1-1/+1
2008-09-25Add Atom (x86) cpu identification.balrog1-3/+24
2008-09-25Core 2 Duo specification (Alexander Graf).balrog1-0/+18
2008-09-25Clean up vendor identification (Alexander Graf).balrog1-6/+6
2008-09-25Use qemu_free() on env instead of free.balrog1-1/+1
2008-08-18i386: Catch all non-present ptes in cpu_get_phys_page_debug (Jan Kiszka)aliguori1-0/+2
2008-07-23Fix task register type after reset (Avi Kivity)aliguori1-1/+1
2008-07-03Fix constant truncation, spotted by Jindrich Makovicka.ths1-3/+3
2008-06-20added model_id and vendor cpu model options (initial patch by Dan Kenigsberg)...bellard1-11/+29
2008-06-06Fix i386 segment descriptor types on reset (Avi Kivity)bellard1-9/+15
2008-06-04reworked SVM interrupt handling logic - fixed vmrun EIP saved value - reworke...bellard1-1/+1
2008-05-28moved halted field to CPU_COMMONbellard1-2/+2
2008-05-28SVM reworkbellard1-5/+4
2008-05-28consistent naming for i386 TCG helper filebellard1-5193/+1011
2008-05-25Fix off-by-one unwinding error.pbrook1-5/+0
2008-05-22cmpxchg8b fix - added cmpxchg16bbellard1-2/+24
2008-05-22fxsave/fxrstor 64 bit fixbellard1-2/+20
2008-05-21convert eflags manipulation insns to TCGbellard1-0/+14
2008-05-21converted LSL/LAR/VERW/VERR to TCG - force 16 bit memory access for LSL/LARbellard1-12/+12
2008-05-21converted INTO/CMPXCHG8B to TCGbellard1-0/+9
2008-05-21converted MUL/IMUL to TCGbellard1-24/+0
2008-05-17BSR/BSF TCG conversionbellard1-0/+31
2008-05-17moved eflags computation outside op.cbellard1-0/+79
2008-05-17converted condition code supprot to TCG - converted shift ops to TCGbellard1-0/+19
2008-05-15converted more helpers to TCG - fixed some SVM issuesbellard1-130/+179
2008-05-12converted more helpers to TCGbellard1-75/+351
2008-05-12converted x87 FPU ops to TCGbellard1-21/+425
2008-05-12converted SSE/MMX ops to TCGbellard1-0/+29
2008-05-12char is only for stringsbellard1-3/+3
2008-04-27Use correct types to enable > 2G support, based on a patch fromaurel321-1/+15
2008-04-13x86: Introduce CPU_INTERRUPT_NMIaurel321-0/+2
2008-04-11Remove unused phys_ram_base definition from target-i386/helper.c.aurel321-1/+0
2008-03-28x86-64: recompute DF after eflags has been modified when emulating SYSCALLaurel321-0/+1
2008-03-09 Fix some functions declared () rather than (void) (Ian Jackson)blueswir11-1/+1
2008-02-03NMI and INTR events injection should not be handled as software interrupts (B...balrog1-2/+2
2008-02-03Make SVM env->cr[8] a valid register (patch from TeLeMan).balrog1-1/+5
2008-02-01use the TCG code generatorbellard1-4/+4
2007-12-24SVM enabled processor should provide cpuid Fn8000_000A (Bernhard Kauer).balrog1-0/+6
2007-12-09Make SVM IOIO intercept check all needed bits, by Bernhard Kauer.balrog1-1/+2
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