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2014-01-14Merge remote branch 'luiz/queue/qmp' into qmpqEdgar E. Iglesias1-3/+1
* luiz/queue/qmp: migration: qmp_migrate(): keep working after syntax error qerror: Remove assert_no_error() qemu-option: Remove qemu_opts_create_nofail target-i386: Remove assert_no_error usage hw: Remove assert_no_error usages qdev: Delete dead code error: Add error_abort monitor: add object-add (QMP) and object_add (HMP) command monitor: add object-del (QMP) and object_del (HMP) command qom: catch errors in object_property_add_child qom: fix leak for objects created with -object rng: initialize file descriptor to -1 qemu-monitor: HMP cpu-add wrapper vl: add missing transition debug->finish_migrate Message-Id: 1389045795-18706-1-git-send-email-lcapitulino@redhat.com Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2014-01-10Merge remote-tracking branch 'afaerber/tags/qom-cpu-for-anthony' into stagingAnthony Liguori6-71/+90
QOM CPUState refactorings / X86CPU * TLB invalidation optimizations * X86CPU initialization cleanups * Preparations for X86CPU hot-unplug # gpg: Signature made Tue 24 Dec 2013 04:51:52 AM PST using RSA key ID 3E7E013F # gpg: Good signature from "Andreas Färber <afaerber@suse.de>" # gpg: aka "Andreas Färber <afaerber@suse.com>" # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 174F 0347 1BCC 221A 6175 6F96 FA2E D12D 3E7E 013F * afaerber/tags/qom-cpu-for-anthony: target-i386: Cleanup 'foo=val' feature handling target-i386: Cleanup 'foo' feature handling target-i386: Convert 'check' and 'enforce' to static properties target-i386: Convert 'hv_spinlocks' to static property target-i386: Convert 'hv_vapic' to static property target-i386: Convert 'hv_relaxed' to static property cpu-exec: Optimize X86CPU usage in cpu_exec() target-i386: Move apic_state field from CPUX86State to X86CPU cputlb: Tidy memset() of arrays cputlb: Use memset() when flushing entries
2014-01-09Merge remote-tracking branch 'rth/ldst-i386-2' into stagingAnthony Liguori1-1534/+1111
* rth/ldst-i386-2: (49 commits) target-i386: Tidy ljmp target-i386: Rename gen_op_jmp_T0 to gen_op_jmp_v target-i386: Tidy some size computation target-i386: Remove gen_op_mov_reg_A0 target-i386: Remove gen_op_mov_TN_reg target-i386: Remove gen_op_addl_T0_T1 target-i386: Remove gen_op_mov_reg_T1 target-i386: Remove gen_op_mov_reg_T0 target-i386: Tidy cpu_regs initialization target_i386: Clean up gen_pop_T0 target-i386: Combine gen_push_T* into gen_push_v target-i386: Tidy addr16 code in gen_lea_modrm target-i386: Change dflag to TCGMemOp target-i386: Change gen_op_mov_reg_A0 size parameter to TCGMemOp target-i386: Change aflag to TCGMemOp target-i386: Change gen_op_j*z_ecx size parameter to TCGMemOp target-i386: Change gen_op_add_reg_* size parameter to TCGMemOp target-i386: Use TCGMemOp for 'ot' variables target-i386: Remove gen_op_andl_A0_ffff target-i386: Remove gen_op_movl_T0_T1 ... Message-id: 1389128439-10067-1-git-send-email-rth@twiddle.net Signed-off-by: Anthony Liguori <aliguori@amazon.com>
2014-01-07target-i386: Tidy ljmpRichard Henderson1-2/+1
Remove an unnecessary move opcode. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Rename gen_op_jmp_T0 to gen_op_jmp_vRichard Henderson1-9/+9
And make the destination argument explicit. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Tidy some size computationRichard Henderson1-3/+3
Clean up relics of multiple size domains: - MO_16 + 1 => - 1 + 1 => 0. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Remove gen_op_mov_reg_A0Richard Henderson1-6/+1
Replace with its definition. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Remove gen_op_mov_TN_regRichard Henderson1-64/+59
Replace with its definition. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Remove gen_op_addl_T0_T1Richard Henderson1-8/+3
Replace with its definition. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Remove gen_op_mov_reg_T1Richard Henderson1-18/+13
Replace with its definition. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Remove gen_op_mov_reg_T0Richard Henderson1-70/+65
Replace with its definition. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Tidy cpu_regs initializationRichard Henderson1-51/+36
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target_i386: Clean up gen_pop_T0Richard Henderson1-47/+37
Reduce ifdefs, share more code between paths, reduce the number of TCG ops generated. Avoid re-computing the size of the operation across gen_pop_T0 and gen_pop_update. Add forgotten zero-extension in the TARGET_X86_64, !CODE64, ss32 case. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Combine gen_push_T* into gen_push_vRichard Henderson1-74/+32
Reduce ifdefs, share more code between paths, reduce the number of TCG ops generated. Add forgotten zero-extension in the TARGET_X86_64, !CODE64, ss32 case. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Tidy addr16 code in gen_lea_modrmRichard Henderson1-18/+16
Unlike the addr32, there was no bug. But we can use the same technique to reduce the number of TCG ops. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Change dflag to TCGMemOpRichard Henderson1-284/+216
Changing the domain to TCGMemOp makes it easier to interoperate with other portions of the rest of the translator. We now only have one domain for size operands inside the translator, which makes things less confusing all the way around. There are still a number of helpers that continue to use the log2-1 domain. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Change gen_op_mov_reg_A0 size parameter to TCGMemOpRichard Henderson1-24/+8
Change the domain of the parameter and update all callers. Which lets us defer completely to gen_op_mov_reg_v. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Change aflag to TCGMemOpRichard Henderson1-91/+87
Changing the domain to TCGMemOp makes it easier to interoperate with other portions of the rest of the translator. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Change gen_op_j*z_ecx size parameter to TCGMemOpRichard Henderson1-10/+10
Change the domain of the parameter and update all callers. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Change gen_op_add_reg_* size parameter to TCGMemOpRichard Henderson1-54/+22
These functions used the aflags/dflags domain, which is log2-1 of the byte size. Confusingly, they used enumeration values from the log2 domain. Change the domain of the parameter and update all callers. Since we're now in a common domain, defer the deposit/extend/mov decision to gen_op_mov_reg_v. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Use TCGMemOp for 'ot' variablesRichard Henderson1-50/+70
The 'ot' variables (operand type?) hold the log2(byte size) of the operand being manipulated. This is the same as the MO_SIZE subset of the TCGMemOp. Indeed, we often pass 'ot' to the tcg_gen_qemu_ld/st functions. Changing the type from 'int' makes it easier to see what domain the variable should be. This does require adding some default cases to some switch statements, to avoid the 'unhandled enumeration value' warning that would result from the change of type. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Remove gen_op_andl_A0_ffffRichard Henderson1-20/+13
Replace it with tcg_gen_ext16u_tl, and in two cases merge with a previous move from cpu_regs. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Remove gen_op_movl_T0_T1Richard Henderson1-6/+1
Replace it with its definition. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Remove gen_op_andl_T0_imRichard Henderson1-11/+9
Replace it with its definition. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Remove gen_op_andl_T0_ffffRichard Henderson1-25/+18
Replace it with tcg_gen_ext16u_tl. In four places we can combine that with a previous move into cpu_T[0], and in one place we can infer that the zero-extension has already happened via the previous load. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Remove gen_movtl_T*_imRichard Henderson1-13/+3
Propagate the definitions into all users. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Remove gen_op_mov*_A0_imRichard Henderson1-15/+2
Propagate the definitions into all users. In two cases, this allows us to share code between the 32-bit and 64-bit immediate moves. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Remove gen_op_movl_T0_im*Richard Henderson1-20/+10
Propagate the definitions into all users. The only time that gen_op_movl_T1_imu was used, the input was type 'unsigned', so the replacement works identically. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Remove gen_op_movl_T0_im*Richard Henderson1-22/+10
Propagate the definition of gen_op_movl_T0_im to all users. The function gen_op_movl_T0_imu was unused. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Remove gen_op_movl_T0_0Richard Henderson1-11/+6
Propagate its definition into all users. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Tidy extend + moveRichard Henderson1-9/+5
For the known MO_32/MO_64 cases, we don't need to extend a 32-bit temp into a 64-bit temp before storing into the hardware register. We do need the extension for the MO_8/MO_16 cases, in order for the deposit_tl operation to work, so leave those alone. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Tidy extend + storeRichard Henderson1-17/+17
We can now use tcg_gen_qemu_st_i32 directly to avoid the extension. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Tidy load + truncateRichard Henderson1-20/+19
We can now use tcg_gen_qemu_ld_i32 directly to avoid the truncation. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Tidy gen_op_mov_TN_reg+tcg_gen_trunc_tl_i32Richard Henderson1-6/+3
For the 16 and 32-bit cases, we don't need to truncate via a temporary register. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Use MO_BE for movbeRichard Henderson1-35/+5
Fold the bswap into the memory operation. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Remove unused arguments to gen_lea_modrmRichard Henderson1-77/+69
The reg_ptr and offset_ptr outputs are universally unused. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Tidy movslRichard Henderson1-5/+1
Always perform a sign-extending load. In the extremely unlikely case that we've used an 0x66 prefix, the extension to 64-bits is unnecessary but not wrong; the store will still examine only 16 bits. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Tidy mov[sz][bw]Richard Henderson1-11/+12
We can use the MO_SIGN bit to tidy the reg-reg switch statement as well as pass it on to gen_op_ld_v, eliminating one call. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Fix typo in gen_push_T1Richard Henderson1-1/+1
By inspection, obviously we should be storing T[1] not T[0]. This could only happen for x86_64 in 64-bit mode with 0x66 prefix to call insn -- i.e. never. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Remove gen_op_st_T1_A0Richard Henderson1-7/+2
Propagate its definition into all users. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Remove gen_op_st_T0_A0Richard Henderson1-43/+40
Propagate its definition into all users. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Introduce gen_op_st_rm_T0_A0Richard Henderson1-61/+24
Too many places have the same test vs OR_TMP0 to indicate a write back to memory. Hoist that to a subroutine. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Remove gen_op_lds_T0_A0Richard Henderson1-9/+4
Replace its users by gen_op_ld_v with the MO_SIGN bit set. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Remove gen_op_ld_T1_A0Richard Henderson1-14/+9
Propagate its definition into all users. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Remove gen_op_ldu_T0_A0Richard Henderson1-10/+5
Propagate its definition into all users. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Remove gen_op_ld_T0_A0Richard Henderson1-41/+36
Propagate its definition into all users. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Replace OT_* constants with MO_* constantsRichard Henderson1-360/+354
The MO_8/16/32/64 constants have the same encoding and meaning as the OT_BYTE/WORD/LONG/QUAD. Since we rely on them being the same, for the qemu_ld/st helpers, standardize on the common names. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Use new tcg_gen_qemu_st_* helpersRichard Henderson1-41/+34
In preference to the older helpers. Stores only in this patch. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Use new tcg_gen_qemu_ld_* helpersRichard Henderson1-53/+31
In preference to the older helpers. Loads only in this patch. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Stop encoding DisasContext.mem_indexRichard Henderson1-42/+25
Now that we don't combine mem_index with operand size info, we don't need to encode it. Which tidies many places that access it. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
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