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2013-05-31target-i386: Fix aflag logic for CODE64 and the 0x67 prefixRichard Henderson1-15/+15
The code reorganization in commit 4a6fd938 broke handling of PREFIX_ADR. While fixing this, tidy and comment the code so that it's more obvious what's going on in setting both aflag and dflag. The TARGET_X86_64 ifdef can be eliminated because CODE64 expands to the constant zero when TARGET_X86_64 is undefined. Cc: Paolo Bonzini <pbonzini@redhat.com> Reported-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-id: 1369855851-21400-1-git-send-email-rth@twiddle.net Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-05-31target-i386: Fix mask of pte index in memory mappingQiao Nuohan1-1/+1
Function walk_pte() needs pte index to calculate virtual address. However, pte index of PAE paging or IA-32e paging is 9 bit, so the mask should be 0x1ff. Signed-off-by: Qiao Nuohan <qiaonuohan@cn.fujitsu.com> Reviewed-by: Jesse Larrew <jlarrew@linux.vnet.ibm.com> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
2013-05-31target-i386: fix abort on bad PML4E/PDPTE/PDE/PTE addressesLuiz Capitulino1-4/+6
The code used to walk IA-32e page-tables, and possibly PAE page-tables, uses the bit mask ~0xfff to get the next PML4E/PDPTE/PDE/PTE address. However, as we use a uint64_t to store the resulting address, that mask gets expanded to 0xfffffffffffff000 which not only ends up selecting reserved bits but also selects the XD bit (execute-disable) which happens to be enabled by Windows 8, causing qemu_get_ram_ptr() to abort. This commit fixes that problem by replacing ~0xfff by a correct mask that only selects the address bit range (ie. bits 51:12). Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2013-05-10target-i386: ROR r8/r16 imm instruction fixAurelien Jarno1-0/+1
Fix EFLAGS corruption by ROR r8/r16 imm instruction located at the end of the TB, similarly to commit 089305ac for the non-immediate case. Reported-by: Hervé Poussineau <hpoussin@reactos.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-05-06target-i386: n270 can MOVBEBorislav Petkov1-1/+2
The Atom core (cpu name "n270" in QEMU speak) supports MOVBE. This is needed when booting 3.8 and later linux kernels built with the MATOM target because we require MOVBE in order to boot properly now. Signed-off-by: Borislav Petkov <bp@suse.de> [ehabkost: added compat code to disable MOVBE on pc-*-1.4 and older] Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-05-06target-i386: Introduce generic CPUID feature compat functionEduardo Habkost2-0/+30
Introduce x86_cpu_compat_set_features(), that can be used to set/unset feature bits on specific CPU models for machine-type compatibility. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-05-06target-i386: Change CPUID model of 486 to 8Andreas Färber1-1/+1
This changes the model number of 486 to 8 (DX4) which matches the feature set presented, and actually has the CPUID instruction. This adds a compatibility property, to keep model=0 on pc-*-1.4 and older. Signed-off-by: H. Peter Anvin <hpa@zytor.com> [AF: Add compat_props entry] Tested-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-05-06target-i386: Emulate X86CPU subclasses for global propertiesAndreas Färber1-0/+9
After initializing the object from its x86_def_t and before setting any additional -cpu arguments, set any global properties for the designated subclass <name>-{i386,x86_64}-cpu. Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-05-06target-i386: Add "filtered-features" property to X86CPUEduardo Habkost1-4/+7
This property will contain all the features that were removed from the CPU because they are not supported by the host. This way, libvirt or other management tools can emulate the check/enforce behavior by checking if filtered-properties is all zeroes, before starting the guest. Example output where some features were missing: $ qemu-system-x86_64 -enable-kvm -cpu Haswell,check -S \ -qmp unix:/tmp/m,server,nowait warning: host doesn't support requested feature: CPUID.01H:ECX.fma [bit 12] warning: host doesn't support requested feature: CPUID.01H:ECX.movbe [bit 22] warning: host doesn't support requested feature: CPUID.01H:ECX.tsc-deadline [bit 24] warning: host doesn't support requested feature: CPUID.01H:ECX.xsave [bit 26] warning: host doesn't support requested feature: CPUID.01H:ECX.avx [bit 28] warning: host doesn't support requested feature: CPUID.07H:EBX.fsgsbase [bit 0] warning: host doesn't support requested feature: CPUID.07H:EBX.bmi1 [bit 3] warning: host doesn't support requested feature: CPUID.07H:EBX.hle [bit 4] warning: host doesn't support requested feature: CPUID.07H:EBX.avx2 [bit 5] warning: host doesn't support requested feature: CPUID.07H:EBX.smep [bit 7] warning: host doesn't support requested feature: CPUID.07H:EBX.bmi2 [bit 8] warning: host doesn't support requested feature: CPUID.07H:EBX.erms [bit 9] warning: host doesn't support requested feature: CPUID.07H:EBX.invpcid [bit 10] warning: host doesn't support requested feature: CPUID.07H:EBX.rtm [bit 11] [...] $ ./QMP/qmp --path=/tmp/m \ qom-get --path=/machine/icc-bridge/icc/child[0] \ --property=filtered-features item[0].cpuid-register: EDX item[0].cpuid-input-eax: 2147483658 item[0].features: 0 item[1].cpuid-register: EAX item[1].cpuid-input-eax: 1073741825 item[1].features: 0 item[2].cpuid-register: EDX item[2].cpuid-input-eax: 3221225473 item[2].features: 0 item[3].cpuid-register: ECX item[3].cpuid-input-eax: 2147483649 item[3].features: 0 item[4].cpuid-register: EDX item[4].cpuid-input-eax: 2147483649 item[4].features: 0 item[5].cpuid-register: EBX item[5].cpuid-input-eax: 7 item[5].features: 4025 item[5].cpuid-input-ecx: 0 item[6].cpuid-register: ECX item[6].cpuid-input-eax: 1 item[6].features: 356519936 item[7].cpuid-register: EDX item[7].cpuid-input-eax: 1 item[7].features: 0 Example output when no feature is missing: $ qemu-system-x86_64 -enable-kvm -cpu Nehalem,enforce -S \ -qmp unix:/tmp/m,server,nowait [...] $ ./QMP/qmp --path=/tmp/m \ qom-get --path=/machine/icc-bridge/icc/child[0] \ --property=filtered-features item[0].cpuid-register: EDX item[0].cpuid-input-eax: 2147483658 item[0].features: 0 item[1].cpuid-register: EAX item[1].cpuid-input-eax: 1073741825 item[1].features: 0 item[2].cpuid-register: EDX item[2].cpuid-input-eax: 3221225473 item[2].features: 0 item[3].cpuid-register: ECX item[3].cpuid-input-eax: 2147483649 item[3].features: 0 item[4].cpuid-register: EDX item[4].cpuid-input-eax: 2147483649 item[4].features: 0 item[5].cpuid-register: EBX item[5].cpuid-input-eax: 7 item[5].features: 0 item[5].cpuid-input-ecx: 0 item[6].cpuid-register: ECX item[6].cpuid-input-eax: 1 item[6].features: 0 item[7].cpuid-register: EDX item[7].cpuid-input-eax: 1 item[7].features: 0 Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-05-06target-i386: Introduce X86CPU::filtered_features fieldEduardo Habkost2-3/+9
This field will contain the feature bits that were filtered out because of missing host support. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-05-06target-i386: Add "feature-words" property to X86CPUEduardo Habkost1-12/+58
This property will be useful for libvirt, as libvirt already has logic based on low-level feature bits (not feature names), so it will be really easy to convert the current libvirt logic to something using the "feature-words" property. The property will have two main use cases: - Checking host capabilities, by checking the features of the "host" CPU model - Checking which features are enabled on each CPU model Example output: $ ./QMP/qmp --path=/tmp/m \ qom-get --path=/machine/icc-bridge/icc/child[0] \ --property=feature-words item[0].cpuid-register: EDX item[0].cpuid-input-eax: 2147483658 item[0].features: 0 item[1].cpuid-register: EAX item[1].cpuid-input-eax: 1073741825 item[1].features: 0 item[2].cpuid-register: EDX item[2].cpuid-input-eax: 3221225473 item[2].features: 0 item[3].cpuid-register: ECX item[3].cpuid-input-eax: 2147483649 item[3].features: 101 item[4].cpuid-register: EDX item[4].cpuid-input-eax: 2147483649 item[4].features: 563346425 item[5].cpuid-register: EBX item[5].cpuid-input-eax: 7 item[5].features: 0 item[5].cpuid-input-ecx: 0 item[6].cpuid-register: ECX item[6].cpuid-input-eax: 1 item[6].features: 2155880449 item[7].cpuid-register: EDX item[7].cpuid-input-eax: 1 item[7].features: 126614521 Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-05-06target-i386: Use FeatureWord loop on filter_features_for_kvm()Eduardo Habkost1-17/+7
Instead of open-coding the filtering code for each feature word, change the existing code to use the feature_word_info array, that has exactly the same CPUID eax/ecx/register values for each feature word. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-05-06target-i386: Add ECX information to FeatureWordInfoEduardo Habkost1-3/+7
FEAT_7_0_EBX uses ECX as input, so we have to take that into account when reporting feature word values. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-05-02target-i386: Replace cpuid_*features fields with a feature word arrayEduardo Habkost6-193/+179
This replaces the feature-bit fields on both X86CPU and x86_def_t structs with an array. With this, we will be able to simplify code that simply does the same operation on all feature words (e.g. kvm_check_features_against_host(), filter_features_for_kvm(), add_flagname_to_bitmaps(), CPU feature-bit property lookup/registration, and the proposed "feature-words" property) The following field replacements were made on X86CPU and x86_def_t: (cpuid_)features -> features[FEAT_1_EDX] (cpuid_)ext_features -> features[FEAT_1_ECX] (cpuid_)ext2_features -> features[FEAT_8000_0001_EDX] (cpuid_)ext3_features -> features[FEAT_8000_0001_ECX] (cpuid_)ext4_features -> features[FEAT_C000_0001_EDX] (cpuid_)kvm_features -> features[FEAT_KVM] (cpuid_)svm_features -> features[FEAT_SVM] (cpuid_)7_0_ebx_features -> features[FEAT_7_0_EBX] Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-05-02target-i386: Break CPUID feature definition linesEduardo Habkost1-90/+180
Break lines on kvm_check_features_against_host(), kvm_cpu_fill_host(), and builtin_x86_defs, so they don't get too long once the *_features fields are replaced by an array. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-05-01target-i386/kvm.c: Code formatting changesEduardo Habkost1-1/+2
Add appropriate spaces around operators, and break line where it needs to be broken to allow feature-words array to be introduced without having too-long lines. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-05-01target-i386: Group together level, xlevel, xlevel2 fieldsEduardo Habkost2-4/+4
Consolidate level, xlevel, xlevel2 fields in x86_def_t and CPUX86State. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-05-01target-i386: Move APIC to ICC busIgor Mammedov1-13/+3
It allows APIC to be hotplugged. * map APIC's mmio at board level if it is present * do not register mmio region for each APIC, since only one is used/mapped Signed-off-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-05-01target-i386: Attach ICC bus to CPU on its creationIgor Mammedov2-3/+15
X86CPU should have parent bus so it could provide bus for child APIC. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-05-01cpu: Move cpu_write_elfXX_note() functions to CPUStateJens Freimann3-16/+37
Convert cpu_write_elfXX_note() functions to CPUClass methods and pass CPUState as argument. Update target-i386 accordingly. Signed-off-by: Jens Freimann <jfrei@linux.vnet.ibm.com> [AF: Retain stubs as CPUClass' default method implementation; style changes] Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-05-01target-i386: Replace MSI_SPACE_SIZE with APIC_SPACE_SIZEIgor Mammedov1-0/+1
Put APIC_SPACE_SIZE in a public header so that it can be reused elsewhere later. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-05-01target-i386: Do not allow to set apic-id once CPU is realizedIgor Mammedov1-0/+7
Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-05-01target-i386: Introduce apic-id CPU propertyIgor Mammedov1-0/+40
The property is used from board level to set APIC ID for CPUs it creates. Do so in a new pc_new_cpu() helper, to be reused for hot-plug. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-05-01target-i386: Introduce feat2prop() for CPU propertiesIgor Mammedov1-4/+15
This helper replaces '_' with '-' in a uniform way. As a side effect, even custom mappings must use '-' now. Signed-off-by: Igor Mammedov <imammedo@redhat.com> [AF: Split off; operate on NUL-terminated string rather than '=' delimiter] Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-05-01cpu: Introduce get_arch_id() method and override it for X86CPUIgor Mammedov1-0/+10
get_arch_id() adds possibility for generic code to get a guest-visible CPU ID without accessing CPUArchState. If derived classes don't override it, it will return cpu_index. Override it on target-i386 in X86CPU to return the APIC ID. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: liguang <lig.fnst@cn.fujitsu.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-04-20i386 ROR r8/r16 instruction fixPavel Dovgaluk1-0/+1
Fixed EFLAGS corruption by ROR r8/r16 instruction located at the end of the TB. Signed-off-by: Pavel Dovgalyuk <pavel.dovgaluk@gmail.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-04-17target-i386: kvm: save/restore steal time MSRMarcelo Tosatti3-0/+35
Read and write steal time MSR, so that reporting is functional across migration. Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Gleb Natapov <gleb@redhat.com>
2013-04-16target-i386: Split out CPU creation and features parsingIgor Mammedov2-3/+16
Move CPU creation and features parsing into a separate cpu_x86_create() function, so that board would be able to set board-specific CPU properties before CPU is realized. Keep cpu_x86_init() for compatibility with the code that uses cpu_init() and doesn't need to modify CPU properties. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-04-16target-i386/cpu.c: Coding style fixesEduardo Habkost1-3/+4
* Add braces to 'if' statements; * Remove last TAB character from the source. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> [AF: Changed whitespace] Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-04-16target-i386: Split APIC creation from initialization in x86_cpu_realizefn()Igor Mammedov1-3/+21
When APIC is hotplugged during CPU hotplug, device_set_realized() calls device_reset() on it. And if QEMU runs in KVM mode, following call chain will fail: apic_reset_common() -> kvm_apic_vapic_base_update() -> kvm_vcpu_ioctl(cpu->kvm_fd,...) due to cpu->kvm_fd not being initialized yet. cpu->kvm_fd is initialized during qemu_init_vcpu() but x86_cpu_apic_init() can't be moved after it because kvm_init_vcpu() -> kvm_arch_reset_vcpu() relies on APIC to determine if CPU is BSP for setting initial env->mp_state. So split APIC device creation from its initialization and realize APIC after CPU is created, when it's safe to call APIC's reset method. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: liguang <lig.fnst@cn.fujitsu.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-04-16target-i386: Consolidate error propagation in x86_cpu_realizefn()Igor Mammedov1-7/+10
Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-04-16target-i386: Improve -cpu ? features outputJan Kiszka1-8/+6
We were missing a bunch of feature lists. Fix this by simply dumping the meta list feature_word_info. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-04-16target-i386: Fix including "host" in -cpu ? outputJan Kiszka1-3/+6
kvm_enabled() cannot be true at this point because accelerators are initialized much later during init. Also, hiding this makes it very hard to discover for users. Simply dump unconditionally if CONFIG_KVM is set. Add explanation for "host" CPU type. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-04-13target-i386: add AES-NI instructionsAurelien Jarno5-3/+104
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-04-13target-i386: enable PCLMULQDQ on Westmere CPUAurelien Jarno1-1/+1
The PCLMULQDQ instruction has been introduced on the Westmere CPU. Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-04-13target-i386: add pclmulqdq instructionAurelien Jarno4-10/+41
Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-04-08hw: move headers to include/Paolo Bonzini4-7/+7
Many of these should be cleaned up with proper qdev-/QOM-ification. Right now there are many catch-all headers in include/hw/ARCH depending on cpu.h, and this makes it necessary to compile these files per-target. However, fixing this does not belong in these patches. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-04extract/unify the constant 0xfee00000 as APIC_DEFAULT_ADDRESSLaszlo Ersek2-3/+3
A common dependency of the constant's current users: - hw/apic_common.c - hw/i386/kvmvapic.c - target-i386/cpu.c is "target-i386/cpu.h". Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Message-id: 1363821803-3380-9-git-send-email-lersek@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-04-04strip some whitespaceLaszlo Ersek1-1/+1
Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Message-id: 1363821803-3380-2-git-send-email-lersek@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-04-03target-i386: Check for host features before filter_features_for_kvm()Eduardo Habkost1-3/+3
commit 5ec01c2e96910e1588d1a0de8609b9dda7618c7f broke "-cpu ..,enforce", as it has moved kvm_check_features_against_host() after the filter_features_for_kvm() call. filter_features_for_kvm() removes all features not supported by the host, so this effectively made kvm_check_features_against_host() impossible to fail. This patch changes the call so we check for host feature support before filtering the feature bits. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Message-id: 1364935692-24004-1-git-send-email-ehabkost@redhat.com Cc: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-04-01target-i386: SSE4.2: use clz32/ctz32 instead of reinventing the wheelAurelien Jarno2-30/+3
Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-04-01target-i386: enable SSE4.1 and SSE4.2 in TCG modeAurelien Jarno1-6/+7
Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-04-01target-i386: SSE4.2: fix pcmpXstrX instructions with "Masked(-)" polarityAurelien Jarno1-1/+1
valids can equals to -1 if the reg/mem string is empty. Change the expression to have an empty xor mask in that case. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-04-01target-i386: SSE4.2: fix pcmpXstrX instructions in "Equal ordered" modeAurelien Jarno1-2/+3
The inner loop should only change the current bit of the result, instead of the whole result. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-04-01target-i386: SSE4.2: fix pcmpXstrX instructions in "Equal each" modeAurelien Jarno1-1/+1
pcmpXstrX instructions in "Equal each" mode force both invalid element pair to true. It means (upper - MAX(valids, validd)) bits should be set to 1, not (upper - MAX(valids, validd) + 1). Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-04-01target-i386: SSE4.2: fix pcmpXstrX instructions in "Ranges" modeAurelien Jarno1-2/+2
Fix the order of the of the comparisons to match the "Intel 64 and IA-32 Architectures Software Developer's Manual". Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-04-01target-i386: SSE4.2: fix pcmpXstrm instructionsAurelien Jarno1-8/+8
pcmpXstrm instructions returns their result in the XMM0 register and not in the first operand. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-04-01target-i386: SSE4.2: fix pcmpXstri instructionsAurelien Jarno1-2/+2
ffs1 returns the first bit set to one starting counting from the most significant bit. pcmpXstri returns the most significant bit set to one, starting counting from the least significant bit. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-04-01target-i386: SSE4.2: fix pcmpgtq instructionAurelien Jarno1-2/+1
The "Intel 64 and IA-32 Architectures Software Developer's Manual" (at least recent versions) clearly says that the comparison is signed. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-04-01target-i386: SSE4.1: fix pinsrb instructionAurelien Jarno1-2/+2
gen_op_mov_TN_reg() loads the value in cpu_T[0], so this temporary should be used instead of cpu_tmp0. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
generated by cgit v1.2.1 (git 2.18.0) at 2024-06-01 02:35:22 +0000