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2012-08-15win32: provide separate macros for weak decls and definitionsAnthony Liguori1-2/+2
mingw32 seems to want the declaration to also carry the weak attribute. Strangely, gcc on Linux absolutely does not want the declaration to be marked as weak. This may not be the right fix, but it seems to do the trick. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-08-14x86: switch to AREG0 free modeBlue Swirl9-199/+128
Add an explicit CPUX86State parameter instead of relying on AREG0. Remove temporary wrappers and switch to AREG0 free mode. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-08-14x86: avoid AREG0 in segmentation helpersBlue Swirl4-160/+150
Add an explicit CPUX86State parameter instead of relying on AREG0. Rename remains of op_helper.c to seg_helper.c. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-08-14x86: avoid AREG0 for misc helpersBlue Swirl4-83/+84
Add an explicit CPUX86State parameter instead of relying on AREG0. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-08-14x86: use wrappers for memory access helpersBlue Swirl3-103/+126
Switch to wrapped versions of memory access functions. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-08-14x86: avoid AREG0 for SMM helpersBlue Swirl4-13/+6
Add an explicit CPUX86State parameter instead of relying on AREG0. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-08-14x86: avoid AREG0 for SVM helpersBlue Swirl4-115/+110
Add an explicit CPUX86State parameter instead of relying on AREG0. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-08-14x86: avoid AREG0 for integer helpersBlue Swirl5-71/+88
Add an explicit CPUX86State parameter instead of relying on AREG0. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-08-14x86: avoid AREG0 for condition code helpersBlue Swirl10-169/+179
Add an explicit CPUX86State parameter instead of relying on AREG0. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-08-14x86: avoid AREG0 for FPU helpersBlue Swirl8-876/+968
Make FPU helpers take a parameter for CPUState instead of relying on global env. Introduce temporary wrappers for FPU load and store ops. Remove wrappers for non-AREG0 code. Don't call unconverted helpers directly. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-08-13Merge remote-tracking branch 'qmp/queue/qmp' into stagingAnthony Liguori1-0/+22
* qmp/queue/qmp: (48 commits) target-ppc: add implementation of query-cpu-definitions (v2) target-i386: add implementation of query-cpu-definitions (v2) qapi: add query-cpu-definitions command (v2) compiler: add macro for GCC weak symbols qapi: add query-machines command qapi: mark QOM commands stable qmp: introduce device-list-properties command qmp: add SUSPEND_DISK event qmp: qmp-events.txt: add missing doc for the SUSPEND event qmp: qmp-events.txt: put events in alphabetical order qmp: emit the WAKEUP event when the guest is put to run qmp: don't emit the RESET event on wakeup from S3 scripts: qapi-commands.py: qmp-commands.h: include qdict.h docs: writing-qmp-commands.txt: update error section error, qerror: drop QDict member qerror: drop qerror_table and qerror_format() error, qerror: pass desc string to error calls error: drop error_get_qobject()/error_set_qobject() qemu-ga: switch to the new error format on the wire qmp: switch to the new error format on the wire ...
2012-08-13target-i386: add implementation of query-cpu-definitions (v2)Anthony Liguori1-0/+22
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
2012-08-13Merge remote-tracking branch 'qemu-kvm/uq/master' into stagingAnthony Liguori4-0/+48
* qemu-kvm/uq/master: kvm: Add documentation comment for kvm_irqchip_in_kernel() kvm: Decouple 'GSI routing' from 'kernel irqchip' kvm: Decouple 'MSI routing via irqfds' from 'kernel irqchip' kvm: Decouple 'irqfds usable' from 'kernel irqchip' kvm: Move kvm_allows_irq0_override() to target-i386, fix return type kvm: Rename kvm_irqchip_set_irq() to kvm_set_irq() kvm: Decouple 'async interrupt delivery' from 'kernel irqchip' configure: Don't implicitly hardcode list of KVM architectures kvm: Check if smp_cpus exceeds max cpus supported by kvm
2012-08-09Merge branch 'x86cpu_qom_tcg_v2' of git://github.com/imammedo/qemuBlue Swirl3-15/+12
* 'x86cpu_qom_tcg_v2' of git://github.com/imammedo/qemu: target-i386: move tcg initialization into x86_cpu_initfn() cleanup cpu_set_debug_excp_handler target-xtensa: drop usage of prev_debug_excp_handler target-i386: drop usage of prev_debug_excp_handler
2012-08-09kvm: Decouple 'GSI routing' from 'kernel irqchip'Peter Maydell1-1/+2
Don't assume having an in-kernel irqchip means that GSI routing is enabled. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Avi Kivity <avi@redhat.com>
2012-08-09kvm: Decouple 'MSI routing via irqfds' from 'kernel irqchip'Peter Maydell1-1/+3
Decouple another x86-specific assumption about what irqchips imply. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Avi Kivity <avi@redhat.com>
2012-08-09kvm: Decouple 'irqfds usable' from 'kernel irqchip'Peter Maydell1-0/+4
Instead of assuming that we can use irqfds if and only if kvm_irqchip_in_kernel(), add a bool to the KVMState which indicates this, and is set only on x86 and only if the irqchip is in the kernel. The kernel documentation implies that the only thing you need to use KVM_IRQFD is that KVM_CAP_IRQFD is advertised, but this seems to be untrue. In particular the kernel does not (alas) return a sensible error if you try to set up an irqfd when you haven't created an irqchip. If it did we could remove all this nonsense and let the kernel return the error code. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Avi Kivity <avi@redhat.com>
2012-08-09kvm: Move kvm_allows_irq0_override() to target-i386, fix return typePeter Maydell4-0/+41
kvm_allows_irq0_override() is a totally x86 specific concept: move it to the target-specific source file where it belongs. This means we need a new header file for the prototype: kvm_i386.h, in line with the existing kvm_ppc.h. While we are moving it, fix the return type to be 'bool' rather than 'int'. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Avi Kivity <avi@redhat.com>
2012-08-01target-i386: move cpu_reset and reset callback to cpu.cIgor Mammedov1-0/+14
Moving reset callback into cpu object from board level and resetting cpu at the end of x86_cpu_realize() will allow properly create cpu object during run-time (hotplug) without calling reset externaly. When reset over QOM hierarchy is implemented, reset callback should be removed. v2: - leave cpu_reset in pc_new_cpu() for now, it's to be cleaned up when APIC init is moved in cpu.c Signed-off-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-08-01target-i386: move cpu halted decision into x86_cpu_resetIgor Mammedov3-2/+19
MP initialization protocol differs between cpu families, and for P6 and onward models it is up to CPU to decide if it will be BSP using this protocol, so try to model this. However there is no point in implementing MP initialization protocol in qemu. Thus first CPU is always marked as BSP. This patch: - moves decision to designate BSP from board into cpu, making cpu self-sufficient in this regard. Later it will allow to cleanup hw/pc.c and remove cpu_reset and wrappers from there. - stores flag that CPU is BSP in IA32_APIC_BASE to model behavior described in Inted SDM vol 3a part 1 chapter 8.4.1 - uses MSR_IA32_APICBASE_BSP flag in apic_base for checking if cpu is BSP patch is based on Jan Kiszka's proposal: http://thread.gmane.org/gmane.comp.emulators.qemu/100806 Signed-off-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-07-29x86: Fixed incorrect segment base address addition in 64-bits modeVitaly Chipounov1-18/+25
According to the Intel manual "Intel® 64 and IA-32 Architectures Software Developer’s Manual Volume 3", "3.4.4 Segment Loading Instructions in IA-32e Mode": "When in compatibility mode, FS and GS overrides operate as defined by 32-bit mode behavior regardless of the value loaded into the upper 32 linear-address bits of the hidden descriptor register base field. Compatibility mode ignores the upper 32 bits when calculating an effective address." However, the code misses the 64-bit mode case, where an instruction with address and segment size override would be translated incorrectly. For example, inc dword ptr gs:260h[ebx*4] gets incorrectly translated to: (uint32_t)(gs.base + ebx * 4 + 0x260) instead of gs.base + (uint32_t)(ebx * 4 + 0x260) Signed-off-by: Vitaly Chipounov <vitaly.chipounov@epfl.ch> Reviewed-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-07-21Recognize PCID featureMao, Junjie1-1/+1
This patch makes Qemu recognize the PCID feature specified from configuration or command line options. Signed-off-by: Junjie Mao <junjie.mao@intel.com> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2012-07-18Merge remote-tracking branch 'qemu-kvm/uq/master' into stagingAnthony Liguori3-2/+14
* qemu-kvm/uq/master: virtio: move common irqfd handling out of virtio-pci virtio: move common ioeventfd handling out of virtio-pci event_notifier: add event_notifier_set_handler memory: pass EventNotifier, not eventfd ivshmem: wrap ivshmem_del_eventfd loops with transaction ivshmem: use EventNotifier and memory API event_notifier: add event_notifier_init_fd event_notifier: remove event_notifier_test event_notifier: add event_notifier_set apic: Defer interrupt updates to VCPU thread apic: Reevaluate pending interrupts on LVT_LINT0 changes apic: Resolve potential endless loop around apic_update_irq kvm: expose tsc deadline timer feature to guest kvm_pv_eoi: add flag support kvm: Don't abort on kvm_irqchip_add_msi_route()
2012-07-10apic: Defer interrupt updates to VCPU threadJan Kiszka2-1/+7
KVM performs TPR raising asynchronously to QEMU, specifically outside QEMU's global lock. When an interrupt is injected into the APIC and TPR is checked to decide if this can be delivered, a stale TPR value may be used, causing spurious interrupts in the end. Fix this by deferring apic_update_irq to the context of the target VCPU. We introduce a new interrupt flag for this, CPU_INTERRUPT_POLL. When it is set, the VCPU calls apic_poll_irq before checking for further pending interrupts. To avoid special-casing KVM, we also implement this logic for TCG mode. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Avi Kivity <avi@redhat.com>
2012-07-07target-i386: make it clearer that op table accesses don't overrunPeter Maydell1-6/+6
Rephrase some of the expressions used to select an entry in the SSE op table arrays so that it's clearer that they don't overrun the op table array size. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-07-07target-i386: Remove confusing X86_64_DEF macroPeter Maydell1-15/+24
The X86_64_DEF macro is a confusing way of making some terms in a conditional only appear if TARGET_X86_64 is defined. We only use it in two places, and in both cases this is for making the same test, so abstract that check out into a function where we can use a more conventional #ifdef. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-07-07target-i386: Remove unused macrosPeter Maydell1-6/+0
Commit 11f8cdb removed all the uses of the X86_64_ONLY macro. The BUGGY_64() macro has been unused for a long time: it originally marked some ops which couldn't be enabled because of issues with the pre-TCG code generation scheme. Remove the now-unnecessary definitions of both macros. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-07-05target-i386: Fix compilation with --enable-debugStefan Weil1-25/+34
commit c4baa0503d9623f1ce891f525ccd140c598bc29a improved SSE table type safety which now raises compiler errors when latest QEMU was configured with --enable-debug. Fix this by splitting the SSE tables even further to separate helper functions with different signatures. Instead of crashing by calling address 0, the code now jumps to label illegal_op. Signed-off-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-07-03kvm: expose tsc deadline timer feature to guestLiu, Jinsong2-0/+6
This patch exposes tsc deadline timer feature to guest if 1). in-kernel irqchip is used, and 2). kvm has emulated tsc deadline timer, and 3). user authorize the feature exposing via -cpu or +/- tsc-deadline Signed-off-by: Liu, Jinsong <jinsong.liu@intel.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Acked-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2012-07-03kvm_pv_eoi: add flag supportMichael S. Tsirkin1-1/+1
Support the new PV EOI flag in kvm - it recently got merged into kvm.git. Set by default with -cpu kvm. Set for -cpu qemu by adding +kvm_pv_eoi. Clear by adding -kvm_pv_eoi to -cpu option. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2012-06-28x86: rename op_helper.c to seg_helper.cBlue Swirl2-3/+3
Rename what is remaining of op_helper.c to seg_helper.c. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28x86: split off memory access helpersBlue Swirl3-137/+165
Move memory access helpers to mem_helper.c. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28x86: split off misc helpersBlue Swirl3-579/+605
Move various functions to misc_helper.c. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28x86: split off SMM helpersBlue Swirl3-285/+309
Move SMM helpers to smm_helper.c. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28x86: split off SVM helpersBlue Swirl4-710/+734
Move SVM helpers to svm_helper.c. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28x86: split off integer helpersBlue Swirl3-479/+502
Move integer and bit field helpers to int_helper.c. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28x86: split off condition code helpersBlue Swirl4-407/+432
Move condition code helpers to cc_helper.c. Move the shared inline functions lshift(), cpu_load_eflags() and cpu_cc_compute_all() to cpu.h. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28x86: prepare eflags helpers for general useBlue Swirl1-31/+37
Adjust function names and add an explicit CPUX86State parameter instead of relying on AREG0. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28x86: split condition code and shift templatesBlue Swirl3-81/+133
Move shift templates from helper_template.h to shift_helper_template.h and the condition code helpers to cc_helper_template.h. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28x86: fix coding style in helper_template.hBlue Swirl1-3/+22
Fix coding style in helper_template.h before next commit. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28x86: improve SSE table type safetyBlue Swirl1-45/+89
SSE function tables could easily be corrupted because of use of void pointers. Introduce function pointer types and helper variables in order to improve type safety. Split sse_op_table3 according to types used. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28x86: split off FPU helpersBlue Swirl3-1278/+1306
Move FPU and MMX/SSE helpers to fpu_helpers.c. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28x86: fix coding style in ops_sse.hBlue Swirl1-471/+578
Fix coding style in ops_sse.h before next commit. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28x86: avoid an extern declarationBlue Swirl1-4/+1
After the previous patch, we can use the proper declaration in a common header file. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28x86: split off exception handlersBlue Swirl4-116/+140
Move exception handlers from op_helper.c to excp_helper.c. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28x86: avoid AREG0 for exceptionsBlue Swirl5-215/+225
Add an explicit CPUX86State parameter instead of relying on AREG0. Merge raise_exception_env() to raise_exception(), likewise with raise_exception_err_env() and raise_exception_err(). Introduce cpu_svm_check_intercept_param() and cpu_vmexit() as wrappers. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28x86: prepare op_helper.c for splittingBlue Swirl1-796/+1279
Fix coding style and a few typos. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-25target-i386: move tcg initialization into x86_cpu_initfn()Igor Mammedov3-10/+12
In order to make cpu object not depended on external ad-hoc initialization routines, move tcg initialization from cpu_x86_init inside cpu object "x86_cpu_initfn()". Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Andreas Färber <afaerber@suse.de>
2012-06-25target-i386: drop usage of prev_debug_excp_handlerIgor Mammedov1-6/+1
Chains of exception handlers are currently unused feature, drop it for now so as not to expose prev_debug_excp_handler at global scope when moving tcg initialization into target-i386/cpu.c Later we probably could re-invent better interface for this. Signed-off-by: Igor Mammedov <imammedo@redhat.com>
2012-06-22target-i386: Use QEMU instead of QemuStefan Weil1-1/+1
This new 'QEmu' was recently added. Replace it by the official all upper case 'QEMU'. Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
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